6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-10-17 03:26:03 +00:00
Code Issues Projects Releases Wiki Activity
60,547 Commits 39 Branches 0 Tags 277 MiB
9cc9bfaf86
Commit Graph

39 Commits

Author SHA1 Message Date
Evan Cheng
603afbfe2a Model vld2 / vst2 with reg_sequence. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103411 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-10 17:34:18 +00:00
Dan Gohman
34dcc6fadc Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it 
doesn't have to guess.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103194 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-06 20:33:48 +00:00
Evan Cheng
676b2dfd27 Do not pre-allocate references of D registers pairs if they are extracted from the same Q register and are in the right order. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103124 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-05 22:15:40 +00:00
Evan Cheng
826bdfa603 Do not pre-allocate for registers which form a REG_SEQUENCE. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103041 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-04 20:38:12 +00:00
Bob Wilson
11d9899759 Change VST1 instructions for loading Q register values to operate on pairs 
of D registers.  Add a separate VST1q instruction with a Q register
source operand for use by storeRegToStackSlot.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99265 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-23 06:20:33 +00:00
Bob Wilson
621f195243 Change VLD1 instructions for loading Q register values to operate on pairs 
of D registers.  Add a separate VLD1q instruction with a Q register
destination operand for use by loadRegFromStackSlot.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99261 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-23 05:25:43 +00:00
Bob Wilson
a6979754da Rename some VLD1/VST1 instructions to match the implementation, i.e., the 
corresponding NEON instructions, instead of operation they are currently
used for.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99189 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-22 18:13:18 +00:00
Bob Wilson
226036ee73 Re-commit r98683 ("remove redundant writeback flag from ARM address mode 6") 
with changes to add a separate optional register update argument.  Change all
the NEON instructions with address register writeback to use it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99095 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-20 22:13:40 +00:00
Bob Wilson
95ffecd4fe Rename some instructions for consistency and sanity: use "_UPD" suffix for 
load/stores with address register writeback, and use "odd" suffix to distinguish
instructions to access odd numbered registers (instead of "a" and "b").
No functional changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99066 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-20 18:35:24 +00:00
Bob Wilson
a43e6bf690 Revert 98683. It is breaking something in the disassembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98692 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-16 23:01:13 +00:00
Bob Wilson
bb6c77e6b9 Remove redundant writeback flag from ARM address mode 6. Also remove the 
optional register update argument, which is currently unused -- when we add
support for that, it can just be a separate operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98683 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-16 21:44:40 +00:00
Chris Lattner
7896c9f436 improve portability to avoid conflicting with std::next in c++'0x. 
Patch by Howard Hinnant!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90365 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-03 00:50:42 +00:00
Jim Grosbach
8a5ec86a3d Support alignment specifier for NEON vld/vst instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86404 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-07 21:25:39 +00:00
Nick Lewycky
6726b6d75a Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces. 
Chris claims we should never have visibility_hidden inside any .cpp file but
that's still not true even after this commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85042 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-25 06:33:48 +00:00
Bob Wilson
5631139a69 Add codegen support for NEON vst4lane intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83600 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-09 00:01:36 +00:00
Bob Wilson
8cdb269686 Add codegen support for NEON vst3lane intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83598 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 23:51:31 +00:00
Bob Wilson
c5c6edb74f Add codegen support for NEON vst2lane intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83596 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 23:38:24 +00:00
Bob Wilson
62e053e5a1 Add codegen support for NEON vld4lane intrinsics with 128-bit vectors. 
Also fix some copy-and-paste errors in previous changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83590 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 22:53:57 +00:00
Bob Wilson
0bf7d998b4 Add codegen support for NEON vld3lane intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83585 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 22:27:33 +00:00
Bob Wilson
30aea9d96e Add codegen support for NEON vld2lane intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83568 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 18:56:10 +00:00
Bob Wilson
deb3141cf5 Add codegen support for NEON vst4 intrinsics with <1 x i64> vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83526 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 05:18:18 +00:00
Bob Wilson
5adf60c03b Add codegen support for NEON vst3 intrinsics with <1 x i64> vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83518 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 00:28:28 +00:00
Bob Wilson
24e04c535f Add codegen support for NEON vst2 intrinsics with <1 x i64> vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83513 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-08 00:21:01 +00:00
Bob Wilson
0ea38bb939 Add codegen support for NEON vld4 intrinsics with <1 x i64> vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83508 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 23:54:04 +00:00
Bob Wilson
c67160c010 Add codegen support for NEON vld3 intrinsics with <1 x i64> vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83506 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 23:39:57 +00:00
Bob Wilson
a4288080e6 Add codegen support for NEON vld2 intrinsics with <1 x i64> vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83502 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 22:57:01 +00:00
Bob Wilson
63c9063434 Add codegen support for NEON vst4 intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83486 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 20:49:18 +00:00
Bob Wilson
66a70639da Add codegen support for NEON vst3 intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83484 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 20:30:08 +00:00
Bob Wilson
d285575f87 Add codegen support for NEON vst2 intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83482 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 18:47:39 +00:00
Bob Wilson
7708c22baa Add codegen support for NEON vld4 intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83479 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 18:09:32 +00:00
Bob Wilson
ff8952e8a9 Add codegen support for NEON vld3 intrinsics with 128-bit vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83471 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-07 17:24:55 +00:00
Bob Wilson
3bf12ab860 Add codegen support for NEON vld2 operations on quad registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83422 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-06 22:01:59 +00:00
Bob Wilson
349d82d400 Use copyRegToReg hook to copy registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83421 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-06 22:01:15 +00:00
Bob Wilson
8a3198b770 Add support for generating code for vst{234}lane intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80707 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-01 18:51:56 +00:00
Bob Wilson
243fcc5a69 Generate code for vld{234}_lane intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80656 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-01 04:26:28 +00:00
Bob Wilson
114a266c94 Generate Neon VTBL and VTBX instructions from the corresponding intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78835 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 20:51:55 +00:00
Bob Wilson
b36ec86c01 Implement Neon VST[234] operations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78330 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-06 18:47:44 +00:00
Bob Wilson
0cedab9a0d Neon does not actually have VLD{234}.64 instructions. 
These operations will have to be synthesized from other instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78263 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-06 00:24:27 +00:00
Bob Wilson
70cd88fb7b Add a new pre-allocation pass to assign adjacent registers for Neon instructions 
that have that constraint.  This is currently just assigning a fixed set of
registers, and it only handles VLDn for n=2,3,4 with DPR registers.
I'm going to expand it to handle more operations next; we can make it smarter
once everything is working correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78256 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-05 23:12:45 +00:00