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650 Commits

Author SHA1 Message Date
Nate Begeman
3dee17581c Fix some comments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22530 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-27 23:11:27 +00:00
Jeff Cohen
00b16889ab Eliminate all remaining tabs and trailing spaces. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22523 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-27 06:12:32 +00:00
Nate Begeman
54eed36da5 Implement the optimization for the Red Zone on Darwin. This removes the 
unnecessary SP manipulation in leaf routines that don't need it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22522 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-27 06:06:29 +00:00
Jeff Cohen
9eb59ec548 Eliminate tabs and trailing spaces. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22520 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-27 05:53:44 +00:00
Chris Lattner
b65975a6ed add a note about the red zone 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22518 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-26 19:07:51 +00:00
Chris Lattner
2e00d7d0ae Wrap some long lines, fix emission of weak global variables 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22517 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-26 19:03:27 +00:00
Nate Begeman
4ad870ddcc Update the PPC readme 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22516 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-26 18:59:06 +00:00
Nate Begeman
7b4f0a81ff Fix an optimization put in for accessing static globals. This obviates 
the need to build PIC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22512 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-25 21:15:28 +00:00
Chris Lattner
aa68f7fa09 PowerPC no-pic code is not quite ready for prime-time 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22507 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-22 22:58:34 +00:00
Andrew Lenharth
908bc862d5 update interface 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22498 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-22 20:49:37 +00:00
Nate Begeman
2497e6391f Support building non-PIC 
Remove the LoadHiAddr pseudo-instruction.
Optimization of stores to and loads from statics.
Force JIT to use new non-PIC codepaths.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22494 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-21 20:44:43 +00:00
Chris Lattner
2130c08930 revert to using 4-byte alignment for doubles, as specified by the ABI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22493 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-21 19:17:18 +00:00
Nate Begeman
18ed029a7b Support assembling fsqrt on darwin. This will be implemented better when 
PowerPC gets subtarget support up.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22489 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-21 01:25:49 +00:00
Nate Begeman
adeb43ddf4 Generate mfocrf when targeting g5. Generate fsqrt/fsqrts when targetin g5. 
8-byte align doubles.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22486 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-20 22:42:00 +00:00
Nate Begeman
a3fd400fa8 Integrate SelectFPExpr into SelectExpr. This gets PPC32 closer to being 
automatically generated from a target description.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22470 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-19 16:51:05 +00:00
Nate Begeman
63b3f9acae Remove some code that moved to the generic asm printer a long time ago. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22407 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-12 18:34:15 +00:00
Chris Lattner
bce81ae51e Change *EXTLOAD to use an VTSDNode operand instead of being an MVTSDNode. 
This is the last MVTSDNode.

This allows us to eliminate a bunch of special case code for handling
MVTSDNodes.

Also, remove some uses of dyn_cast that should really be cast (which is
cheaper in a release build).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22368 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-10 01:56:13 +00:00
Chris Lattner
9fadb4c1c0 Change TRUNCSTORE to use a VTSDNode operand instead of being an MVTSTDNode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22366 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-10 00:29:18 +00:00
Nate Begeman
72b286b0a0 Add support for assembling .s files on mac os x for intel 
Add support for running bugpoint on mac os x for intel


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22351 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-08 00:23:26 +00:00
Chris Lattner
e0fe225e89 Make several cleanups to Andrews varargs change: 
1. Pass Value*'s into lowering methods so that the proper pointers can be
   added to load/stores from the valist
2. Intrinsics that return void should only return a token chain, not a token
   chain/retval pair.
3. Rename LowerVAArgNext -> LowerVAArg, because VANext is long gone.
4. Now that we have Value*'s available in the lowering methods, pass them
   into any load/stores from the valist that are emitted


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22339 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-05 19:58:54 +00:00
Chris Lattner
f84a2ace5e Fix PowerPC varargs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22335 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-05 17:48:31 +00:00
Chris Lattner
c1671e2d7d Varargs is apparently currently broken on PPC. This hacks it so that it 
is at least overloading the right virtual methods.  The implementations
are currently wrong though.  This fixes Ptrdist/bc, but not other programs
(e.g. siod).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22326 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-01 23:11:56 +00:00
Chris Lattner
0431c96cec Refactor the addPassesToEmitAssembly interface into a addPassesToEmitFile 
interface.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22282 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-25 02:48:37 +00:00
Andrew Lenharth
213e557cef If we support structs as va_list, we must pass pointers to them to va_copy 
See last commit for LangRef, this implements it on all targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22273 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-22 21:04:42 +00:00
Andrew Lenharth
558bc88a00 core changes for varargs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22254 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-18 18:34:52 +00:00
Reid Spencer
4b828e6384 Clean up some uninitialized variables and missing return statements that 
GCC 4.0.0 compiler (sometimes incorrectly) warns about under release build.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22249 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-18 17:37:34 +00:00
Chris Lattner
b157f858a2 silence incredibly braindead GCC 4 warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22246 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-17 13:44:07 +00:00
Nate Begeman
439009c81e Commit fix for generating conditional branch pseudo instructions that 
avoids dereferencing the end() iterator when selecting the fallthrough
block.  This requires an ilist change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22212 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-15 18:22:43 +00:00
Nate Begeman
a43b176f51 Commit a small improvement that is already in the x86 and ia64 backends to 
not generate unnecessary register copies.  This improves compile time by
2-5% depending on the test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22210 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-14 03:55:23 +00:00
Nate Begeman
ac609ddf82 Fix a memory smasher caught by Mac OS X's debug malloc library. We were 
incorrectly using an iterator after it was invalid.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22207 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-12 23:50:33 +00:00
Reid Spencer
eae435de83 For PR572: 
Undefine the PPC symbol which is defined by Linux/PPC (erroneously) so it
doesn't pollute the user namespace and clash with our namespace declarations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22202 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-08 17:44:48 +00:00
Nate Begeman
b2c4bf3ff6 Handle some more real world cases of rlwimi. These don't come up that 
regularly in "normal" code, but for things like software graphics, they
make a big difference.

For the following code:
unsigned short Trans16Bit(unsigned srcA,unsigned srcB,unsigned alpha)
{
	unsigned tmpA,tmpB,mixed;
	tmpA = ((srcA & 0x03E0) << 15) | (srcA & 0x7C1F);
	tmpB = ((srcB & 0x03E0) << 15) | (srcB & 0x7C1F);
	mixed = (tmpA * alpha) + (tmpB * (32 - alpha));
	return ((mixed >> 5) & 0x7C1F) | ((mixed >> 20) & 0x03E0);
}

We now generate:
_Trans16Bit:
.LBB_Trans16Bit_0:      ; entry
        andi. r2, r4, 31775
        rlwimi r2, r4, 15, 7, 11
        subfic r4, r5, 32
        mullw r2, r2, r4
        andi. r4, r3, 31775
        rlwimi r4, r3, 15, 7, 11
        mullw r3, r4, r5
        add r2, r2, r3
        srwi r3, r2, 5
        andi. r3, r3, 31775
        rlwimi r3, r2, 12, 22, 26
        blr

Instead of:
_Trans16Bit:
.LBB_Trans16Bit_0:      ; entry
        slwi r2, r4, 15
        rlwinm r2, r2, 0, 7, 11
        andi. r4, r4, 31775
        or r2, r2, r4
        subfic r4, r5, 32
        mullw r2, r2, r4
        slwi r4, r3, 15
        rlwinm r4, r4, 0, 7, 11
        andi. r3, r3, 31775
        or r3, r4, r3
        mullw r3, r3, r5
        add r2, r2, r3
        srwi r3, r2, 5
        andi. r3, r3, 31775
        srwi r2, r2, 20
        rlwimi r3, r2, 0, 22, 26
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22201 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-08 04:14:27 +00:00
Chris Lattner
fc87928ebb PPC "branch and link" instructions are branches in the PPC sense, but not 
in the LLVM code generator sense (they are calls).  Don't mark them as such,
which fixes the regressions on the ppc tester last night


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22065 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-15 20:11:44 +00:00
Chris Lattner
022ed327bd Fix andrews changes to fit in 80 columns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22064 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-15 19:54:37 +00:00
Chris Lattner
b5d8e6ece6 treat TAILCALL nodes identically to CALL nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21977 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 20:29:26 +00:00
Chris Lattner
adf6a965a3 Add an isTailCall flag to LowerCallTo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21958 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 18:50:42 +00:00
Chris Lattner
32f3cf612e Realize that we don't support fmod directly, fixing CodeGen/Generic/print-arith-fp.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21939 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 16:20:22 +00:00
Chris Lattner
16cd04d26c rename the ADJCALLSTACKDOWN/ADJCALLSTACKUP nodes to be CALLSEQ_START/BEGIN. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21915 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-12 23:24:06 +00:00
Chris Lattner
c57f682113 Pass in Calling Convention to use into LowerCallTo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21899 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-12 19:56:45 +00:00
Chris Lattner
9bce0f92c3 These targets don't like setcc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21884 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-12 02:06:00 +00:00
Nate Begeman
d7c4a4a6c0 Necessary changes to codegen cttz efficiently on PowerPC 
1. Teach LegalizeDAG how to better legalize CTTZ if the target doesn't have
   CTPOP, but does have CTLZ
2. Teach PPC32 how to do sub x, const -> add x, -const for valid consts
3. Teach PPC32 how to do and (xor a, -1) b -> andc b, a
4. Teach PPC32 that ISD::CTLZ -> PPC::CNTLZW


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21880 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-11 23:43:56 +00:00
Chris Lattner
cafb67b250 fold and (shl X, C1), C2 -> rlwinm when possible. Many other cases are possible, 
include and (srl)    and the inverses (shl and) etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21820 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-09 17:39:48 +00:00
Andrew Lenharth
b5884d3116 fix typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21693 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-04 19:25:37 +00:00
Andrew Lenharth
691ef2ba06 Implement count leading zeros (ctlz), count trailing zeros (cttz), and count 
population (ctpop).  Generic lowering is implemented, however only promotion
is implemented for SelectionDAG at the moment.

More coming soon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21676 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-03 17:19:30 +00:00
Chris Lattner
08cae7f519 Doesn't support these nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21634 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-30 04:26:56 +00:00
Chris Lattner
17234b7d78 This target doesn't support the FSIN/FCOS/FSQRT nodes yet 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21633 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-30 04:26:06 +00:00
Andrew Lenharth
2d86ea21dd Implement Value* tracking for loads and stores in the selection DAG. This enables one to use alias analysis in the backends. 
(TRUNK)Stores and (EXT|ZEXT|SEXT)Loads have an extra SDOperand which is a SrcValueSDNode which contains the Value*.  Note that if the operation is introduced by the backend, it will still have the operand, but the value* will be null.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21599 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-27 20:10:01 +00:00
Misha Brukman
7847fcac17 Convert tabs to spaces 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21452 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-22 17:54:37 +00:00
Misha Brukman
b5f662fa03 Remove trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21425 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-21 23:30:14 +00:00
Chris Lattner
837a521c48 Match another form of eqv 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21413 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-21 21:09:11 +00:00
Chris Lattner
f577c6122f Add completely untested support for mtcrf/mfcrf encoding 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21353 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 05:41:52 +00:00
Chris Lattner
14522e31d9 switch over the rest of the formats that use RC to use isDOT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21352 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 05:21:30 +00:00
Chris Lattner
883059fb58 Convert the XForm instrs and XSForm instruction over to use isDOT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21351 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 05:15:18 +00:00
Chris Lattner
97a2d42999 Now that the ppc64 and vmx operands of I are always 0, forward substitute 
them away.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21350 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 05:05:22 +00:00
Chris Lattner
a611ab72ca convert over bform and iform instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21349 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 05:00:59 +00:00
Chris Lattner
57226fbc7b Convert over DForm and DSForm instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21348 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 04:59:28 +00:00
Chris Lattner
e19d0b1130 Convert XLForm and XForm instructions over to use PPC64 when appropriate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21347 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 04:51:30 +00:00
Chris Lattner
5035cef732 Convert XO XS and XFX forms to use isPPC64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21346 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 04:40:07 +00:00
Chris Lattner
0bdc6f1fd4 Turn PPC64 and VMX into classes that can be added to instructions instead of 
bits that must be passed up the inheritance hierarchy.  Convert MForm and AForm
instructions over


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21345 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-19 04:32:54 +00:00
Nate Begeman
1cbf3abbb8 Next round of PPC CR optimizations. For the following code: 
int %bar(float %a, float %b, float %c, float %d) {
entry:
    %tmp.1 = setlt float %a, %d
    %tmp.2 = setlt float %b, %d
    %or = or bool %tmp.1, %tmp.2
    %tmp.3 = setgt float %c, %d
    %tmp.4 = or bool %or, %tmp.3
    %tmp.5 = and bool %tmp.4, true
    %retval = cast bool %tmp.5 to int
    ret int %retval
}

We now emit:

_bar:
.LBB_bar_0:     ; entry
        fcmpu cr0, f1, f4
        fcmpu cr1, f2, f4
        cror 0, 0, 4
        fcmpu cr1, f3, f4
        cror 28, 0, 5
        mfcr r2
        rlwinm r3, r2, 29, 31, 31
        blr

Instead of:

_bar:
.LBB_bar_0:     ; entry
        fcmpu cr7, f1, f4
        mfcr r2
        rlwinm r2, r2, 29, 31, 31
        fcmpu cr7, f2, f4
        mfcr r3
        rlwinm r3, r3, 29, 31, 31
        or r2, r2, r3
        fcmpu cr7, f3, f4
        mfcr r3
        rlwinm r3, r3, 30, 31, 31
        or r3, r2, r3
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21321 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-18 07:48:09 +00:00
Nate Begeman
16ac709c63 Change codegen for setcc to read the bit directly out of the condition 
register.  Added support in the .td file for the g5-specific variant
  of cr -> gpr moves that executes faster, but we currently don't
  generate it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21314 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-18 02:43:24 +00:00
Chris Lattner
477d1de9b2 Handle ExternalSymbol operands in the PPC JIT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21312 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-18 00:46:10 +00:00
Nate Begeman
f8b02949e3 Make pattern isel default for ppc 
Add new ppc beta option related to using condition registers
Make pattern isel control flag (-enable-pattern-isel) global and tristate
  0 == off
  1 == on
  2 == target default


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21309 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-15 22:12:16 +00:00
Nate Begeman
7bfba7d5e3 Implement multi-way branches through logical ops on condition registers. 
This can generate considerably shorter code, reducing the size of crafty
by almost 1%.  Also fix the printing of mcrf.  The code is currently
disabled until it gets a bit more testing, but should work as-is.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21298 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-14 09:45:08 +00:00
Nate Begeman
ef7288c824 Add the necessary support to codegen condition register logical ops with 
register allocated condition registers.  Make sure that the printed
  output is gas compatible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21295 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-14 03:20:38 +00:00
Nate Begeman
1b7f7fbf95 Start allocating condition registers. Almost all explicit uses of CR0 are 
now gone.  Next step is to get rid of the remaining ones and then start
allocating bools to CRs where appropriate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21294 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 23:15:44 +00:00
Nate Begeman
3664ceffdd Implement the fold shift X, zext(Y) -> shift X, Y at the target level, 
where it is safe to do so.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21293 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 22:14:14 +00:00
Nate Begeman
eea805e74c Disbale the broken fold of shift + sz[ext] for now 
Move the transform for select (a < 0) ? b : 0 into the dag from ppc isel
Enable the dag to fold and (setcc, 1) -> setcc for targets where setcc
  always produces zero or one.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21291 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 21:23:31 +00:00
Chris Lattner
519f40ba4e remove one more occurance of this that snuck in 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21271 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 02:46:17 +00:00
Chris Lattner
c951d87fe9 Elimate handling of ZERO_EXTEND_INREG. This causes the PPC backend to emit 
andi instructions instead of rlwinm instructions for zero extend, but they
seem like they would take the same time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21268 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 02:40:26 +00:00
Nate Begeman
b882752bd0 Fold shift by size larger than type size to undef 
Make llvm undef values generate ISD::UNDEF nodes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21261 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-12 23:12:17 +00:00
Nate Begeman
9765c25eb7 Implement setcc op, -1 sequences 
Remove dead setcc op, 0 sequences
Coming later: generalization of op, imm


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21260 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-12 21:22:28 +00:00
Nate Begeman
7af0248af4 Initial support for allocation condition registers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21246 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-12 07:04:16 +00:00
Nate Begeman
9f833d3085 Implement bitfield clears 
Implement divide by negative power of two


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21240 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-12 00:10:02 +00:00
Nate Begeman
ef9531efed Update PPC readme. Remove things that are done or aren't ppc specific 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21232 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-11 20:48:57 +00:00
Chris Lattner
5eef9f3bc9 ORo sets CR0 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21227 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-11 15:03:48 +00:00
Chris Lattner
6b4ea2cfa2 Revert the previous patch, which I didn't mean to check in. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21226 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-11 15:03:41 +00:00
Chris Lattner
26d4fdb968 Fix a minor bug (ORo didn't mark that it set CR0). 
Refactor how . instructions are handled.  In particular, instead of passing
the RC flag all the way up the inheritance hierarchy, just make a new tblgen
class 'DOT' which can be added to an instruction definition.

For example, instead of this:

-def AND  : XForm_6<31,  28, 0, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
-let Defs = [CR0] in
-def ANDo : XForm_6<31,  28, 1, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
-                   "and. $rA, $rS, $rB">;

We now have this:

+def AND  : XForm_6<31,  28, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
                    "and $rA, $rS, $rB">;


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21225 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-11 15:01:39 +00:00
Nate Begeman
c7bd4827cd Add recording variants of ISD::AND and ISD::OR. This kills almost 1000 
(1.5%) instructions in 186.crafty


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21222 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-11 06:34:10 +00:00
Nate Begeman
709c806a1e Fix another fixme: factor out the constant fp generation code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21207 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-10 06:06:10 +00:00
Nate Begeman
c5b1cd22b5 Fix 64 bit argument loading that straddles the args in regs / args on stack 
boundary.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21206 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-10 05:53:14 +00:00
Nate Begeman
340f290783 Remove unnecessary Implicit Defs. Since r0 is not in allocation, we do not 
have to inform the register allocator it might be stepped on.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21202 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-10 03:59:42 +00:00
Nate Begeman
27499e3f1b Make sure that BRCOND branches can be converted into long branches too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21198 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-10 01:48:29 +00:00
Nate Begeman
a0e3e9474f Don't hand ISD::CALL nodes off to SelectExprFP. This fixes siod. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21197 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-10 01:14:13 +00:00
Chris Lattner
51d2ed976f rename getPPCOpcodeForSetCCNumber -> getPPCOpcodeForSetCCOpode to be more 
correct.  Remove the EmitComparison retvalue, as it is always the first arg.

Fix a place where we incorrectly passed in the setcc opcode instead of the
setcc number, causing us to miscompile crafty.  Crafty now works!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21195 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-10 01:03:31 +00:00
Nate Begeman
706471e291 fix ISD::BRCONDTWOWAY codegen to not deference the end() iterator 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21193 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-09 23:35:05 +00:00
Chris Lattner
9184bfbbf4 Fix CodeGen/Generic/2005-05-09-GlobalInPHI.ll, which was reduced from 254.gap. 
This caused the "use before a def" assertion on some programs.

With this patch, 254.gap now passes with the PPC backend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21191 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-09 22:05:17 +00:00
Chris Lattner
91277ea45c do not set the root to null if an argument is dead 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21188 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-09 21:23:24 +00:00
Nate Begeman
cd08e4cb7e Add rlwnm instruction for variable rotate 
Generate rotate left/right immediate
Generate code for brcondtwoway
Use new livein/liveout functionality


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21187 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-09 20:09:12 +00:00
Chris Lattner
27ee3a332d Fix a crash on 173.applu by asking for a constant bigger than 32-bits. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21185 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-09 19:47:21 +00:00
Chris Lattner
f429a3e0f6 Switch this instruction selector over to using liveins and liveouts, eliminating 
implicit defs on entry to the function.  yaay :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21184 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-09 16:32:30 +00:00
Nate Begeman
af4ab1b103 Optimize FSEL a bit for fneg arguments. This fixes the recently added test 
case so that we emit

_test_fneg_sel:
.LBB_test_fneg_sel_0:   ;
        fsel f1, f1, f3, f2
        blr

instead of:

_test_fneg_sel:
.LBB_test_fneg_sel_0:   ;
        fneg f0, f1
        fneg f0, f0
        fsel f1, f0, f3, f2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21177 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-09 09:33:07 +00:00
Chris Lattner
644db4ec5f This target does not yet support ISD::BRCONDTWOWAY 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21163 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-09 03:22:30 +00:00
Nate Begeman
e88aa5b4d1 64b: Expand S/UREM 
32b: No longer pattern match fneg(fsub(fmul)) as fnmsub
     Pattern match fsub a, mul(b, c) as fnmsub
     Pattern match fadd a, mul(b, c) as fmadd
Those changes speed up hydro2d by 2.5%, distray by 6%, and scimark by 8%


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21161 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-09 03:05:51 +00:00
Nate Begeman
a9532d5dde Fix 64b shifts 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21159 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-08 23:45:01 +00:00
Nate Begeman
f3f2d6d378 Match Mac OS X 64 bit calling conventions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21157 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-08 21:26:05 +00:00
Nate Begeman
7e7fadd2ea Optimized code sequences for setcc reg, 0 
Optimized code sequence for (a < 0) ? b : 0


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21150 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-07 20:30:01 +00:00
Chris Lattner
cbd06fc3d7 PowerPC zero extends setcc results 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21147 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-07 19:41:49 +00:00
Nate Begeman
7ddecb4186 Pattern match bitfield insert, which helps shift long by immediate, among 
other things.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21127 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 23:51:40 +00:00
Nate Begeman
020ef42c19 Fix some shift bugs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21126 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 22:42:08 +00:00