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251 Commits

Author SHA1 Message Date
Bill Wendling
09aa3f0ef3 The BLX instruction is encoded differently than the BL, because why not? In 
particular, the immediate has 20-bits of value instead of 21. And bit 0 is '0'
always. Going through the BL fixup encoding was trashing the "bit 0 is '0'"
invariant.

Attempt to get the encoding at slightly more correct with this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121336 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-09 00:39:08 +00:00
Bill Wendling
dff2f7151f Support the "target" encodings for the CB[N]Z instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121308 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-08 23:01:43 +00:00
Bill Wendling
b8958b031e Add support for loading from a constant pool. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121226 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-08 01:57:09 +00:00
Jim Grosbach
d967cd096a Binary encoding for ARM tLDRspi and tSTRspi. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121186 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-07 21:50:47 +00:00
Jim Grosbach
97a884d602 Refactor the ARM CMPz* patterns to just use the normal CMP instructions when 
possible. They were duplicates for everything exception the source pattern
before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121179 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-07 20:41:06 +00:00
Jim Grosbach
5169220624 Encode the literal field for tCMPzi instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121153 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-07 17:48:24 +00:00
Jim Grosbach
662a816e89 Add fixup for Thumb1 BL/BLX instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121072 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-06 23:57:07 +00:00
Jim Grosbach
ceab50198e Encode condition code for Thumb1 conditional branch instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120865 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-04 00:20:40 +00:00
Bill Wendling
fb62d550de Use correct variable names to match the patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120857 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-03 23:44:24 +00:00
Jim Grosbach
1b555d9f96 Match pattern operand names to expected encoding field names. This corrects the 
operand encoding ordering of the instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120852 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-03 23:21:25 +00:00
Jim Grosbach
4fa102b84e Remove incorrect BL target encoding (it's similar to, but not the same as the 
ARM instruction). Add encoding of bits 13 and 11.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120849 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-03 22:33:42 +00:00
Jim Grosbach
0b951ceb02 No need to declare EncoderMethod property anymore; just assign to it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120831 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-03 19:31:00 +00:00
Jim Grosbach
d253545c17 Add FIXMEs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120824 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-03 18:37:17 +00:00
Bill Wendling
278b6e81c8 Don't overwrite the opcode passed into the T1Special pattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120782 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-03 02:02:58 +00:00
Bill Wendling
534a5e4305 Add Thumb encoding for some more instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120780 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-03 01:55:47 +00:00
Bill Wendling
0480e28fb2 Formatting. It's all the rage! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120533 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-01 02:36:55 +00:00
Bill Wendling
1d045ee884 More refactoring. This time the T1pI pattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120532 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-01 02:28:08 +00:00
Bill Wendling
40062fb747 s/T1pIEncode/T1pILdStEncode/g 
s/T1pIEncodeImm/T1pILdStEncodeImm/g


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120524 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-01 01:38:08 +00:00
Bill Wendling
0b424dc6b7 Renaming variables to coincide with documentation. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120522 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-01 01:32:02 +00:00
Bill Wendling
76f4e10388 Refactor T1sI and T1sIt encodings into helper classes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120518 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-01 01:20:15 +00:00
Bill Wendling
a5a42d9b3c Refactor the T1sIt encodings into a parent class to get rid of all of the "let" 
statements.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120512 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-01 00:48:44 +00:00
Bill Wendling
3f8c110dc6 Rename operands to match ARM documentation. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120500 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-30 23:54:45 +00:00
Bill Wendling
1fd374e9c1 * Add support for encoding t_addrmode_s2 and t_addrmode_s1. They are the same as 
t_addrmode_s4, but with a different scaling factor.

* Encode the Thumb1 load and store instructions. This involved a bit of
  refactoring (hi, Chris! :-). Some of the patterns became dead afterwards and
  were removed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120482 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-30 22:57:21 +00:00
Bill Wendling
ef4a68badb Add parsing for the Thumb t_addrmode_s4 addressing mode. This can almost 
certainly be made more generic. But it does allow us to parse something like:

          ldr     r3, [r2, r4]

correctly in Thumb mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120408 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-30 07:44:32 +00:00
Bill Wendling
0e45a5a901 Minor cleanups. No functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120372 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-30 00:50:22 +00:00
Bill Wendling
647fea57fd Add correct encoding for "bl __aeabi_read_tp". However, the asm matcher isn't 
able to match this yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120369 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-30 00:34:08 +00:00
Bill Wendling
67077419c6 Add some encoding for the adr instruction. Labels still need to be finished. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120365 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-30 00:18:30 +00:00
Bill Wendling
8ca2fd6665 Predicate encoding should be withing {}s. And general cleanup. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120361 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-30 00:08:20 +00:00
Bill Wendling
194271a76e Predicate encoding should be withing {}s. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120360 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-30 00:05:25 +00:00
Evan Cheng
1e0eab122b Mark Darwin call instructions as using "r7" to prevent the frame-register 
assignment instructions from being moved below / above calls.
rdar://8690640


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120339 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 22:43:27 +00:00
Bill Wendling
9b0e92ca5b Thumb encodings for conditional moves. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120334 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 22:37:46 +00:00
Bill Wendling
a46a493c02 Refactor some of the "disassembly-only" instructions into a base class. This 
reduces some code duplication.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120326 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 22:15:03 +00:00
Jim Grosbach
f1aa47dc1a ARM Pseudo-ize tBR_JTr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120310 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 19:32:47 +00:00
Bill Wendling
2f17bf2a44 Add more Thumb encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120279 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 01:07:48 +00:00
Bill Wendling
5cbbf68e35 More Thumb encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120278 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 01:00:43 +00:00
Bill Wendling
d19ac0c75a Add Thumb encodings for REV instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120277 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 00:42:50 +00:00
Bill Wendling
849f2e381e Add more Thumb encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120272 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 00:18:15 +00:00
Bill Wendling
dcf0a47b76 More Thumb encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119940 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-21 11:49:36 +00:00
Bill Wendling
7d0affdf02 - Give "trap" the correct encoding, at least according to Darwin's assembler. 
- Add comments saying where the encodings for other instructions came from.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119936 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-21 10:55:23 +00:00
Bill Wendling
5cc88a205d A few more thumb instruction MC encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119913 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-20 22:52:33 +00:00
Bill Wendling
a09cc2b429 Add more Thumb add instruction encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119883 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-20 01:18:47 +00:00
Bill Wendling
95a6d1759d Add Thumb encodings for some add instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119882 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-20 01:00:29 +00:00
Bill Wendling
6179c31e07 Add more encodings for Thumb instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119881 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-20 00:53:35 +00:00
Bill Wendling
1228038ed9 Encodings for the compare instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119868 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-19 23:14:32 +00:00
Bill Wendling
0ae28e4447 Add encodings for some of the thumb ADD instructions. Tests will come once the 
asm parser can handle them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119860 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-19 22:37:33 +00:00
Bill Wendling
ba46dc06e6 Revert accidental commit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119850 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-19 22:06:18 +00:00
Bill Wendling
a898166d38 Change long binary encodings to use hex instead. It's more readable. Also 
initialize missing bit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119849 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-19 22:02:18 +00:00
Bill Wendling
602890dd8e Add MC encodings for some Thumb instructions. Test for a few of them. The "bx 
lr" instruction cannot be tested just yet. It requires matching a "condition
code", but adding one of those makes things go south quickly...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119774 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-19 01:33:10 +00:00
Jim Grosbach
99594eb1de ARM PseudoInst instructions don't need or use an assembler string. Get rid of 
the operand to the pattern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119607 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-18 01:38:26 +00:00
Evan Cheng
c4af4638df Remove ARM isel hacks that fold large immediates into a pair of add, sub, and, 
and xor. The 32-bit move immediates can be hoisted out of loops by machine
LICM but the isel hacks were preventing them.

Instead, let peephole optimization pass recognize registers that are defined by
immediates and the ARM target hook will fold the immediates in.

Other changes include 1) do not fold and / xor into cmp to isel TST / TEQ
instructions if there are multiple uses. This happens when the 'and' is live
out, machine sink would have sinked the computation and that ends up pessimizing
code. The peephole pass would recognize situations where the 'and' can be
toggled to define CPSR and eliminate the comparison anyway.

2) Move peephole pass to after machine LICM, sink, and CSE to avoid blocking
important optimizations.

rdar://8663787, rdar://8241368


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119548 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-17 20:13:28 +00:00