Benjamin Kramer
31135c0692
Let SmallVector take advantage of LiveRange's podness.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105913 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-13 12:52:38 +00:00
Dan Gohman
8613b18a5a
Make MachineFunctionPass::createPrinterPass private, as no subclasses
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should be calling it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105517 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05 01:19:12 +00:00
Jakob Stoklund Olesen
9edf7deb37
Slightly change the meaning of the reMaterialize target hook when the original
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instruction defines subregisters.
Any existing subreg indices on the original instruction are preserved or
composed with the new subreg index.
Also substitute multiple operands mentioning the original register by using the
new MachineInstr::substituteRegister() function. This is necessary because there
will soon be <imp-def> operands added to non read-modify-write partial
definitions. This instruction:
%reg1234:foo = FLAP %reg1234<imp-def>
will reMaterialize(%reg3333, bar) like this:
%reg3333:bar-foo = FLAP %reg333:bar<imp-def>
Finally, replace the TargetRegisterInfo pointer argument with a reference to
indicate that it cannot be NULL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105358 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-02 22:47:25 +00:00
Rafael Espindola
42d075c4fb
Remove the TargetRegisterClass member from CalleeSavedInfo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105344 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-02 20:02:30 +00:00
Dan Gohman
7451d3e09d
SelectionDAG shouldn't have a FunctionLoweringInfo member. RegsForValue
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shouldn't have a TargetLoweringInfo member. And FunctionLoweringInfo::set
doesn't needs its EnableFastISel argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105101 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-29 17:03:36 +00:00
Jakob Stoklund Olesen
2da5337024
Add a TargetRegisterInfo::composeSubRegIndices hook with a default
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implementation that is correct for most targets. Tablegen will override where
needed.
Add MachineOperand::subst{Virt,Phys}Reg methods that correctly handle existing
subreg indices when sustituting registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104985 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-28 18:18:53 +00:00
Jakob Stoklund Olesen
700bfada63
Add a -regalloc=default option that chooses a register allocator based on the -O
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optimization level.
This only really affects llc for now because both the llvm-gcc and clang front
ends override the default register allocator. I intend to remove that code later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104904 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-27 23:57:25 +00:00
Jakob Stoklund Olesen
1fa1c7b23b
Remove ancient prototype.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104903 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-27 23:57:19 +00:00
Jim Grosbach
a65850230a
back out 104862/104869. Can reuse stacksave after all. Very cool.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104897 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-27 23:11:57 +00:00
Jim Grosbach
ad9aaf038e
add ISD::STACKADDR to get the current stack pointer. Will be used by sjlj EH
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to update the jmpbuf in the presence of VLAs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104862 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-27 18:23:48 +00:00
Jim Grosbach
23ff7cff52
Adjust eh.sjlj.setjmp to properly have a chain and to have an opcode entry in
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ISD::. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104734 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 20:22:18 +00:00
Bill Wendling
9af7e9a1b5
Move the check for "calls setjmp" to SelectionDAGISel so that it can be used by
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more than just the stack slot coloring algorithm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104722 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 19:46:12 +00:00
Dan Gohman
93d3433579
Eliminate the use of PriorityQueue and just use a std::vector,
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implementing pop with a linear search for a "best" element. The priority
queue was a neat idea, but in practice the comparison functions depend
on dynamic information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104718 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 18:52:00 +00:00
Dan Gohman
f0f1bfe89a
Fix indentation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104717 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 18:37:48 +00:00
Eric Christopher
174e597d46
Temporarily revert r104655 as it's breaking the bots.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104664 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 01:59:55 +00:00
Dan Gohman
a4e4ffd389
Change push_all to a non-virtual function and implement it in the
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base class, since all the implementations are the same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104659 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 01:10:55 +00:00
Dan Gohman
4f98945132
Delete an unused function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104658 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 00:56:27 +00:00
Bill Wendling
be22683202
Dale and Evan suggested putting the "check for setjmp" much earlier in the
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machine code generation. That's a good idea, so I made it so.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104655 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 00:32:40 +00:00
Evan Cheng
3946043a80
Avoid adding duplicate function live-in's.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104560 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-24 21:33:37 +00:00
Evan Cheng
2457f2c661
Implement @llvm.returnaddress. rdar://8015977.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104421 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-22 01:47:14 +00:00
Jim Grosbach
5eb1951539
Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit.
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Followups: docs patch for the builtin and eh.sjlj.setjmp cleanup to match
longjmp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104419 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-22 01:06:18 +00:00
Evan Cheng
1015ba7018
- Change MachineInstr::findRegisterDefOperandIdx so it can also look for defs
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that are aliases of the specified register.
- Rename modifiesRegister to definesRegister since it's looking a def of the
specific register or one of its super-registers. It's not looking for def of a
sub-register or alias that could change the specified register.
- Added modifiesRegister to look for defs of aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104377 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 20:53:24 +00:00
Jakob Stoklund Olesen
18b2c9d3bf
Add MachineInstr::readsWritesVirtualRegister() to determine if an instruction
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reads or writes a register.
This takes partial redefines and undef uses into account.
Don't actually use it yet. That caused miscompiles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104372 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 20:02:01 +00:00
Chris Lattner
65569b8ddf
constify accessor.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104325 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 17:47:50 +00:00
Jakob Stoklund Olesen
19f5f71bba
Revert "Use MachineInstr::readsWritesVirtualRegister to determine if a register is read."
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This reverts r104322. I think it was causing miscompilations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104323 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 17:36:32 +00:00
Jakob Stoklund Olesen
00c53caa33
Use MachineInstr::readsWritesVirtualRegister to determine if a register is read.
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This correctly handles partial redefines and undef uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104322 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 16:42:30 +00:00
Jakob Stoklund Olesen
63e6a488cb
If the first definition of a virtual register is a partial redef, add an
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<imp-def> operand for the full register. This ensures that the full physical
register is marked live after register allocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104320 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 16:32:16 +00:00
Lang Hames
24cdd2f82c
Removed scaleNumbering method declaration from LiveInterval (not defined, not used).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104311 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 03:04:04 +00:00
Evan Cheng
1cc3984148
Allow targets more controls on what nodes are scheduled by reg pressure, what for latency in hybrid mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104293 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20 23:26:43 +00:00
Evan Cheng
15a16def6e
Add a hybrid bottom up scheduler that reduce register usage while avoiding
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pipeline stall. It's useful for targets like ARM cortex-a8. NEON has a lot
of long latency instructions so a strict register pressure reduction
scheduler does not work well.
Early experiments show this speeds up some NEON loops by over 30%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104216 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20 06:13:19 +00:00
Jim Grosbach
309d20c89c
Fix the post-RA instruction scheduler to handle instructions referenced by
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more than one dbg_value instruction. rdar://7759363
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104174 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19 22:57:06 +00:00
Jakob Stoklund Olesen
7ebc4d63db
Add MachineInstr::readsVirtualRegister() in preparation for proper handling of
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partial redefines.
We are going to treat a partial redefine of a virtual register as a
read-modify-write:
%reg1024:6 = OP
Unless the register is fully clobbered:
%reg1024:6 = OP, %reg1024<imp-def>
MachineInstr::readsVirtualRegister() knows the difference. The first case is a
read, the second isn't.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104149 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19 20:36:22 +00:00
mike-m
eb75870206
Fix enum to address array bounds regression.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104058 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 21:22:12 +00:00
Eric Christopher
c6177a4531
More data/parsing support for tls directives. Add a few more testcases
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and cleanup comments as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103985 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 22:53:55 +00:00
Eric Christopher
423c9e3e58
Add some section and constant support for darwin TLS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103974 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 21:02:07 +00:00
Zhongxing Xu
bae5210321
Remove unused member variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103936 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 09:47:55 +00:00
Jakob Stoklund Olesen
c66c78c684
Add reg_nodbg_iterator
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103856 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-15 02:52:58 +00:00
Bill Wendling
b92187a410
Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what
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the variable actually tracks.
N.B., several back-ends are using "HasCalls" as being synonymous for something
that adjusts the stack. This isn't 100% correct and should be looked into.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103802 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-14 21:14:32 +00:00
Evan Cheng
dbf67fefea
Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103746 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-13 23:55:47 +00:00
Dan Gohman
e6cd757e68
Teach MachineLICM and MachineSink how to clear kill flags conservatively
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when they move instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103737 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-13 20:34:42 +00:00
Dan Gohman
49b4589978
Add a utility function for conservatively clearing kill flags, and make
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use of it in MachineCSE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103726 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-13 19:24:00 +00:00
Dan Gohman
a6cb641f48
Add initial kill flag support to FastISel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103529 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-11 23:54:07 +00:00
Jakob Stoklund Olesen
82b07dc499
Simplify the tracking of used physregs to a bulk bitor followed by a transitive
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closure after allocating all blocks.
Add a few more test cases for -regalloc=fast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103500 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-11 20:30:28 +00:00
Dan Gohman
ff7a562751
Implement a bunch more TargetSelectionDAGInfo infrastructure.
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Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and
EmitTargetCodeForMemmove out of TargetLowering and into
SelectionDAGInfo to exercise this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103481 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-11 17:31:57 +00:00
Chris Lattner
7505faf225
remove a dead file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103383 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-09 17:34:13 +00:00
Dale Johannesen
0a406ae0d9
Fix PR 7087, and probably other things, by extending
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getConstantFP to accept the two supported long double
target types. This was not the original intent, but
there are other places that assume this works and it's
easy enough to do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103299 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-07 21:35:53 +00:00
Chris Lattner
eb40a0fd98
switch MCSectionCOFF from a syntactic to semantic representation,
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patch by Peter Housel!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103267 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-07 17:17:41 +00:00
Dan Gohman
a7a0ed7901
Add an "IsBottomUp" member function to FastISel, which will be used to
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support a new bottom-up mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103138 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-05 23:58:35 +00:00
Evan Cheng
3d720fbc6a
Move REG_SEQUENCE removal to 2addr pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103109 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-05 18:45:40 +00:00
Evan Cheng
3749943648
Teach liveintervalanalysis about virtual registers which are defined by reg_sequence instructions that are formed by registers defined by distinct instructions. e.g.
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80 %reg1041:6<def> = VSHRNv4i16 %reg1034<kill>, 12, pred:14, pred:%reg0
. . .
120 %reg1041:5<def> = VSHRNv4i16 %reg1039<kill>, 12, pred:14, pred:%reg0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103102 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-05 18:27:40 +00:00
Bob Wilson
4aad88d1fd
Combine the implementations of the core part of the SSAUpdater and
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MachineSSAUpdater to avoid duplicating all the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103060 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-04 23:18:19 +00:00
Dan Gohman
1fdc614bee
Factor out FastISel's code for materializing constants and other values
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in registers into a separate function to de-couple it from the
top-down-specific logic in getRegForValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102975 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-03 23:36:34 +00:00
Dan Gohman
af1d8ca44a
Get rid of the EdgeMapping map. Instead, just check for BasicBlock
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changes before doing phi lowering for switches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102809 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-01 00:01:06 +00:00
Dan Gohman
5768ea9ca1
Elaborate on a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102637 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-29 16:57:54 +00:00
Evan Cheng
2ad0fcf794
Replace r102368 with code that's less fragile. This creates DBG_VALUE instructions for function arguments early and insert them after instruction selection is done.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102554 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-28 23:08:54 +00:00
Chris Lattner
e87f7bb50e
Rework global alignment computation again. Now we do round up
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alignment of globals to the preferred alignment, but only when
there is no section specified on the global (by far the common
case).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102515 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-28 19:58:07 +00:00
Devang Patel
28ff35d030
Emit debug info for byval parameters.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102486 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-28 01:39:28 +00:00
Chris Lattner
a7b611c10d
further simplify EmitAlignment by eliminating the
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ForcedAlignBits argument, tweaking the single client of it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102484 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-28 01:08:40 +00:00
Chris Lattner
755824756c
remove a dead argument to EmitAlignment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102483 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-28 01:06:02 +00:00
Dale Johannesen
fdb42fa5fe
Add DBG_VALUE handling for byval parameters; this
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produces a comment on targets that support it, but
the Dwarf writer is not hooked up yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102372 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-26 20:06:49 +00:00
Bob Wilson
211678a0d7
Update MachineSSAUpdater with the same changes I made for the IR-level
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SSAUpdater. I'm going to try to refactor this to share most of the code
between them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102353 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-26 17:40:49 +00:00
Dan Gohman
e8c92dd439
Move FastISel's HandlePHINodesInSuccessorBlocks call down into FastISel
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itself too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102176 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-23 15:29:50 +00:00
Dan Gohman
f81eca0ab9
Move HandlePHINodesInSuccessorBlocks functions out of SelectionDAGISel
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and into SelectionDAGBuilder and FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102123 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-22 20:46:50 +00:00
Jakob Stoklund Olesen
00207237dd
Add fast register allocator, enabled with -regalloc=fast.
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So far this is just a clone of -regalloc=local that has been lobotomized to run
25% faster. It drops the least-recently-used calculations, and is just plain
stupid when it runs out of registers.
The plan is to make this go even faster for -O0 by taking advantage of the short
live intervals in unoptimized code. It should not be necessary to calculate
liveness when most virtual registers are killed 2-3 instructions after they are
born.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102006 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-21 18:02:42 +00:00
Dan Gohman
f0757b0edc
Add more const qualifiers on TargetMachine and friends.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101977 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-21 01:34:56 +00:00
Dan Gohman
5eb6d65a27
Move several SelectionDAG-independent utility functions out of the
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SelectionDAG directory and into a new Analysis.cpp file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101975 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-21 01:22:34 +00:00
Evan Cheng
30fdb5c2ac
- Clean up some crappy code which deals with coalescing of copies which look at
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extract_subreg / insert_subreg, etc.
- Add support for more aggressive insert_subreg coalescing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101971 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-21 00:44:22 +00:00
Dan Gohman
8ba3aa7f9c
Sink DebugLoc handling out of SelectionDAGISel into FastISel and
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SelectionDAGBuilder, where it doesn't have to be as complicated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101848 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20 00:48:35 +00:00
Dan Gohman
084751cd16
Remove MachineFunction's DefaultDebugLoc member, and make DwarfDebug.cpp
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responsible for figuring out what that's supposed to be on its own.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101844 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20 00:37:27 +00:00
Dan Gohman
a9a3321938
Reapply the removal of SelectionDAGISel's BB, with a fix for the case
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where multiple blocks are emitted; functions which do this need to return
the new BB so that their callers can stay current.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101843 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20 00:29:35 +00:00
Dan Gohman
68b7960c1a
Revert 101825, which is causing trouble.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101832 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-19 23:34:15 +00:00
Dan Gohman
35bb85b7ee
Eliminate SelectionDAGISel's "current block" member. Just pass it as
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an argument to things that need it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101825 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-19 22:51:14 +00:00
Dan Gohman
50d2b1ac02
Give SelectionDAG a TargetMachine too, rather than having it
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fetch one from the MachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101807 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-19 19:22:07 +00:00
Dan Gohman
55e59c1863
Code that needs a TargetMachine should have access to one directly, rather
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than just getting one through a TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101802 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-19 19:05:59 +00:00
Bill Wendling
21739c1c72
Add a "PadTo" field to the emitULEB128Bytes method. This will pad out to the
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indicated number of bytes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101684 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-18 00:51:49 +00:00
Dan Gohman
0d805c33d1
Add const qualifiers to TargetLoweringObjectFile usage.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101640 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17 16:44:48 +00:00
Dan Gohman
d858e90f03
Use const qualifiers with TargetLowering. This eliminates several
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const_casts, and it reinforces the design of the Target classes being
immutable.
SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.
And PIC16's AsmPrinter no longer uses TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101635 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17 15:26:15 +00:00
Devang Patel
f2548caaa8
Add support to emit dwarf ranges.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101575 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16 23:33:45 +00:00
Bill Wendling
47639fc5be
The JIT calls TidyLandingPads to tidy up the landing pads. However, because the
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JIT doesn't use the MC back-end asm printer to emit labels that it uses, the
section for the MCSymbol is never set. And thus the MCSymbol for the EH label
isn't marked as "defined". Because of that, TidyLandingPads removes the needed
landing pads from the JIT output. This breaks EH for every JIT program.
This is a work-around for this limitation. We pass in the label locations
map. If the label has a non-zero value, then it was "emitted" by the JIT and
TidyLandingPads shouldn't remove that label.
A nicer solution would be to mark the MCSymbol as "used" by the JIT and not rely
upon the section being set to determine if it's defined or not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101453 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16 08:46:10 +00:00
Dan Gohman
ae541aad5c
Add more const qualifiers for LLVM IR pointers in CodeGen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101342 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15 04:33:49 +00:00
Dan Gohman
46510a73e9
Add const qualifiers to CodeGen's use of LLVM IR constructs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101334 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15 01:51:59 +00:00
Dan Gohman
6465265ae1
Delete unneeeded arguments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101276 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14 20:17:22 +00:00
Dan Gohman
6a732b5a66
Delete unused arguments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101275 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14 20:05:00 +00:00
Dan Gohman
2520864773
Factor out EH landing pad code into a separate function, and constify
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a bunch of stuff to support it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101273 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14 19:53:31 +00:00
Dan Gohman
833ec1deed
Fix a missing #include.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101270 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14 18:57:18 +00:00
Dan Gohman
11609451a5
Refine #includes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101269 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14 18:49:17 +00:00
Dan Gohman
4031d59685
Split ISD::NodeType and a few related items out of SelectionDAGNodes.h
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into a separate header to allow clients to use them without pulling in
SelectionDAG-specific declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101268 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14 18:44:34 +00:00
Dan Gohman
c21a2dc8df
Delete an unused function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101263 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14 17:22:02 +00:00
Dan Gohman
441516fb3d
Trim #includes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101255 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14 16:54:39 +00:00
Dan Gohman
98708260f5
Move the code for emitting livein copies out of SelectionDAGISel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101254 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14 16:51:49 +00:00
Dan Gohman
81bf03eb5c
Eliminate MachineBasicBlock::const_livein_iterator and make
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MachineBasicBlock::livein_iterator a const_iterator, because
clients shouldn't ever be using the iterator interface to
mutate the livein set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101147 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13 16:57:55 +00:00
Dan Gohman
13e73f483e
Move MachineRegisterInfo's isLiveIn and isLiveOut out of line.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101145 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13 16:55:37 +00:00
Dan Gohman
5c982949bf
Delete an unused member variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101143 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13 16:51:39 +00:00
Bob Wilson
666f8cb9b7
Fix up header comments to match the comment fixups I made in r100849.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100869 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-09 16:24:49 +00:00
Chris Lattner
287df1bc03
delete a forwarding function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100815 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-08 21:34:17 +00:00
Chris Lattner
74aae4726a
move elf section uniquing to MCContext. Along the way
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merge XCore's section into MCSectionELF
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100812 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-08 21:26:26 +00:00
Chris Lattner
22772214de
remove the TargetLoweringObjectFileMachO::getMachoSection
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api and update clients to use MCContext instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100808 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-08 20:40:11 +00:00
Chris Lattner
f0559e4b24
move macho section uniquing from MCParser and TLOF to MCContext where
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the compiler and asmparser now unique to the same sections. This fixes
rdar://7835021.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100807 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-08 20:30:37 +00:00
Evan Cheng
a57fabe815
Coalescer should not delete copy instructions whose defs are partially dead. e.g.
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%RDI<def,dead> = MOV64rr %RAX<kill>, %EDI<imp-def>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100804 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-08 20:02:37 +00:00
Chris Lattner
1ca6531e2e
remove some unneeded errorhandling stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100703 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 22:44:07 +00:00