Commit Graph

29451 Commits

Author SHA1 Message Date
Sanjay Patel
14c1d068a3 optimize the AVX2 (integer) version of vperm2 into a shuffle
...because this is what happens when an instruction
set puts its underwear on after its pants.

This is an extension of r232852, r233100, and 233110:
http://llvm.org/viewvc/llvm-project?view=revision&revision=232852
http://llvm.org/viewvc/llvm-project?view=revision&revision=233100
http://llvm.org/viewvc/llvm-project?view=revision&revision=233110



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233127 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 22:39:29 +00:00
Philip Reames
6bde9f6994 Merge empty landing pads in SimplifyCFG
This patch tries to merge duplicate landing pads when they branch to a common shared target.

Given IR that looks like this:
lpad1:
  %exn = landingpad {i8*, i32} personality i32 (...)* @__gxx_personality_v0
         cleanup
  br label %shared_resume
lpad2:
  %exn2 = landingpad {i8*, i32} personality i32 (...)* @__gxx_personality_v0
          cleanup
  br label %shared_resume
shared_resume:
  call void @fn()
  ret void
}

We can rewrite the users of both landing pad blocks to use one of them. This will generally allow the shared_resume block to be merged with the common landing pad as well.

Without this change, tail duplication would likely kick in - creating N (2 in this case) copies of the shared_resume basic block.

Differential Revision: http://reviews.llvm.org/D8297



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233125 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 22:28:45 +00:00
Rafael Espindola
54ce82e497 Add -m -m elf_x86_64 to gold invocations.
Otherwise the tests would fail if the default was not elf_x86_64.

This fixes PR22966.

Patch by H.J. Lu!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233124 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 22:20:19 +00:00
David Blaikie
ef9962d9bb Revert "Remove an InstCombine that seems to have become redundant."
Assertion fires in compiler-rt. Guess it does fire..

This reverts commit r233116.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233121 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 21:50:35 +00:00
Rafael Espindola
45eaa023df Reset the CFA offset at the start of every FDE.
This fixes PR21515.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233120 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 21:47:31 +00:00
Peter Collingbourne
f99b7d0538 MC: Add more stringent symbol checking to test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233118 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 21:47:00 +00:00
David Blaikie
80da8623a4 Remove an InstCombine that seems to have become redundant.
Assert that this doesn't fire - I'll remove all of this later, but just
leaving it in for a while in case this is firing & we just don't have
test coverage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233116 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 21:31:31 +00:00
Sanjay Patel
5e0ce9d13a [X86, AVX] instcombine vperm2 intrinsics with zero inputs into shuffles
This is the IR optimizer follow-on patch for D8563: the x86 backend patch
that converts this kind of shuffle back into a vperm2.

This is also a continuation of the transform that started in D8486. 
In that patch, Andrea suggested that we could convert vperm2 intrinsics that
use zero masks into a single shuffle. 

This is an implementation of that suggestion.

Differential Revision: http://reviews.llvm.org/D8567



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233110 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 20:36:42 +00:00
Rafael Espindola
71be19dff2 [llvm-readobj] add support for macho universal binary.
Patch by Keyue Hu (Chilledheart)!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233107 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 20:26:55 +00:00
Hans Wennborg
f61cd8b368 Revert r233062 ""float2int": Add a new pass to demote from float to int where possible."
This caused PR23008, compiles failing with: "Use still stuck around after Def is
destroyed: %.sroa.speculated"

Also reverting follow-up r233064.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233105 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 20:07:08 +00:00
Sanjoy Das
33a864aae2 [IRCE] Fix a regression introduced in r232444.
IRCE should not try to eliminate range checks that check an induction
variable against a loop-varying length.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233101 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 19:29:18 +00:00
Sanjay Patel
fe76881930 [X86, AVX] recognize shufflevector with zero input as a vperm2 (PR22984)
vperm2x128 instructions have the special ability (aka free hardware capability)
to shuffle zero values into a vector.

This patch recognizes that type of shuffle and generates the appropriate
control byte.

https://llvm.org/bugs/show_bug.cgi?id=22984

Differential Revision: http://reviews.llvm.org/D8563



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233100 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 19:19:07 +00:00
Duncan P. N. Exon Smith
15a873a6e2 Verifier: Start recursing into !dbg attachments
The main verifier already recurses through the other entry points, so we
might as well descend here too.

This temporarily duplicates some work already done in
`verifyDebugInfo()`, but eventually I'll be removing the other side.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233095 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 17:32:19 +00:00
Daniel Sanders
06426f54cb [mips] Support 16-bit offsets for 'm' inline assembly memory constraint.
Reviewers: vkalintiris

Reviewed By: vkalintiris

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8435

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233086 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 15:19:14 +00:00
Marek Olsak
a2705bbd42 R600/SI: Select V_BFE_U32 for and+shift with a non-literal offset
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233079 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 13:40:34 +00:00
Marek Olsak
226f794fba R600/SI: Custom-select 32-bit S_BFE from bitwise opcodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233078 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 13:40:27 +00:00
Marek Olsak
945fab3447 R600/SI: Improve BFM support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233077 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 13:40:21 +00:00
Marek Olsak
3f05a5e0ad R600/SI: Use V_FRACT_F64 for faster 64-bit floor on SI
Other f64 opcodes not supported on SI can be lowered in a similar way.

v2: use complex VOP3 patterns

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233076 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 13:40:15 +00:00
Marek Olsak
91c066ae15 R600/SI: Expand fract to floor, then only select V_FRACT on CI
V_FRACT is buggy on SI.

R600-specific code is left intact.

v2: drop the multiclass, use complex VOP3 patterns

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233075 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 13:40:08 +00:00
Daniel Sanders
b1058310c1 [mips] Distinguish 'R', 'ZC', and 'm' inline assembly memory constraint.
Summary:
Previous behaviour of 'R' and 'm' has been preserved for now. They will be
improved in subsequent commits.

The offset permitted by ZC varies according to the subtarget since it is
intended to match the restrictions of the pref, ll, and sc instructions.

The restrictions on these instructions are:
* For microMIPS: 12-bit signed offset.
* For Mips32r6/Mips64r6: 9-bit signed offset.
* Otherwise: 16-bit signed offset.

Reviewers: vkalintiris

Reviewed By: vkalintiris

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8414

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233063 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 11:26:34 +00:00
James Molloy
a54c5b4489 "float2int": Add a new pass to demote from float to int where possible.
It is possible to have code that converts from integer to float, performs operations then converts back, and the result is provably the same as if integers were used.

This can come from different sources, but the most obvious is a helper function that uses floats but the arguments given at an inlined callsites are integers.

This pass considers all integers requiring a bitwidth less than or equal to the bitwidth of the mantissa of a floating point type (23 for floats, 52 for doubles) as exactly representable in floating point.

To reduce the risk of harming efficient code, the pass only attempts to perform complete removal of inttofp/fptoint operations, not just move them around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233062 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 11:15:23 +00:00
Simon Pilgrim
fa17ce8b6e [SelectionDAG] Fixed issue with uitofp vector constant folding being treated as sitofp
While the uitofp scalar constant folding treats an integer as an unsigned value (from lang ref):

%X = sitofp i8 -1 to double ; yields double:-1.0
%Y = uitofp i8 -1 to double ; yields double:255.0

The vector constant folding was always using sitofp:

%X = sitofp <2 x i8> <i8 -1, i8 -1> to <2 x double> ; yields <double -1.0, double -1.0>
%Y = uitofp <2 x i8> <i8 -1, i8 -1> to <2 x double> ; yields <double -1.0, double -1.0>

This patch fixes this so that the correct opcode is used for sitofp and uitofp.

%X = sitofp <2 x i8> <i8 -1, i8 -1> to <2 x double> ; yields <double -1.0, double -1.0>
%Y = uitofp <2 x i8> <i8 -1, i8 -1> to <2 x double> ; yields <double 255.0, double 255.0>

Differential Revision: http://reviews.llvm.org/D8560

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233033 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-23 22:44:55 +00:00
Duncan P. N. Exon Smith
7ad96398c6 DebugInfo: Overload get() in DIDescriptor subclasses
Continue to simplify the `DIDescriptor` subclasses, so that they behave
more like raw pointers.  Remove `getRaw()`, replace it with an
overloaded `get()`, and overload the arrow and cast operators.  Two
testcases started to crash on the arrow operators with this change
because of `scope:` references that weren't real scopes.  I fixed them.
Soon I'll add verifier checks for them too.

This also adds explicit dereference operators.  Previously, the builtin
dereference against `operator MDNode *()` would have worked, but now the
builtins are ambiguous.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233030 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-23 21:54:07 +00:00
Rafael Espindola
79cd79b1e6 Refactor how passes get a symbol at the end of a section.
There is now a canonical symbol at the end of a section that different
passes can request.

This also allows us to assert that we don't switch back to a section whose
end symbol has already been printed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233026 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-23 21:22:04 +00:00
Ahmed Bougacha
c9ad3ab624 [AArch64, ARM] Enable GlobalMerge with -O3 rather than -O1.
The pass used to be enabled by default with CodeGenOpt::Less (-O1).
This is too aggressive, considering the pass indiscriminately merges
all globals together.

Currently, performance doesn't always improve, and, on code that uses
few globals (e.g., the odd file- or function- static), more often than
not is degraded by the optimization.  Lengthy discussion can be found
on llvmdev (AArch64-focused;  ARM has similar problems):
  http://lists.cs.uiuc.edu/pipermail/llvmdev/2015-February/082800.html
Also, it makes tooling and debuggers less useful when dealing with
globals and data sections.

GlobalMerge needs to better identify those cases that benefit, and this
will be done separately.  In the meantime, move the pass to run with
-O3 rather than -O1, on both ARM and AArch64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233024 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-23 21:17:36 +00:00
Chad Rosier
e07ca14413 [AArch64] Add FileCheck that was missing from test in r232967.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233013 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-23 20:25:15 +00:00
Matt Arsenault
59a5e979b5 R600/SI: Allow commuting compares
This enables very common cases to switch to the
smaller encoding.

All of the standard LLVM canonicalizations of comparisons
are the opposite of what we want. Compares with constants
are moved to the RHS, but the first operand can be an inline
immediate, literal constant, or SGPR using the 32-bit VOPC
encoding.

There are additional bad canonicalizations that should
also be fixed, such as canonicalizing ge x, k to gt x, (k + 1)
if this makes k no longer an inline immediate value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232988 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-23 18:45:30 +00:00
Chad Rosier
c1813d8fe1 [AArch64] Enable rematerialization of float 0 values.
Patch by Geoff Berry<gberry@codeaurora.org>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232967 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-23 17:19:34 +00:00
Bradley Smith
a75fecc370 Revert "[ARM] Add more pattern matching for f16 <-> f64 conversions"
This change is incorrect since it converts double rounding into single rounding,
which can produce different results. Instead this optimization will be done by
modifying Clang's codegen to not produce double rounding in the first place.

This reverts commit r232954.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232962 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-23 16:52:52 +00:00
Tom Stellard
fd58f22744 R600/SI: Fix crash in SIInstrInfo::areLoadsFromSameBasePtr()
This function assumed that SMRD instructions always have immediate
offsets, which is not always the case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232957 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-23 16:06:01 +00:00
Bradley Smith
de5be4657f [ARM] Add more pattern matching for f16 <-> f64 conversions
Specifically when the conversion is done in two steps, f16 -> f32 -> f64.

For example:

%1 = tail call float @llvm.convert.from.fp16.f32(i16 %0)
%conv = fpext float %1 to double

to:

vcvtb.f64.f16


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232954 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-23 15:59:54 +00:00
Petar Jovanovic
15863e5e5f Fix sign extension for MIPS64 in makeLibCall function
Fixing sign extension in makeLibCall for MIPS64. In MIPS64 architecture all
32 bit arguments (int, unsigned int, float 32 (soft float)) must be sign
extended. This fixes test "MultiSource/Applications/oggenc/".

Patch by Strahinja Petrovic.

Differential Revision: http://reviews.llvm.org/D7791


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232943 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-23 12:28:13 +00:00
Hal Finkel
e86dbbf058 [SDAG] Don't widen VSETCC during type legalization for split operands
Because the operands of a vector SETCC node can be of a different type from the
result (and often are), it can happen that even if we'd prefer to widen the
result type of the SETCC, the operands have been split instead. In this case,
the SETCC result also must be split. This mirrors what is done in
WidenVecRes_SELECT, and should be NFC elsewhere because if the operands are not
widened the following calls to GetWidenedVector will assert (which is what was
happening in the test case).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232935 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-23 08:22:43 +00:00
Lang Hames
858c62e51e [Orc] Add missing -use-orcmcjit flag to a number of Orc regression tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232931 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-23 06:02:49 +00:00
Duncan P. N. Exon Smith
031fbaeb29 Prevent CHECK-NOTs from matching file paths
A build directory with a name like `build-Werror` would hit a false
positive on these `CHECK-NOT`s before, since the actual error line looks
like:

    .../build-Werror/bin/llvm-as <stdin>:1:2: error: ...

Switch to using:

    CHECK-NOT: error:

(note the trailing semi-colon) to avoid matching almost any file path.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232917 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-22 15:58:21 +00:00
Benjamin Kramer
42a84b54bf [SimplifyLibCalls] Fix negative shifts being produced by the memchr -> bitfield transform.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232903 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-21 22:04:26 +00:00
Benjamin Kramer
fd48a80e14 [SimplifyLibCalls] Turn memchr(const, C, const) into a bitfield check.
strchr("123!", C) != nullptr is a common pattern to check if C is one
of 1, 2, 3 or !. If the largest element of the string is smaller than
the target's register size we can easily create a bitfield and just
do a simple test for set membership.

int foo(char C) { return strchr("123!", C) != nullptr; } now becomes

	cmpl	$64, %edi ## range check
	sbbb	%al, %al
	movabsq	$0xE000200000001, %rcx
	btq	%rdi, %rcx ## bit test
	sbbb	%cl, %cl
	andb	%al, %cl ## and the two conditions
	andb	$1, %cl
	movzbl	%cl, %eax ## returning an int
	ret

(imho the backend should expand this into a series of branches, but
that's a different story)

The code is currently limited to bit fields that fit in a register, so
usually 64 or 32 bits. Sadly, this misses anything using alpha chars
or {}. This could be fixed by just emitting a i128 bit field, but that
can generate really ugly code so we have to find a better way. To some
degree this is also recreating switch lowering logic, but we can't
simply emit a switch instruction and thus change the CFG within
instcombine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232902 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-21 21:09:33 +00:00
Matt Arsenault
2bb644f469 R600: Cleanup test with multiple check prefixes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232901 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-21 19:15:46 +00:00
Benjamin Kramer
4b74df7229 SimplifyLibCalls: Add basic optimization of memchr calls.
This is just memchr(x, y, 0) -> nullptr and constant folding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232896 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-21 15:36:21 +00:00
Simon Pilgrim
c58f32d981 Tidied up vec_zero_cse.ll test. NFCI.
Added target triple and refactored the CHECKs to be per function.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232894 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-21 14:05:12 +00:00
David Majnemer
ac5b42cad8 MemoryDependenceAnalysis: Don't miscompile atomics
r216771 introduced a change to MemoryDependenceAnalysis that allowed it
to reason about acquire/release operations.  However, this change does
not ensure that the acquire/release operations pair.  Unfortunately,
this leads to miscompiles as we won't see an acquire load as properly
memory effecting.  This largely reverts r216771.

This fixes PR22708.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232889 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-21 06:19:17 +00:00
Tim Northover
048ca17f6e AArch64: simplify test case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232886 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-21 04:37:08 +00:00
Eric Christopher
ae6fc14d54 Remove the bare getSubtargetImpl call from the AArch64 port. As part
of this add a test that shows we can generate code for functions
that specifically enable a subtarget feature.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232884 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-21 04:04:50 +00:00
Eric Christopher
bc473edd7b Remove the bare getSubtargetImpl call from the PPC port. As part
of this add a test that shows we can generate code with
for functions that differ by subtarget feature.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232882 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-21 03:36:02 +00:00
Eric Christopher
6f125f52d3 Cache the Function dependent subtarget on the MachineFunction.
As preparation for removing the getSubtargetImpl() call from
TargetMachine go ahead and flip the switch on caching the function
dependent subtarget and remove the bare getSubtargetImpl call
from the X86 port. As part of this add a few tests that show we
can generate code and assemble on X86 based on features/cpu on
the Function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232879 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-21 03:13:10 +00:00
Kostya Serebryany
a1ea57a185 [sanitizer] experimental tracing for cmp instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232873 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-21 01:29:36 +00:00
Ahmed Bougacha
995f4f8fd1 [CodeGen][IfCvt] Don't re-ifcvt blocks with unanalyzable terminators.
If we couldn't analyze its terminator (i.e., it's an indirectbr, or some
other weirdness), we can't safely re-if-convert a predicated block,
because we can't tell whether the predicated terminator can
fallthrough (it does).

Currently, we would completely ignore the fallthrough successor. In
the added testcase, this means we used to generate:

    ...
  @ %entry:
    cmp   r5, #21
    ittt  ne
  @ %cc1f:
    cmpne r7, #42
  @ %cc2t:
    strne.w       r5, [r8]
    movne pc, r10
  @ %cc1t:
    ...

Whereas the successor of %cc1f was originally %bb1.
With the fix, we get the correct:

    ...
  @ %entry:
    cmp   r5, #21
    itt   eq
  @ %cc1t:
    streq.w       r5, [r11]
    moveq pc, r0
  @ %cc1f:
    cmp   r7, #42
    itt   ne
  @ %cc2t:
    strne.w       r5, [r8]
    movne pc, r10
  @ %bb1:
    ...

rdar://20192768
Differential Revision: http://reviews.llvm.org/D8509


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232872 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-21 01:23:15 +00:00
Ahmed Bougacha
165bd1733b [AArch64] Prefer UZP for concat_vector of illegal truncs.
Follow-up to r232459: prefer a UZP shuffle to the intermediate truncs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232871 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-21 01:08:39 +00:00
Yunzhong Gao
2c11db2e64 Tell lit.cfg about more Windows triples.
For example, the host triple on my 64-bit PC is x86_64-pc-windows-msvc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232854 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-20 22:08:40 +00:00
Sanjay Patel
be9ee96926 [X86, AVX] instcombine common cases of vperm2* intrinsics into shuffles
vperm2* intrinsics are just shuffles. 
In a few special cases, they're not even shuffles.

Optimizing intrinsics in InstCombine is better than
handling this in the front-end for at least two reasons:

1. Optimizing custom-written SSE intrinsic code at -O0 makes vector coders
   really angry (and so I have regrets about some patches from last week).

2. Doing mask conversion logic in header files is hard to write and 
   subsequently read.

There are a couple of TODOs in this patch to complete this optimization.

Differential Revision: http://reviews.llvm.org/D8486



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232852 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-20 21:47:56 +00:00
Andrew Kaylor
e0e1c1d94d Fixing a bug with WinEH PHI handling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232851 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-20 21:42:54 +00:00
Sanjay Patel
39110ecd35 [X86] Prefer blendps over insertps codegen for one special case
With this patch, for this one exact case, we'll generate:

  blendps %xmm0, %xmm1, $1

instead of:

  insertps %xmm0, %xmm1, $0

If there's a memory operand available for load folding and we're
optimizing for size, we'll still generate the insertps.

The detailed performance data motivation for this may be found in D7866; 
in summary, blendps has 2-3x throughput vs. insertps on widely used chips.

Differential Revision: http://reviews.llvm.org/D8332



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232850 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-20 21:19:52 +00:00
Rafael Espindola
d80979b25d Don't declare all text sections at the start of the .s
The code this patch removes was there to make sure the text sections went
before the dwarf sections. That is necessary because MachO uses offsets
relative to the start of the file, so adding a section can change relaxations.

The dwarf sections were being printed at the start just to produce symbols
pointing at the start of those sections.

The underlying issue was fixed in r231898. The dwarf sections are now printed
when they are about to be used, which is after we printed the text sections.

To make sure we don't regress, the patch makes the MachO streamer assert
if CodeGen puts anything unexpected after the DWARF sections.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232842 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-20 20:00:01 +00:00
Duncan P. N. Exon Smith
e9994ab8a7 Bugpoint: Fix invalid 'inlinedAt:' references in testcase
These are causing crashes in `DebugInfoFinder` after a WIP patch to
increase strictness of `DIDescriptor` accessors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232839 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-20 19:51:34 +00:00
Rafael Espindola
82759c6cac Reorganize the x86 ELF relocation selection logic.
The main differences are:

* Split in 32 and 64 bit functions.
* First switch on the Modifier so that we have only one non fully covered
  switch.
* Map the fixup kind first to a x86_64 (or i386) specific enum, to make
  it easy to handle cases like X86::reloc_riprel_4byte_movq_load.
* Switch on IsPCRel last, which reduces code duplication.

Fixes pr22308.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232837 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-20 19:48:54 +00:00
Duncan P. N. Exon Smith
d94d5bbbf9 Verifier: Check that !dbg attachments have the right type
A WIP patch makes `DIDescriptor` accessors more strict, which in turn
causes the `DebugInfoFinder` to crash on wrongly typed `!dbg`
attachments.  Catch that error up front in
`Verifier::visitInstruction()`.

Also remove a test that we "handle" invalid `!dbg` attachments, added
back in r99938.  We don't want to handle those anymore.

Note: I'm *not* recursing and verifying the debug info graph reachable
from this node; that work is already done by `verifyDebugInfo()`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232834 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-20 19:26:58 +00:00
Duncan P. N. Exon Smith
1188480049 Rewrite test/Feature/md_on_instruction.ll
This test is supposed to be testing whether metadata attachments to
instructions work, but it was using invalid debug info to do so.  (This
was causing assertion failures in the `DebugInfoFinder` with a WIP patch
to be more strict about `DIDescriptor` accessors.)

Rather than fix the debug info -- which is better tested elsewhere --
just test the IR feature directly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232828 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-20 18:34:53 +00:00
Wei Mi
8979e3f69b Correctly estimate SROA savings for store operands in inline cost analysis.
When estimating SROA savings, we want to see if an address is derived
off an alloca in the caller. For store instructions, operand 1 is the
address operand, but the current code uses operand 0.  Use
getPointerOperand for loads and stores to fix this.

Patch by Easwaran Raman.
http://reviews.llvm.org/D8425


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232827 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-20 18:33:12 +00:00
John Brawn
151a5da534 [ARM] Fix handling of thumb1 out-of-range frame offsets
LocalStackSlotPass assumes that isFrameOffsetLegal doesn't change its
answer when the base register changes. Unfortunately this isn't true
in thumb1, where SP-based loads allow a larger offset than
non-SP-based loads, and this causes the base register reuse code to
generate instructions that are unencodable, causing an assertion
failure. 

Solve this by adding a BaseReg parameter to isFrameOffsetLegal, which
ARMBaseRegisterInfo can then make use of to give the correct answer. 

Differential Revision: http://reviews.llvm.org/D8419


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232825 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-20 17:20:07 +00:00
Daniel Jasper
70b146b25e [MBP] Don't outline short optional branches
With the option -outline-optional-branches, LLVM will place optional
branches out of line (more details on r231230).

With this patch, this is not done for short optional branches. A short
optional branch is a branch containing a single block with an
instruction count below a certain threshold (defaulting to 3). Still
everything is guarded under -outline-optional-branches).

Outlining a short branch can't significantly improve code locality. It
can however decrease performance because of the additional jmp and in
cases where the optional branch is hot. This fixes a compile time
regression I have observed in a benchmark.

Review: http://reviews.llvm.org/D8108

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232802 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-20 10:00:37 +00:00
Tom Stellard
4aee931a46 R600/SI: Add missing CHECK-LABEL lines to a test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232797 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-20 03:12:42 +00:00
Nick Lewycky
bea9b06e84 When simplifying a SCEV truncate by distributing, consider it a simplification to replace a cast, even if we end up with a trunc around the term. Fixes PR22960!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-20 02:25:00 +00:00
Peter Collingbourne
aa01400663 test: Make a start on a test suite for libLTO.
This works in a similar way to the gold plugin tests. We search for a compatible
linker on $PATH and use it to run tests against our just-built libLTO. To start
with, test the just added opt level functionality.

Differential Revision: http://reviews.llvm.org/D8472

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232785 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 23:55:38 +00:00
Owen Anderson
8154ef7589 Fix a nasty bug in DAGCombine of STORE nodes.
This is very related to the bug fixed in r174431.  The problem is that
SelectionDAG does not include alignment in the uniquing of loads and
stores.  When an otherwise no-op DAGCombine would increase the alignment
of a load or store, the original node would be returned (with the
alignment increased), which would cause the node not to be processed by
any further DAGCombines.

I don't have a direct testcase for this that manifests on an in-tree
target, but I did see some noise in the tests for other targets and have
updated them for it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232780 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 22:48:57 +00:00
Reid Kleckner
c39212a2fc WinEH: Make llvm.eh.actions emission match the EH docs
This switches the sense of the i32 values and updates the test cases.

We can also use CHECK-SAME to clean up some tests, and reduce the visual
noise from bitcasts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232774 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 22:31:02 +00:00
Sanjay Patel
11d77223a5 [X86, AVX] use blends instead of insert128 with index 0
Another case of x86-specific shuffle strength reduction:
avoid generating insert*128 instructions with index 0 because
they are slower than their non-lane-changing blend equivalents.

Shuffle lowering already catches most of these cases, but
the zero vector case and some other paths such as in the
modified test in vector-shuffle-256-v32.ll were getting
through.

Differential Revision: http://reviews.llvm.org/D8366


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232773 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 22:29:40 +00:00
Peter Collingbourne
58e8e3505d LowerBitSets: Avoid reusing byte set addresses.
Each use of the byte array uses a different alias. This makes the
backend less likely to reuse previously computed byte array addresses,
improving the security of the CFI mechanism based on this pass.

Differential Revision: http://reviews.llvm.org/D8455

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232770 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 22:02:10 +00:00
Peter Collingbourne
416d8ecf80 libLTO, llvm-lto, gold: Introduce flag for controlling optimization level.
This change also introduces a link-time optimization level of 1. This
optimization level runs only the globaldce pass as well as cleanup passes for
passes that run at -O0, specifically simplifycfg which cleans up lowerbitsets.

http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20150316/266951.html

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232769 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 22:01:00 +00:00
Krzysztof Parzyszek
8962c01fbf Unxfail test/CodeGen/Generic/vector.ll now passing on Hexagon
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232758 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 20:22:17 +00:00
Peter Collingbourne
5e86804089 gold: Make powerpc support optional for the tests.
Differential Revision: http://reviews.llvm.org/D8400

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232744 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 18:23:31 +00:00
Artem Belevich
97f4d01ee1 Add support for __nvvm_reflect changes in libdevice in CUDA-7.0
Summary:
CUDA 7.0's libdevice uses slightly different IR to call __nvvm_reflect
and that triggers an assertion in nvvm_reflect optimization pass. This
change allows nvvm_reflect pass to deal with both old and new ways to
pass an argument to __nvvm_reflect.

Test Plan: ninja check-all

Reviewers: eliben, echristo

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D8399

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232732 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 17:05:35 +00:00
Krzysztof Parzyszek
07121ea974 [Hexagon] Add support for vector instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232728 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 16:33:08 +00:00
Daniel Jasper
3baea2951d [InstCombine] Don't fold a GEP into itself through a PHI node
This can only occur (I think) through the back-edge of the loop.

However, folding a GEP into itself means that the value of the previous
iteration needs to be stored in the meantime, thus requiring an
additional register variable to be live, but not actually achieving
anything (the gep still needs to be executed once per loop iteration).

The attached test case is derived from:
  typedef unsigned uint32;
  typedef unsigned char uint8;
  inline uint8 *f(uint32 value, uint8 *target) {
    while (value >= 0x80) {
      value >>= 7;
      ++target;
    }
    ++target;
    return target;
  }
  uint8 *g(uint32 b, uint8 *target) {
    target = f(b, f(42, target));
    return target;
  }

What happens is that the GEP stored in incptr2 is folded into itself
through the loop's back-edge and the phi-node stored in loopptr,
effectively incrementing the ptr by "2" in each iteration instead of "1".

In this case, it is actually increasing the number of GEPs required as
the GEP before the loop can't be folded away anymore. For comparison:

With this patch:
  define i8* @test4(i32 %value, i8* %buffer) {
  entry:
    %cmp = icmp ugt i32 %value, 127
    br i1 %cmp, label %loop.header, label %exit

  loop.header:                                      ; preds = %entry
    br label %loop.body

  loop.body:                                        ; preds = %loop.body, %loop.header
    %buffer.pn = phi i8* [ %buffer, %loop.header ], [ %loopptr, %loop.body ]
    %newval = phi i32 [ %value, %loop.header ], [ %shr, %loop.body ]
    %loopptr = getelementptr inbounds i8, i8* %buffer.pn, i64 1
    %shr = lshr i32 %newval, 7
    %cmp2 = icmp ugt i32 %newval, 16383
    br i1 %cmp2, label %loop.body, label %loop.exit

  loop.exit:                                        ; preds = %loop.body
    br label %exit

  exit:                                             ; preds = %loop.exit, %entry
    %0 = phi i8* [ %loopptr, %loop.exit ], [ %buffer, %entry ]
    %incptr3 = getelementptr inbounds i8, i8* %0, i64 2
    ret i8* %incptr3
  }

Without this patch:
  define i8* @test4(i32 %value, i8* %buffer) {
  entry:
    %incptr = getelementptr inbounds i8, i8* %buffer, i64 1
    %cmp = icmp ugt i32 %value, 127
    br i1 %cmp, label %loop.header, label %exit

  loop.header:                                      ; preds = %entry
    br label %loop.body

  loop.body:                                        ; preds = %loop.body, %loop.header
    %0 = phi i8* [ %buffer, %loop.header ], [ %loopptr, %loop.body ]
    %loopptr = phi i8* [ %incptr, %loop.header ], [ %incptr2, %loop.body ]
    %newval = phi i32 [ %value, %loop.header ], [ %shr, %loop.body ]
    %shr = lshr i32 %newval, 7
    %incptr2 = getelementptr inbounds i8, i8* %0, i64 2
    %cmp2 = icmp ugt i32 %newval, 16383
    br i1 %cmp2, label %loop.body, label %loop.exit

  loop.exit:                                        ; preds = %loop.body
    br label %exit

  exit:                                             ; preds = %loop.exit, %entry
    %ptr2 = phi i8* [ %incptr2, %loop.exit ], [ %incptr, %entry ]
    %incptr3 = getelementptr inbounds i8, i8* %ptr2, i64 1
    ret i8* %incptr3
  }

Review: http://reviews.llvm.org/D8245

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232718 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 11:05:08 +00:00
Rafael Espindola
2c275b1f80 Note that we don't support COFF on PPC.
Should bring back the windows bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232701 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 02:40:56 +00:00
Justin Bogner
cc690d62e3 llvm-cov: Only emit colour by default if the output is a tty
This replaces the -no-color flag with a -color={auto|always|never}
option, with auto as the default, which is much saner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232693 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 00:02:23 +00:00
Simon Pilgrim
4c38456ead Fixed failing test due to missing target triple causing different results on different buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232685 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 22:51:45 +00:00
Rafael Espindola
b354ef31cf Teach getDefaultFormat that we only support ELF on some architectures.
This should bring the windows bots back.

It is a bit ugly, but it is better than what we had before: The triple would
say that the object format was COFF, but llc/llvm-mc would produce an ELF.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232683 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 22:19:16 +00:00
Simon Pilgrim
ab18d0e7cb [X86][SSE] Avoid scalarization of v2i64 vector shifts (REAPPLIED)
Fixed broken tests.

Differential Revision: http://reviews.llvm.org/D8416

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232682 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 22:18:51 +00:00
Eric Christopher
3932b367d7 Revert "[X86][SSE] Avoid scalarization of v2i64 vector shifts" as it
appears to have broken tests/bots.

This reverts commit r232660.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232670 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 21:01:00 +00:00
Reid Kleckner
01a1af4fe4 Use WinEHPrepare to outline SEH finally blocks
No outlining is necessary for SEH catch blocks. Use the blockaddr of the
handler in place of the usual outlined function.

Reviewers: majnemer, andrew.w.kaylor

Differential Revision: http://reviews.llvm.org/D8370

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232664 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 20:26:53 +00:00
Simon Pilgrim
0ee70a1554 [X86][SSE] Avoid scalarization of v2i64 vector shifts
Currently v2i64 vectors shifts (non-equal shift amounts) are scalarized, costing 4 x extract, 2 x x86-shifts and 2 x insert instructions - and it gets even more awkward on 32-bit targets.

This patch separately shifts the vector by both shift amounts and then shuffles the partial results back together, costing 2 x shuffles and 2 x sse-shifts instructions (+ 2 movs on pre-AVX hardware).

Note - this patch only improves the SHL / LSHR logical shifts as only these are supported in SSE hardware.

Differential Revision: http://reviews.llvm.org/D8416

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232660 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 19:35:31 +00:00
Matthias Braun
8b41add6ca TableGen: Fix register class lane masks being too conservative.
When calculating the lanemask of a register class we have to include the
masks of subregisters supported by any of the class members, not just
the ones supported by all class members.

This fixes problems when coalescing towards a subclass with additional
subregisters available.

The attached testcase works fine as is, but does crash if you enable
subregister liveness on x86 without this change applied.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232652 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 17:56:09 +00:00
Rafael Espindola
df600f8049 Handle X86::reloc_riprel_4byte in 32 bits mode.
We can get there with .code64.

Fixes pr22349.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232651 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 17:33:40 +00:00
Sanjay Patel
22a94d59d9 Use utils/update_llc_test_checks.py to update all CHECKs
The checks here were so vague that we could nuke intrinsics
from existence and still pass the test because we'd match
the function name.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232647 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 16:38:44 +00:00
Krzysztof Parzyszek
f795de029a [Hexagon] Intrinsics for circular and bit-reversed loads and stores
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232645 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 16:23:44 +00:00
Sanjay Patel
4795cb202c fixed to test features, not CPU model
The 'vmovntdq' was only passing due to a fluke in
SandyBridge codegen that splits 32-byte stores in half, 
but that meant that the test was not correctly checking
for the 32-byte store that we thought we were generating.

The lax checking in this file will be addressed in
another commit. There are bigger problems here.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232644 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 16:07:10 +00:00
Krzysztof Parzyszek
d5cb4a90e5 [Hexagon] Handle ENDLOOP0 in InsertBranch and RemoveBranch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232643 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 15:56:43 +00:00
Sid Manning
b243a3a556 Add support for .ifnes psuedo-op.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232636 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 14:20:54 +00:00
Daniel Jasper
bf2e6a6be2 Change test to accept an additional critical edge split.
The two hot blocks are right next to each other and I verified that
there is no performance regression by compressing/uncompressing some
files with a minigzip built with the different options.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232629 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 12:45:45 +00:00
John Brawn
0328ca6cd7 [ARM] Align stack objects passed to memory intrinsics
Memcpy, and other memory intrinsics, typically tries to use LDM/STM if
the source and target addresses are 4-byte aligned. In CodeGenPrepare
look for calls to memory intrinsics and, if the object is on the
stack, 4-byte align it if it's large enough that we expect that memcpy
would want to use LDM/STM to copy it.

Differential Revision: http://reviews.llvm.org/D7908


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232627 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 12:01:59 +00:00
John Brawn
bf60cd0751 Add missing newline to end of test file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232626 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 10:45:12 +00:00
Josh Magee
cbaefea0c0 Add testcases for BEXTR.
These BEXTR cases are a check for the 64-bit load form and two negative cases where the bitrange is non-contiguous.  From a private patch equivalent to r189742/PR17028.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232580 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 01:34:06 +00:00
Krzysztof Parzyszek
dbe964d3a6 Missed testcase for r232577
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232578 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 00:44:46 +00:00
Sanjoy Das
e027d74733 [SCEV] Make isImpliedCond smarter.
Summary:
This change teaches isImpliedCond to infer things like "X sgt 0" => "X -
1 sgt -1".  The `ConstantRange` class has the logic to do the heavy
lifting, this change simply gets ScalarEvolution to exploit that when
reasonable.

Depends on D8345

Reviewers: atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8346

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232576 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 00:41:29 +00:00
David Majnemer
8f01b96d93 DAGCombiner: fold (xor (shl 1, x), -1) -> (rotl ~1, x)
Targets which provide a rotate make it possible to replace a sequence of
(XOR (SHL 1, x), -1) with (ROTL ~1, x).  This saves an instruction on
architectures like X86 and POWER(64).

Differential Revision: http://reviews.llvm.org/D8350

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232572 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 00:03:36 +00:00
David Majnemer
7605cdd6e4 COFF: Let globals with private linkage reside in their own section
COFF COMDATs (for selection kinds other than 'select any') require at
least one non-section symbol in the symbol table.
Satisfy this by morally enhancing the linkage from private to internal.

Differential Revision: http://reviews.llvm.org/D8394

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232570 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 23:54:51 +00:00
Pirama Arumuga Nainar
5e15d64948 Fix bug while building FP16 constant vectors for AArch64
Summary: Building FP16 constant vectors caused the FP16 data to be bitcast to i64.  This patch creates a BITCAST node with the correct value, and adds a test to verify correct handling.

Reviewers: mcrosier

Reviewed By: mcrosier

Subscribers: mcrosier, jmolloy, ab, srhines, llvm-commits, rengolin, aemerson

Differential Revision: http://reviews.llvm.org/D8369

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232562 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 23:10:29 +00:00
Kevin Enderby
ba5a585242 Add the option -no-symbolic-operands to llvm-objdump used with -macho and
-disassemble to not symbolic operands when disassembling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232558 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 22:26:11 +00:00
Rafael Espindola
7e4820c1a6 Emit the offset directly instead of creating a dummy expression.
We were creating an expression of the form (S+C)-S which is just C.

Patch by Frédéric Riss. I just added the testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232549 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 21:30:21 +00:00
Kevin Enderby
17913067f5 Add the option, -no-leading-addr llvm-objdump used with -macho and
-disassemble or -section to not print the leading addresses on each line.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232547 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 21:07:39 +00:00
David Majnemer
76d3a99d10 Revert "COFF: Let globals with private linkage reside in their own section"
This reverts commit r232539.  This was committed accidently.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232543 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 20:41:11 +00:00
David Majnemer
6526150f82 COFF: Let globals with private linkage reside in their own section
Summary:
COFF COMDATs (for selection kinds other than 'select any') require at
least one non-section symbol in the symbol table.
Satisfy this by morally enhancing the linkage from private to internal.

Reviewers: rafael

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8374

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232539 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 20:39:25 +00:00
Rafael Espindola
b415e6b2f2 Centralize the handling of unique ids for temporary labels.
Before this patch code wanting to create temporary labels for a given entity
(function, cu, exception range, etc) had to keep its own counter to have stable
symbol names.

createTempSymbol would still add a suffix to make sure a new symbol was always
returned, but it kept a single counter. Because of that, if we were to use
just createTempSymbol("cu_begin"), the label could change from cu_begin42 to
cu_begin43 because some other code started using temporary labels.

Simplify this by just keeping one counter per prefix and removing the various
specialized counters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232535 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 20:07:06 +00:00
Michael Zolotukhin
5850602050 TLI: Add addVectorizableFunctionsFromVecLib.
Also, add several entries to vectorizable functions table, and
corresponding tests. The table isn't complete, it'll be populated later.

Review: http://reviews.llvm.org/D8131

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232531 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 19:50:55 +00:00
Michael Zolotukhin
6e046d3810 TTI: Honour cost model for estimating cost of vector-intrinsic and calls.
Review: http://reviews.llvm.org/D8096

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232528 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 19:37:28 +00:00
Richard Barton
b59aee170f [ARM] Fix offset calculation in ARMBaseRegisterInfo::needsFrameBaseReg
The input offset to needsFrameBaseReg is a negative value below the top of the
stack frame, but when converting to a positive offset from the bottom of the
stack frame this value was negated, causing the final offset to be too large
by twice the input offset's magnitude. Fix that by not negating the offset.

Patch by John Brawn

Differential Revision: http://reviews.llvm.org/D8316

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232513 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 18:20:47 +00:00
Michael Liao
de3983775e [SwitchLowering] Remove incoming values in the reverse order
- To prevent invalidating *successive* indices.
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232510 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 18:03:10 +00:00
Kevin Enderby
73cd697dec Add the option, -dis-symname to llvm-objdump used with -macho and
-disassemble to disassemble just one symbol’s instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232503 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 17:10:57 +00:00
Dmitry Vyukov
6e4a97dfce asan: optimization experiments
The experiments can be used to evaluate potential optimizations that remove
instrumentation (assess false negatives). Instead of completely removing
some instrumentation, you set Exp to a non-zero value (mask of optimization
experiments that want to remove instrumentation of this instruction).
If Exp is non-zero, this pass will emit special calls into runtime
(e.g. __asan_report_exp_load1 instead of __asan_report_load1). These calls
make runtime terminate the program in a special way (with a different
exit status). Then you run the new compiler on a buggy corpus, collect
the special terminations (ideally, you don't see them at all -- no false
negatives) and make the decision on the optimization.

The exact reaction to experiments in runtime is not implemented in this patch.
It will be defined and implemented in a subsequent patch.

http://reviews.llvm.org/D8198



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232502 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 16:59:19 +00:00
Samuel Antao
7684e7d987 Fix R0 use in PowerPC VSX store for FastIsel.
The VSX stores are sometimes generated with a undefined index register, causing %noreg to be used and R0 to be emitted later on. The semantics of the VSX store (e.g. stdsdx) requires R0 to be used as base if we want zero to be used in the computation of the effective address instead of the content of R0. This patch checks if no index register was generated and forces R0 to be used as base address.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232486 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 15:00:57 +00:00
Rafael Espindola
cebed4aaf1 Use createTempSymbol to avoid collisions instead of an ad hoc method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232483 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 14:50:32 +00:00
Rafael Espindola
99739705ac Call EmitFunctionHeader just before EmitFunctionBody.
This avoids switching to .AMDGPU.config and back and hardcoding the
section it switches back to.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232479 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 14:34:42 +00:00
Rafael Espindola
a480f88b3c Move the EH symbol to the asm printer and use it for the SJLJ case too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232475 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 13:57:48 +00:00
Toma Tabacu
f28b151b52 [mips] [IAS] Add support for the XOR $reg,imm pseudo-instruction.
Summary:
This adds a MipsInstAlias which expands to XORi $reg,$reg,imm. For example, "xor $6, 0x3A" should be expanded to "xori $6, $6, 58".
This should work for all MIPS ISAs.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8284

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232473 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 13:17:44 +00:00
Rafael Espindola
4d3df54336 Replace a use of GetTempSymbol with createTempSymbol.
This is cleaner and avoids a crash in a corner case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232471 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 12:54:04 +00:00
Renato Golin
ce1f16421f [ARM] Add support for ARMV6K subtarget (LLVM)
ARMv6K is another layer between ARMV6 and ARMV6T2. This is the LLVM
side of the changes.

ARMV6 family LLVM implementation.

+-------------------------------------+
| ARMV6                               |
+----------------+--------------------+
| ARMV6M (thumb) | ARMV6K (arm,thumb) | <- From ARMV6K and ARMV6M processors
+----------------+--------------------+    have support for hint instructions
| ARMV6T2 (arm,thumb,thumb2)          |    (SEV/WFE/WFI/NOP/YIELD). They can
+-------------------------------------+    be either real or default to NOP.
| ARMV7 (arm,thumb,thumb2)            |    The two processors also use
+-------------------------------------+    different encoding for them.

Patch by Vinicius Tinti.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232468 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 11:55:28 +00:00
Ahmed Bougacha
df08543f48 [AArch64] Use intermediate step for concat_vectors of illegal truncs.
Optimize concat_vectors of truncated vectors, where the intermediate
type is illegal, to avoid said illegality,  e.g.,
  (v4i16 (concat_vectors (v2i16 (truncate (v2i64))),
                         (v2i16 (truncate (v2i64)))))
->
  (v4i16 (truncate (v4i32 (concat_vectors (v2i32 (truncate (v2i64))),
                                          (v2i32 (truncate (v2i64)))))))

This isn't really target-specific, and, as such, would best go in the
DAGCombiner.  However, ISD::TRUNCATE legality isn't keyed on both input
and result type, so we might generate worse code when we don't know
better.  On AArch64 we know it's fine for v2i64->v4i16 and v4i32->v8i8.
rdar://20022387


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232459 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 03:23:09 +00:00
Sanjoy Das
505179177b [IRCE] Re-commit tests cases.
Re-commit the test cases added in r232444.  These now use
-irce-print-changed-loops and -irce-print-range-checks so they run
correctly on a without asserts build of llvm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232452 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 01:40:24 +00:00
Sanjoy Das
58d2381868 [IRCE] Delete two tests.
I accidentally checked in two tests that used -debug-only -- these fail
on a release LLVM build.  Temporarily delete these from the repo to keep
the bots green while I fix this locally.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232446 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 00:54:50 +00:00
Sanjoy Das
eaf8532f7a [IRCE] Support half-range checks.
This change to IRCE gets it to recognize "half" range checks.  Half
range checks are range checks that only either check if the index is
`slt` some positive integer ("length") or if the index is `sge` `0`.

The range solver does not try to be clever / aggressive about solving
half-range checks -- it transforms "I < L" to "0 <= I < L" and "0 <= I"
to "0 <= I < INT_SMAX".  This is safe, but not always optimal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232444 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 00:42:13 +00:00
Justin Bogner
bdd2212363 llvm-cov: Warn instead of error if a .gcda has arcs from an exit block
Patch by Vanderson M. Rosario. Thanks!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232443 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 00:18:51 +00:00
Justin Bogner
6837ab53fb GCOV: Make the exit block placement from r223193 optional
By default we want our gcov emission to stay 4.2 compatible, which
means we need to continue emit the exit block last by default. We add
an option to emit it before the body for users that need it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232438 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 23:52:03 +00:00
Peter Collingbourne
4556b1fe22 LowerBitSets: do not use private aliases at all on Darwin.
LLVM currently turns these into linker-private symbols, which can be dead
stripped by the Darwin linker.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232435 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 23:36:24 +00:00
David Blaikie
712d00bc64 Add testing for mismatched explicit type on a gep operator when loading from bitcode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232427 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 22:03:50 +00:00
David Blaikie
2a83bf6228 Add testing for mismatched explicit type on a load instruction when loading from bitcode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232424 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 21:48:46 +00:00
Justin Bogner
4fefd5cdf4 InstrProf: Fix CoverageMappingReader on big endian
This makes the reader check the endianness of the object file its
given and behave appropriately. For the test I dug up a really old
linker and created a ppc-apple-darwin file for llvm-cov to read.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232422 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 21:40:18 +00:00
David Majnemer
759acf348d CodeGen: @llvm.eh.typeid.for replaced @llvm.eh.typeid.for.i32
We removed @llvm.eh.typeid.for.i32 and replaced it with
@llvm.eh.typeid.for quite some time ago.  Fix up some test cases which
never got updated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232421 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 21:36:38 +00:00
David Blaikie
f1d4614418 Test bitcode parsing error-handling for incorrect explicit type
(turns out I had regressed this when sinking handling of this type down
into GetElementPtrInst::Create - since that asserted before the error
handling was performed)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232420 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 21:35:48 +00:00
Duncan P. N. Exon Smith
763e18696f DebugInfo: Fix testcases that fail -verify-debug-info=true
As part of PR22777, fix testcases that fail the debug info verifier.
The changes fall into the following categories:

  - Empty `filename:` fields in `MDFile`s.  Compile units and some types
    require non-empty filenames.  A number of testcases have empty
    filenames, probably due to hand-reduction of testcases.
  - Not-quite empty arrays: `!{i32 0}`.  This used to be equivalent in
    the debug info schema to `!{}`.  They cause problems for
    `!MDSubroutineType`'s `types:` array, since it requires all operands
    to be valid types.  (Note that `!{null}` is the correct type array
    for functions that take no arguments and return `void`.)
  - Significantly bitrotted testcases.  Nodes got left behind a few
    upgrades ago because of missing or invalid tags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232415 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 21:10:12 +00:00
Duncan P. N. Exon Smith
c77560e219 Verifier: Remove unnecessary double-checks
Turns out `visitIntrinsicFunctionCall()` descends into all operands
already, so explicitly descending in `visitDbgIntrinsic()` (part of
r232296) isn't useful.

Updating a testcase that doesn't really need `-verify-debug-info` (since
r231082) as confirmation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232408 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 20:24:02 +00:00
Kevin Enderby
6250724c87 Add the options, -dylibs-used and -dylib-id to llvm-objdump used with -macho
to print the Mach-O dynamic shared libraries used by a linked image or the
library id of a shared library.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232406 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 20:08:09 +00:00
Duncan P. N. Exon Smith
3c0d9fa2d4 AsmParser: Stop requiring 'name:' when it's not printed
r230877 optimized which fields are written out for `CHECK`-ability, but
apparently missed changing some of them to optional in `LLParser`.

Fixes PR22921.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232400 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 19:01:54 +00:00
Sanjay Patel
8233e8c233 fixed to test feature, not CPU
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232398 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 18:24:28 +00:00
Sanjay Patel
89095a7882 add CHECK-LABELs for more reliable testing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232391 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 17:59:07 +00:00
Sanjay Patel
8f74fd0883 fixed to test feature, not CPU; removed unnecessary declaration
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232387 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 17:01:34 +00:00
Tom Stellard
6ebc34281f R600/SI: don't try min3/max3/med3 with f64
There are no opcodes for this. This also adds a test case.

v2: make test more robust

Patch by: Grigori Goronzy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232386 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 15:53:55 +00:00
Petar Jovanovic
b3b90bd679 [MIPS] Fix justify error for small structures
Fix justify error for small structures bigger than 32 bits in fixed
arguments for MIPS64 big endian. There was a problem when small structures
are passed as fixed arguments. The structures that are bigger than 32 bits
but smaller than 64 bits were not left justified properly on MIPS64 big
endian. This is fixed by shifting the value to make it left justified when
appropriate.

Patch by Aleksandar Beserminji.

Differential Revision: http://reviews.llvm.org/D8174


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232382 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 15:01:09 +00:00
Rafael Espindola
8d8c155a61 Use the i8 immediate cmp instructions when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232378 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 14:25:08 +00:00
Justin Bogner
bd59e21808 InstrProf: Remove xfails for big-endian from coverage tests
This still doesn't actually work correctly for big endian input files,
but since these tests all use little endian input files they don't
actually fail. I'll be committing a real fix for big endian soon, but
I don't have proper tests for it yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232354 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 07:29:49 +00:00
Michael Gottesman
6bc127e1dd [objc-arc] Make the ARC optimizer more conservative by forcing it to be non-safe in both direction, but mitigate the problem by noting that we just care if there was a further use.
The problem here is the infamous one direction known safe. I was
hesitant to turn it off before b/c of the potential for regressions
without an actual bug from users hitting the problem. This is that bug ;
).

The main performance impact of having known safe in both directions is
that often times it is very difficult to find two releases without a use
in-between them since we are so conservative with determining potential
uses. The one direction known safe gets around that problem by taking
advantage of many situations where we have two retains in a row,
allowing us to avoid that problem. That being said, the one direction
known safe is unsafe. Consider the following situation:

retain(x)
retain(x)
call(x)
call(x)
release(x)

Then we know the following about the reference count of x:

// rc(x) == N (for some N).
retain(x)
// rc(x) == N+1
retain(x)
// rc(x) == N+2
call A(x)
call B(x)
// rc(x) >= 1 (since we can not release a deallocated pointer).
release(x)
// rc(x) >= 0

That is all the information that we can know statically. That means that
we know that A(x), B(x) together can release (x) at most N+1 times. Lets
say that we remove the inner retain, release pair.

// rc(x) == N (for some N).
retain(x)
// rc(x) == N+1
call A(x)
call B(x)
// rc(x) >= 1
release(x)
// rc(x) >= 0

We knew before that A(x), B(x) could release x up to N+1 times meaning
that rc(x) may be zero at the release(x). That is not safe. On the other
hand, consider the following situation where we have a must use of
release(x) that x must be kept alive for after the release(x)**. Then we
know that:

// rc(x) == N (for some N).
retain(x)
// rc(x) == N+1
retain(x)
// rc(x) == N+2
call A(x)
call B(x)
// rc(x) >= 2 (since we know that we are going to release x and that that release can not be the last use of x).
release(x)
// rc(x) >= 1 (since we can not deallocate the pointer since we have a must use after x).
…
// rc(x) >= 1
use(x)

Thus we know that statically the calls to A(x), B(x) can together only
release rc(x) N times. Thus if we remove the inner retain, release pair:

// rc(x) == N (for some N).
retain(x)
// rc(x) == N+1
call A(x)
call B(x)
// rc(x) >= 1
…
// rc(x) >= 1
use(x)

We are still safe unless in the final … there are unbalanced retains,
releases which would have caused the program to blow up anyways even
before optimization occurred. The simplest form of must use is an
additional release that has not been paired up with any retain (if we
had paired the release with a retain and removed it we would not have
the additional use). This fits nicely into the ARC framework since
basically what you do is say that given any nested releases regardless
of what is in between, the inner release is known safe. This enables us to get
back the lost performance.

<rdar://problem/19023795>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232351 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 07:02:36 +00:00
Justin Bogner
5e4931b489 InstrProf: Do a better job of reading coverage mapping data.
This code was casting regions of a memory buffer to a couple of
different structs. This is wrong in a few ways:

1. It breaks aliasing rules.
2. If the buffer isn't aligned, it hits undefined behaviour.
3. It completely ignores endianness differences.
4. The structs being defined for this aren't specifying their padding
   properly, so this doesn't even represent the data properly on some
   platforms.

This commit is mostly NFC, except that it fixes reading coverage for
32 bit binaries as a side effect of getting rid of the mispadded
structs. I've included a test for that.

I've also baked in that we only handle little endian more explicitly,
since that was true in practice already. I'll fix this to handle
endianness properly in a followup commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232346 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 06:55:45 +00:00
Frederic Riss
991f3ead4e [dsymutil] Add support to generate .debug_pubnames and .debug_pubtypes
The information gathering part of the patch stores a bit more information
than what is strictly necessary for these 2 sections. The rest will
become useful when we start emitting __apple_* type accelerator tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232342 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 02:05:10 +00:00
NAKAMURA Takumi
69daff35f2 Rework r232337. Let llvm/test/tools/dsymutil/X86/basic-linking-x86.test dospath-tolerant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232339 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 00:40:47 +00:00
NAKAMURA Takumi
18a1928081 Suppress llvm/test/tools/dsymutil/X86/basic-linking-x86.test for now. Will fix later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232337 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-15 23:07:16 +00:00
NAKAMURA Takumi
ce4f7bdd19 llvm/test/tools/dsymutil/X86/basic-lto-*-linking-x86.test: Relax expressions to meet dos path.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232336 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-15 23:07:05 +00:00
Frederic Riss
e6412a691d [dsymutil] Add support for linking line tables.
This code comes with a lot of cruft that is meant to mimic darwin's
dsymutil behavior. A much simpler approach (described in the numerous
FIXMEs that I put in there) gives the right output for the vast
majority of cases. The extra corner cases that are handled differently
need to be investigated: they seem to correctly handle debug info that
is in the input, but that info looks suspicious in the first place.

Anyway, the current code needs to handle this, but I plan to revisit it
as soon as the big round of validation against the classic dsymutil is
over.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232333 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-15 20:45:43 +00:00
Simon Pilgrim
4f3864d05f [SSE} Added tests for float4-float3 conversions (PR11580)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232324 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-15 16:19:15 +00:00
David Majnemer
c976146d31 llvm-cxxdump: Rename llvm-vtabledump to llvm-cxxdump
llvm-vtabledump has grown enough functionality not related to vtables
that it deserves a name which is more descriptive.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232301 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-15 01:30:58 +00:00
Frederic Riss
e7a356409d [dsymutil] Add function size to the debug map.
The debug map embedded by ld64 in binaries conatins function sizes.
These sizes are less precise than the ones given by the debug information
(byte granularity vs linker atom granularity), but they might cover code
that is referenced in the line table but not in the DIE tree (that might
very well be a compiler bug that I need to investigate later).
Anyway, extracting that information is necessary to be able to mimic
dsymutil's behavior exactly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232300 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-15 01:29:30 +00:00
Duncan P. N. Exon Smith
08e687e684 Verifier: Check debug info intrinsic arguments
Verify that debug info intrinsic arguments are valid.  (These checks
will not recurse through the full debug info graph, so they don't need
to be cordoned of in `DebugInfoVerifier`.)

With those checks in place, changing the `DbgIntrinsicInst` accessors to
downcast to `MDLocalVariable` and `MDExpression` is natural (added isa
specializations in `Metadata.h` to support this).

Added tests to `test/Verifier` for the new -verify checks, and fixed the
debug info in all the in-tree tests.

If you have out-of-tree testcases that have started to fail to -verify,
hopefully the verify checks are helpful.  The most likely problem is
that the expression argument is `!{}` (instead of `!MDExpression()`).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232296 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-15 01:21:30 +00:00
Duncan P. N. Exon Smith
f548941ee0 Assembler: Rewrite test for function-local metadata
This test for function-local metadata did strange things, and never
really sent in valid arguments for `llvm.dbg.declare` and
`llvm.dbg.value` intrinsics.  Those that might have once been valid have
bitrotted.

Rewrite it to be a targeted test for function-local metadata --
unrelated to debug info, which is tested elsewhere -- and rename it to
better match other metadata-related tests.

(Note: the scope of function-local metadata changed drastically during
the metadata/value split, but I didn't properly clean up this testcase.
Most of the IR in this file, while invalid for debug info intrinsics,
used to provide coverage for various (now illegal) forms of
function-local metadata.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232290 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-15 00:45:51 +00:00
Simon Pilgrim
54db4092c1 Simplified some stack folding tests.
Replaced explicit pmovzx* intrinsic tests with general shuffles

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232286 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-14 23:16:43 +00:00
Mehdi Amini
3af5418aa4 Update InstCombine to transform aggregate stores into scalar stores.
Summary: This is a first step toward getting proper support for aggregate loads and stores.

Test Plan: Added unittests

Reviewers: reames, chandlerc

Reviewed By: chandlerc

Subscribers: majnemer, joker.eph, chandlerc, llvm-commits

Differential Revision: http://reviews.llvm.org/D7780

Patch by Amaury Sechet

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232284 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-14 22:19:33 +00:00
Frederic Riss
5712ee147f [dsymutil] Add support for debug_loc section.
There is no need to look into the location expressions to transfer them,
the only modification to apply is to patch their base address to reflect
the linked function address.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232267 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-14 15:49:07 +00:00
Daniel Jasper
439cc2c5de [MachineLICM] First steps of sinking GEPs near calls.
Specifically, if there are copy-like instructions in the loop header
they are moved into the loop close to their uses. This reduces the live
intervals of the values and can avoid register spills.

This is working towards a fix for http://llvm.org/PR22230.
Review: http://reviews.llvm.org/D7259

Next steps:
- Find a better cost model (which non-copy instructions should be sunk?)
- Make this dependent on register pressure

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232262 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-14 10:58:38 +00:00
Frederic Riss
9786d3d019 [dsymutil] Generate debug_aranges section.
This actually shares most of its implementation with the  generation
of the debug_ranges (the absence of 'a' is not a typo) contribution
for the unit's DW_AT_ranges attribute.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232246 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-14 03:46:51 +00:00
Ahmed Bougacha
4a2d95826e Add a bunch of CHECK missing colons in tests. NFC.
Some wouldn't pass;  fixed most, the rest will be fixed separately.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232239 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-14 01:43:57 +00:00
Peter Collingbourne
99e2c354a8 LowerBitSets: Do not export symbols for bit set referenced globals on Darwin.
The linker on that platform may re-order symbols or strip dead symbols, which
will break bit set checks. Avoid this by hiding the symbols from the linker.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232235 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-14 00:00:49 +00:00
Frederic Riss
e031501c91 [dsymutil] Implement DW_AT_ranges linking.
Nothing fancy, just a straightforward offset to apply to the original
debug_ranges entries to get them in line with the linked addresses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232232 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 23:30:31 +00:00
Rafael Espindola
89c84b0c83 Use add32ri8 and friends on fast isel.
This fixes pr22854.

The core issue on the bug is that there are multiple instructions that
print the same in assembly. In fact, there doesn't seem to be any
syntax for specifying that a constant that fits in 8 bits should use a 32 bit
immediate.

The attached patch changes fast isel to consider i16immSExt8,
i32immSExt8, and i64immSExt8. They were disabled because fastisel didn’t know
to call the predicate back in the day.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232223 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 22:18:18 +00:00
Robert Lougher
fe795a5d20 Reapply "[Reassociate] Add initial support for vector instructions."
This reapplies the patch previously committed at revision 232190.  This was
reverted at revision 232196 as it caused test failures in tests that did not
expect operands to be commuted.  I have made the tests more resilient to
reassociation in revision 232206.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232209 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 20:53:01 +00:00
Duncan P. N. Exon Smith
d747f3f3fe instcombine: alloca: Canonicalize scalar allocation array size
As a follow-up to r232200, add an `-instcombine` to canonicalize scalar
allocations to `i32 1`.  Since r232200, `iX 1` (for X != 32) are only
created by RAUWs, so this shouldn't fire too often.  Nevertheless, it's
a cheap check and a nice cleanup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232202 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 19:42:09 +00:00
Duncan P. N. Exon Smith
95ff656ae0 AsmWriter: Write alloca array size explicitly (and -instcombine fixup)
Write the `alloca` array size explicitly when it's non-canonical.
Previously, if the array size was `iX 1` (where X is not 32), the type
would mutate to `i32` when round-tripping through assembly.

The testcase I added fails in `verify-uselistorder` (as well as
`FileCheck`), since the use-lists for `i32 1` and `i64 1` change.
(Manman Ren came across this when running `verify-uselistorder` on some
non-trivial, optimized code as part of PR5680.)

The type mutation started with r104911, which allowed array sizes to be
something other than an `i32`.  Starting with r204945, we
"canonicalized" to `i64` on 64-bit platforms -- and then on every
round-trip through assembly, mutated back to `i32`.

I bundled a fixup for `-instcombine` to avoid r204945 on scalar
allocations.  (There wasn't a clean way to sequence this into two
commits, since the assembly change on its own caused testcase churn, and
the `-instcombine` change can't be tested without the assembly changes.)

An obvious alternative fix -- change `AllocaInst::AllocaInst()`,
`AsmWriter` and `LLParser` to treat `intptr_t` as the canonical type for
scalar allocations -- was rejected out of hand, since this required
teaching them each about the data layout.

A follow-up commit will add an `-instcombine` to canonicalize the scalar
allocation array size to `i32 1` rather than leaving `iX 1` alone.

rdar://problem/20075773

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232200 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 19:30:44 +00:00
Robert Lougher
52a1ca5306 Revert: "[Reassociate] Add initial support for vector instructions."
This reverts revision 232190 due to buildbot failure reported on clang-hexagon-elf
for test arm64_vtst.c.  To be investigated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232196 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 19:20:46 +00:00
Frederic Riss
e83badb7d5 [dsymutil] Fix handling of cross-cu forward references.
We recorded the forward references in the CU that holds the referenced
DIE, but this is wrong as those will get resoled *after* the CU that
holds the reference. Record the references in their originating CU along
with a pointer to the remote CU to be able to compute the fixed up
offset at the right time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232193 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 18:35:57 +00:00
Frederic Riss
27db519bfd [dsymutil] Add relocation of compile_units low_pc/high_pc.
They need to be handled specifically as they could vary pretty
widely depending on how the linker moves functions around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232192 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 18:35:54 +00:00
Frederic Riss
3a5c1173c5 [dsymutil] Fix location cloning for newer dwarf versions.
The typo got unnoticed because we were testing only on Dwarf 2. Add a
Dwarf4 test that exercises the code path, and also tests some newer
FORMs that the other test doesn't cover.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232191 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 18:35:39 +00:00
Robert Lougher
4635abb065 [Reassociate] Add initial support for vector instructions.
This patch adds initial support for vector instructions to the reassociation
pass. It enables most parts of the pass to work with vectors but to keep the
size of the patch small, optimization of Xor trees, canonicalization of
negative constants and converting shifts to muls, etc., have been left out.
This will be handled in later patches.

The patch is based on an initial patch by Chad Rosier.

Differential Revision: http://reviews.llvm.org/D7566


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232190 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 18:33:27 +00:00
Sanjoy Das
011536a1cc [SCEV] Fix PR22856.
Summary:
ScalarEvolutionExpander assumes that the header block of a loop is a
legal place to have a use for a phi node.  This is true only for phis
that are either in the header or dominate the header block, but it is
not true for phi nodes that are strictly internal to the loop body.

This change teaches ScalarEvolutionExpander to place uses of PHI nodes
in the basic block the PHI nodes belong to.  This is always legal, and
`hoistIVInc` ensures that the said position dominates `IsomorphicInc`.

Reviewers: atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8311

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232189 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 18:31:19 +00:00
David Blaikie
5a70dd1d82 [opaque pointer type] Add textual IR support for explicit type parameter to gep operator
Similar to gep (r230786) and load (r230794) changes.

Similar migration script can be used to update test cases, which
successfully migrated all of LLVM and Polly, but about 4 test cases
needed manually changes in Clang.

(this script will read the contents of stdin and massage it into stdout
- wrap it in the 'apply.sh' script shown in previous commits + xargs to
apply it over a large set of test cases)

import fileinput
import sys
import re

rep = re.compile(r"(getelementptr(?:\s+inbounds)?\s*\()((<\d*\s+x\s+)?([^@]*?)(|\s*addrspace\(\d+\))\s*\*(?(3)>)\s*)(?=$|%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|zeroinitializer|<|\[\[[a-zA-Z]|\{\{)", re.MULTILINE | re.DOTALL)

def conv(match):
  line = match.group(1)
  line += match.group(4)
  line += ", "
  line += match.group(2)
  return line

line = sys.stdin.read()
off = 0
for match in re.finditer(rep, line):
  sys.stdout.write(line[off:match.start()])
  sys.stdout.write(conv(match))
  off = match.end()
sys.stdout.write(line[off:])

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232184 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 18:20:45 +00:00
Kevin Enderby
300c79d840 Add the option, -non-verbose to llvm-objdump used with -macho to print things
using numeric values and not their symbolic constant names.

The routines that print Mach-O stuff already had a verbose parameter and this
change is just changing the passing true to passing !NonVerbose.  With just a
couple of fixes and a bunch of test case updates.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232182 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 17:56:32 +00:00
Andrea Di Biagio
d288259ccd [X86][AVX] Fix wrong lowering of v4x64 shuffles into concat_vector plus extract_subvector nodes.
This patch fixes a bug in the shuffle lowering logic implemented by function
'lowerV2X128VectorShuffle'.

The are few cases where function 'lowerV2X128VectorShuffle' wrongly expands a
shuffle of two v4X64 vectors into a CONCAT_VECTORS of two EXTRACT_SUBVECTOR
nodes. The problematic expansion only occurs when the shuffle mask M has an
'undef' element at position 2, and M is equivalent to mask <0,1,4,5>.
In that case, the algorithm propagates the wrong vector to one of the two
new EXTRACT_SUBVECTOR nodes.

Example:
;;
define <4 x double> @test(<4 x double> %A, <4 x double> %B) {
entry:
  %0 = shufflevector <4 x double> %A, <4 x double> %B, <4 x i32><i32 undef, i32 1, i32 undef, i32 5>
  ret <4 x double> %0
}
;;

Before this patch, llc (-mattr=+avx) generated:
  vinsertf128 $1, %xmm0, %ymm0, %ymm0

With this patch, llc correctly generates:
  vinsertf128 $1, %xmm1, %ymm0, %ymm0

Added test lower-vec-shuffle-bug.ll

Differential Revision: http://reviews.llvm.org/D8259


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232179 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 17:29:49 +00:00
Matt Arsenault
462f98dd60 R600/SI: Add test for min / max with immediate
Make sure this isn't getting confused by canonicalizations
of comparisons with a constant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232177 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 16:43:48 +00:00
David Majnemer
790aec0651 ConstantFold: Fix big shift constant folding
Constant folding for shift IR instructions ignores all bits above 32 of
second argument (shift amount).
Because of that, some undef results are not recognized and APInt can
raise an assert failure if second argument has more than 64 bits.

Patch by Paweł Bylica!

Differential Revision: http://reviews.llvm.org/D7701

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232176 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 16:39:46 +00:00
Owen Anderson
c20535dff6 Teach TBAA analysis to report errors on cyclic TBAA metadata rather than hanging.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232144 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 07:09:33 +00:00
Owen Anderson
39fcd2305a Fix an infinite recursion in the verifier caused by calling isSized on a recursive type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232143 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 06:41:26 +00:00
Hao Liu
fcc897cc45 [MachineCopyPropagation] Fix a bug causing incorrect removal for the instruction sequences as follows
%Q5_Q6<def> = COPY %Q2_Q3
   %D5<def> =
   %D3<def> =
   %D3<def> = COPY %D6     // Incorrectly removed in MachineCopyPropagation
   Using of %D3 results in incorrect result ...

   Reviewed in http://reviews.llvm.org/D8242 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232142 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 05:15:23 +00:00
Nick Lewycky
011cb4d5bd When forming an addrec out of a phi don't just look at the last computation and steal its flags for our own, there may be other computations in the middle. Check whether the LHS of the computation is the phi itself and then we know it's safe to steal the flags. Fixes PR22795.
There's a missed optimization opportunity where we could look at the full chain of computation and take the intersection of the flags instead of only looking one instruction deep.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232134 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-13 01:37:52 +00:00
Sanjay Patel
cae9695fbb [X86, AVX2] Replace inserti128 and extracti128 intrinsics with generic shuffles
This should complete the job started in r231794 and continued in r232045:
We want to replace as much custom x86 shuffling via intrinsics
as possible because pushing the code down the generic shuffle
optimization path allows for better codegen and less complexity
in LLVM.

AVX2 introduced proper integer variants of the hacked integer insert/extract
C intrinsics that were created for this same functionality with AVX1.

This should complete the removal of insert/extract128 intrinsics.

The Clang precursor patch for this change was checked in at r232109.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232120 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 23:16:18 +00:00
Simon Pilgrim
7385cafb7a Removed useless palignr test - we don't actually provide a llvm.x86.ssse3.palign.r.128 intrinsic
Differential Revision: http://reviews.llvm.org/D8302

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232108 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 21:42:03 +00:00
Tom Stellard
3d712a6373 R600/SI: Remove _e32 and _e64 suffixes from mnemonics
Instead print them as part of the $dst operand.  The AsmMatcher
requires the 32-bit and 64-bit encodings have the same mnemonic in
order to parse them correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232105 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 21:34:22 +00:00
Andrew Kaylor
d434c0d548 Adding WinEHPrepare tests (currently XFAILs)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232104 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 21:32:59 +00:00
Krzysztof Parzyszek
49fa37992d Unxfail passing test on Hexagon
test/CodeGen/Generic/2008-02-20-MatchingMem.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232098 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 20:38:10 +00:00
Quentin Colombet
be45e0e669 [X86] Fix a regression introduced by r223641.
The permps and permd instructions have their operands swapped compared to the
intrinsic definition. Therefore, they do not fall into the INTR_TYPE_2OP
category.

I did not create a new category for those two, as they are the only one AFAICT
in that case.

<rdar://problem/20108262>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232085 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 19:34:12 +00:00
Krzysztof Parzyszek
7b110fe366 Remove unused complex patterns for addressing modes on Hexagon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232057 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 16:44:50 +00:00
Andrea Di Biagio
be9322ae7c [X86] Fix wrong target specific combine on SETCC nodes.
Part of the folding logic implemented by function 'PerformISDSETCCCombine'
only worked under the assumption that the condition code in input could have
been either SETNE or SETEQ.
Unfortunately that assumption was incorrect, and in some cases the algorithm
ended up incorrectly folding SETCC nodes.

The incorrect folding only affected SETCC dag nodes where:
 - one of the operands was a build_vector of all zeroes;
 - the other operand was a SIGN_EXTEND from a vector of MVT:i1 elements;
 - the condition code was neither SETNE nor SETEQ.

Example:
  (setcc (v4i32 (sign_extend v4i1:%A)), (v4i32 VectorOfAllZeroes), setge)

Before this patch, the entire dag node sequence from the example was
incorrectly folded to node %A.

With this patch, the dag node sequence is folded to a
  (xor %A, (v4i1 VectorOfAllOnes)).

Added test setcc-combine.ll.

Thanks to Greg Bedwell for spotting this issue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232046 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 15:16:58 +00:00
Sanjay Patel
b4c1547749 [X86, AVX] replace vextractf128 intrinsics with generic shuffles
Now that we've replaced the vinsertf128 intrinsics, 
do the same for their extract twins.

This is very much like D8086 (checked in at r231794):
We want to replace as much custom x86 shuffling via intrinsics
as possible because pushing the code down the generic shuffle
optimization path allows for better codegen and less complexity
in LLVM.

This is also the LLVM sibling to the cfe D8275 patch.

Differential Revision: http://reviews.llvm.org/D8276



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232045 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 15:15:19 +00:00
Simon Pilgrim
df0acf35f3 [X86][AVX2] Added missing palignr stack folding test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232033 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 13:12:33 +00:00
Elena Demikhovsky
3209a40889 AVX-512: Added encoding tests for VPROR, VPROL instructions,
fixed opcode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232018 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 07:28:41 +00:00
Kevin Qin
a56999c5de Reapply 'Run LICM pass after loop unrolling pass.'
It's firstly committed at r231630, and reverted at r231635.

Function pass InstructionSimplifier is inserted as barrier to
make sure loop unroll pass won't affect on LICM pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232011 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 05:36:01 +00:00
Jingyue Wu
3ea0adcdd5 [NVPTXAsmPrinter] do not print .align on function headers
Summary:
PTX does not allow .align directives on function headers.

Fixes PR21551.

Test Plan: test/Codegen/NVPTX/function-align.ll

Reviewers: eliben, jholewinski

Reviewed By: eliben, jholewinski

Subscribers: llvm-commits, eliben, jpienaar, jholewinski

Differential Revision: http://reviews.llvm.org/D8274

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232004 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 01:50:30 +00:00
Reid Kleckner
b53bb04b2f Remove some CHECK-NOT lines in favor of CHECK-NEXT
NFC, this is just shorter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232000 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 01:38:48 +00:00
Reid Kleckner
7dedaabcae Stop calling DwarfEHPrepare from WinEHPrepare
Instead, run both EH preparation passes, and have them both ignore
functions with unrecognized EH personalities. Pass delegation involved
some hacky code for creating an AnalysisResolver that we don't need now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231995 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 00:36:20 +00:00
Reid Kleckner
70992ac969 Handle big index in getelementptr instruction
CodeGen incorrectly ignores (assert from APInt) constant index bigger
than 2^64 in getelementptr instruction. This is a test and fix for that.

Patch by Paweł Bylica!

Reviewed By: rnk

Subscribers: majnemer, rnk, mcrosier, resistor, llvm-commits

Differential Revision: http://reviews.llvm.org/D8219

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231984 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 23:36:10 +00:00
Andrew Kaylor
1134ac4a0f Extended support for native Windows C++ EH outlining
Differential Review: http://reviews.llvm.org/D7886



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231981 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 23:22:06 +00:00
Kevin Enderby
8284f0fb29 Add the option, -info-plist to llvm-objdump used with -macho to print the
Mach-O info plist section as strings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231974 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 22:06:32 +00:00
Jozef Kolek
a2b4e9a30e [mips][microMIPS] Make usage of NOT16 by code generator
Differential Revision: http://reviews.llvm.org/D7748


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231963 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 20:28:31 +00:00
Sanjay Patel
02402b3cc1 add CHECK-LABELs for better reliability
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231962 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 20:12:07 +00:00
Rafael Espindola
0c78583bf6 Put jump tables in unique sections on COFF.
If a function is going in an unique section (because of -ffunction-sections
for example), putting a jump table in .rodata will keep .rodata alive and
that will keep alive any other function that also has a jump table.

Instead, put the jump table in a unique section that is associated with the
function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231961 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 19:58:37 +00:00
Tim Northover
52f83a9ab3 ARM: simplify and extend byval handling
The main issue being fixed here is that APCS targets handling a "byval align N"
parameter with N > 4 were miscounting what objects were where on the stack,
leading to FrameLowering setting the frame pointer incorrectly and clobbering
the stack.

But byval handling had grown over many years, and had multiple layers of cruft
trying to compensate for each other and calculate padding correctly. This only
really needs to be done once, in the HandleByVal function. Elsewhere should
just do what it's told by that call.

I also stripped out unnecessary APCS/AAPCS distinctions (now that Clang emits
byvals with the correct C ABI alignment), which simplified HandleByVal.

rdar://20095672

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231959 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 18:54:22 +00:00
Frederic Riss
89393bbba6 [dsymutil] Correctly clone address attributes.
DW_AT_low_pc on functions is taken care of by the relocation processing, but
DW_AT_high_pc and DW_AT_low_pc on other lexical scopes need special handling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231955 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 18:45:52 +00:00
David Majnemer
9c2d178707 InstCombine: Don't fold call bitcast into args if callee is byval
This fixes a bug reported here:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20150309/265341.html

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231948 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 18:03:05 +00:00
Juergen Ributzka
9814f7b92c Add the "vbroadcasti128" instruction back.
This is a follow-up to r231182. This adds the "vbroadcasti128" instruction
back, but without the intrinsic mapping. Also add a test to check the
instriction encoding.

This is related to rdar://problem/18742778.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231945 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 17:29:03 +00:00
Derek Schuff
87e6561f34 Make NaCl's use of .init_array for static constructors match Linux
Summary:
The generic ELF TargetObjectFile defaults to .ctors, but Linux's
defaults to .init_array by calling InitializeELF with the value of
UseInitArray from TargetMachine. Make NaCl's behavior match.

Reviewers: jvoung
Differential Revision: http://reviews.llvm.org/D8240

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231934 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 16:16:09 +00:00
Sanjay Patel
c2e4231627 Inliner should not add callgraph edges for intrinsic calls (PR22857)
The CallGraphNode function "addCalledFunction()" asserts that edges are not to intrinsics.

This patch makes sure that the Inliner does not add such an edge to the callgraph.

Fix for clang crash by assertion: https://llvm.org/bugs/show_bug.cgi?id=22857

Differential Revision: http://reviews.llvm.org/D8231



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231927 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 15:12:32 +00:00
Benjamin Kramer
410ba460a0 Prefer pipes over temporary files in a feeble attempt to stabilize this test on windows.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231923 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 13:55:41 +00:00
Rafael Espindola
4d7b50578f Relax CHECK to match mips syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231919 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 12:48:24 +00:00
Elena Demikhovsky
13cc6f2b6e AVX-512: Added SKX forms of shift instructions.
Added rotation instructions, encoding only.
Added encoding tests for all these forms.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231916 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 10:25:42 +00:00
Justin Bogner
e9ae43acf7 Now that r231902's test is executed, make it actually pass
As of r231908, the test I added in r231902 actually gets run - but I'd
checked in a stale version of the input so it didn't pass. Fix the
input and un-xfail the test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231911 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 08:17:25 +00:00
Owen Anderson
1b3b8e5be8 Fix another verifier crash where a GC intrinsic would look at the internals of another intrinsic in order to verify itself.
This causes a crash if the referenced intrinsic was malformed.  In this case, we
would already have reported an error on the referenced intrinsic, but then
crashed on the second one when it tried to introspect the first without
error checking.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231910 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 06:57:30 +00:00
Daniel Jasper
21d3c12750 Make test added in r231902 actually be executed.
There were also errors in the CHECK line which I fixed and the test
doesn't actually pass as the "100" is in the wrong line. Not sure
whether this is a test failure or a coverage failure so making the test
XFAIL for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231908 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 06:44:51 +00:00
Rafael Espindola
a5415bcc57 Don't print labels that on ELF are never used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231904 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 04:20:31 +00:00
Justin Bogner
d39109de09 InstrProf: Teach llvm-cov to handle universal binaries when given -arch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231902 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 02:30:51 +00:00
Rafael Espindola
e6e0135d1a Relax label CHECK to mach COFF syntax.
Should fix the cygwin bots.

I added a cygwin specific test that would have caught this on Linux.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231899 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 01:08:32 +00:00
Rafael Espindola
658236dec2 Print section start labels when first switching to the section.
This is less brittle and avoids polluting the start of the file with every
debug section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231898 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 00:51:37 +00:00
Rafael Espindola
48dfe610b0 Split test in two to handle building without x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231886 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 23:44:12 +00:00
Rafael Espindola
e58e7e6476 Add missing section symbol to COFF's .debug_types.dwo.
Should bring the cygwin bots back.

I added a triple to the test that was failing so that it would have failed
on Linux.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231882 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 23:06:32 +00:00
Philip Reames
fb4ffccacb If a conditional branch jumps to the same target, remove the condition
Given that large parts of inst combine is restricted to instructions which have one use, getting rid of a use on the condition can help the effectiveness of the optimizer. Also, it allows the condition to potentially be deleted by instcombine rather than waiting for another pass.

I noticed this completely by accident in another test case. It's not anything that actually came from a real workload.

p.s. We should probably do the same thing for switch instructions.

Differential Revision: http://reviews.llvm.org/D8220



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231881 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 22:52:37 +00:00
Paul Robinson
107918efa2 Emit correct linkage-name attribute based on DWARF version.
There are still 4 tests that check for DW_AT_MIPS_linkage_name,
because they specify DWARF 2 or 3 in the module metadata. So, I didn't
create an explicit version-based test for the attribute.

Differential Revision: http://reviews.llvm.org/D8227


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231880 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 22:44:45 +00:00
Philip Reames
7c7b72a066 Infer known bits from dominating conditions
This patch adds limited support in ValueTracking for inferring known bits of a value from conditional expressions which must be true to reach the instruction we're trying to optimize. At this time, the feature is off by default. Once landed, I'm hoping for feedback from others on both profitability and compile time impact.

Forms of conditional value propagation have been tried in LLVM before and have failed due to compile time problems.  In an attempt to side step that, this patch only considers conditions where the edge leaving the branch dominates the context instruction. It does not attempt full dataflow.  Even with that restriction, it handles many interesting cases:
 * Early exits from functions
 * Early exits from loops (for context instructions in the loop and after the check)
 * Conditions which control entry into loops, including multi-version loops (such as those produced during vectorization, IRCE, loop unswitch, etc..)

Possible applications include optimizing using information provided by constructs such as: preconditions, assumptions, null checks, & range checks.

This patch implements two approaches to the problem that need further benchmarking.  Approach 1 is to directly walk the dominator tree looking for interesting conditions.  Approach 2 is to inspect other uses of the value being queried for interesting comparisons.  From initial benchmarking, it appears that Approach 2 is faster than Approach 1, but this needs to be further validated.  

Differential Revision: http://reviews.llvm.org/D7708



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231879 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 22:43:20 +00:00
Quentin Colombet
7775242da3 [CodeGenPrepare] Refine the cost model provided by the promotion helper.
- Use TargetLowering to check for the actual cost of each extension.
- Provide a factorized method to check for the cost of an extension:
  TargetLowering::isExtFree.
- Provide a virtual method TargetLowering::isExtFreeImpl for targets to be able
  to tune the cost of non-free extensions.

This refactoring offers a better granularity to model what really happens on
different targets.

No performance changes and very few code differences.

Part of <rdar://problem/19267165> 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231855 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 21:48:15 +00:00
Nemanja Ivanovic
dc12298109 Add support for part-word atomics for PPC
http://reviews.llvm.org/D8090#inline-67337


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231843 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 20:51:07 +00:00
Ahmed Bougacha
4a3cd42601 [AArch64] Avoid going through GPRs for across-vector instructions.
This adds new node types for each intrinsic.
For instance, for addv, we have AArch64ISD::UADDV, such that:
  (v4i32 (uaddv ...))
is the same as
  (v4i32 (scalar_to_vector (i32 (int_aarch64_neon_uaddv ...))))
that is,
  (v4i32 (INSERT_SUBREG (v4i32 (IMPLICIT_DEF)),
           (i32 (int_aarch64_neon_uaddv ...)), ssub)

In a combine, we transform all such across-vector-lanes intrinsics to:

  (i32 (extract_vector_elt (uaddv ...), 0))

This has one big advantage: by making the extract_element explicit, we
enable the existing patterns for lane-aware instructions to fire.
This lets us avoid needlessly going through the GPRs.  Consider:

    uint32x4_t test_mul(uint32x4_t a, uint32x4_t b) {
        return vmulq_n_u32(a, vaddvq_u32(b));
    }

We now generate:
    addv.4s  s1, v1
    mul.4s   v0, v0, v1[0]
instead of the previous:
    addv.4s  s1, v1
    fmov     w8, s1
    dup.4s   v1, w8
    mul.4s   v0, v1, v0

rdar://20044838


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231840 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 20:45:38 +00:00
Bruno Cardoso Lopes
84e6358ea0 [AsmPrinter][TLOF] Reintroduce AArch64 test
Follow up from r231505.

Fix the non-determinism by using a MapVector and reintroduce the AArch64
testcase. Defer deleting the got candidates up to the end and remove
them in a bulk, avoiding linear time removal of each element.

Thanks to Renato Golin for trying it out on other platforms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231830 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 20:05:23 +00:00
Kit Barton
1f9ea3a230 Change the generation of the vmuluwm instruction to be based on the MUL opcode.
Phabricator review: http://reviews.llvm.org/D8185


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231827 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 19:49:38 +00:00
Adam Nemet
8e7d56f6f7 [LoopAccesses 3/3] Print the dependences with -analyze
The dependences are now expose through the new getInterestingDependences
API so we can use that with -analyze too and fix the FIXME.

This lets us remove the test that relied on -debug to check the
dependences.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231807 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 17:40:43 +00:00
Igor Laevsky
68beb2a9ec Teach lowering to correctly handle invoke statepoint and gc results tied to them. Note that we still can not lower gc.relocates for invoke statepoints.
Also it extracts getCopyFromRegs helper function in SelectionDAGBuilder as we need to be able to customize type of the register exported from basic block during lowering of the gc.result.
(Resubmitting this change after not being able to reproduce buildbot failure)

Differential Revision: http://reviews.llvm.org/D7760



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231800 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 16:26:48 +00:00
Sanjay Patel
137e1f3f28 [X86, AVX] replace vinsertf128 intrinsics with generic shuffles
We want to replace as much custom x86 shuffling via intrinsics
as possible because pushing the code down the generic shuffle
optimization path allows for better codegen and less complexity
in LLVM.

This is the sibling patch for the Clang half of this change:
http://reviews.llvm.org/D8088

Differential Revision: http://reviews.llvm.org/D8086



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 16:08:36 +00:00
Karthik Bhat
36b589fd8a Fix a memory corruption in Dependency Analysis.
This crash occurs due to memory corruption when trying to update dependency
direction based on Constraints.

This crash was observed during lnt regression of Polybench benchmark test case dynprog.

Review: http://reviews.llvm.org/D8059



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231788 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 14:32:02 +00:00
Karthik Bhat
5f9683f54f Fix a crash in Dependency Analysis.
This crash in Dependency analysis is because we assume here that in case of UsefulGEP
both source and destination have the same number of operands which may not be true.
This incorrect assumption results in crash while populating Pairs. Fix the same.

This crash was observed during lnt regression for code such as-
  struct s{
    int A[10][10];
    int C[10][10][10]; 
  } S;
  void dep_constraint_crash_test(int k,int N)  {
     for( int i=0;i<N;i++)
       for( int j=0;j<N;j++)
         S.A[0][0] = S.C[0][0][k];
  }
Review: http://reviews.llvm.org/D8162



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231784 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 13:31:03 +00:00
Owen Anderson
3a3665fd38 Fix a crash in InstCombine where we could try to truncate a switch comparison to zero width.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231761 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 06:51:39 +00:00
Owen Anderson
bb6a88c25d Fix a stack overflow in the assembler when checking that GEPs must be over sized types.
We failed to use a marking set to properly handle recursive types, which caused use
to recurse infinitely and eventually overflow the stack.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231760 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 06:34:57 +00:00
Owen Anderson
4935faa4ee Fix an issue in the verifier where we could try to read information out of a malformed statepoint intrinsic.
In this situation we would always have already flagged an error on the statepoint intrinsic,
but then we carry on to parse other, related GC intrinsics, and could end up crashing during that
verification when they try to access data from the malformed statepoint.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231759 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 05:58:21 +00:00
Owen Anderson
645fd68c5c Fix an infinite loop in InstCombine when an instruction with no users and side effects can be constant folded.
ReplaceInstUsesWith needs to return nullptr when the input has no users,
because in that case it does not mutate the program.  Otherwise, we can
get stuck in an infinite loop of repeatedly attempting to constant fold
and instruction with no users.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231755 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 05:13:47 +00:00
Rafael Espindola
44292e80ac Use a better name for compile unit labels.
They mark the start of a compile unit, so name them .Lcu_*. Using
Section->getLabelBeginName() makes it looks like they mark the start of the
section.

While at it, switch to createTempSymbol to avoid collisions with labels
created in inline assembly. Not sure if a "don't crash" test is worth it.

With this getLabelBeginName is dead, delete it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231750 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 03:58:36 +00:00
George Burgess IV
d8bd7ce2ca Added ConstantExpr support to CFLAA.
CFLAA didn't know how to properly handle ConstantExprs; it would silently
ignore them. This was a problem if the ConstantExpr is, say, a GEP of a global,
because CFLAA wouldn't realize that there's a global there. :)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231743 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 02:58:15 +00:00
George Burgess IV
456a54a2df Added special handling for inttoptr in CFLAA.
We now treat pointers given to ptrtoint and pointers retrieved from
inttoptr as similar to arguments or globals (can alias anything, etc.)

This solves some of the problems we were having with giving incorrect
results.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231741 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 02:40:06 +00:00
Kostya Serebryany
935a3aa5bc [sanitizer] fix instrumentation with -mllvm -sanitizer-coverage-block-threshold=0 to actually do something useful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231736 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 01:58:27 +00:00
Frederic Riss
14bd47ef85 DwarfAccelTable: Fix handling of hash collisions.
It turns out accelerator tables where totally broken if they contained
entries with colliding hashes. The failure mode is pretty bad, as it not
only impacted the colliding entries, but would basically make all the
entries after the first hash collision pointing in the wrong place.

The testcase uses the symbol names that where found to collide during a
clang build.

From a performance point of view, the patch adds a sort and a linear
walk over each bucket contents. While it has a measurable impact on the
accelerator table emission, it's not showing up significantly in clang
profiles (and I'd argue that correctness is priceless :-)).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231732 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 00:46:31 +00:00
Colin LeMahieu
376b961126 [Hexagon] Removing unused patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231723 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 23:08:46 +00:00
David Blaikie
22feef493a LLParser: gep: Simplify parsing error handling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231722 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 23:08:44 +00:00
Ahmed Bougacha
55a060641f [CodeGen] Replace the reused stores' chain for extractelt expansion.
This fixes a subtle issue that was introduced in r205153.

When reusing a store for the extractelement expansion (to load directly
from it, inserting of going through the stack), later stores to the
same location might have overwritten the data we were expecting to
extract from.

To fix that, we need to explicitly replace the chain going out of the
reused store, so that later stores also have an explicit dependency on
the generated element-extracting loads, and can't clobber them.

rdar://20066785
Differential Revision: http://reviews.llvm.org/D8180


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231721 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 22:51:05 +00:00
Ahmed Bougacha
fad749559c [X86] Add nounwind to vector-idiv.ll testcases. NFC.
In preparation for a patch where cfi directives get in the way.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231720 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 22:46:02 +00:00
Reid Kleckner
4c27f8d49e Reland r229944: EH: Prune unreachable resume instructions during Dwarf EH preparation
Fix the double-deletion of AnalysisResolver when delegating through to
Dwarf EH preparation by creating one from scratch. Hopefully the new
pass manager simplifies this.

This reverts commit r229952.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231719 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 22:45:16 +00:00
Rafael Espindola
9e065f52fc Use a MapVector instead of an extra sort.
This also has the advantage of not depending on the brittle getLabelBeginName.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231714 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 22:08:37 +00:00
Colin LeMahieu
ffc2de43d9 [Hexagon] Reapply r231699. Remove assumption that second operand is an immediate when checking if A2_tfrsi is combinable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231710 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 21:48:13 +00:00
Sanjoy Das
cd5029d001 [SCEV] Unify getUnsignedRange and getSignedRange
Summary:
This removes some duplicated code, and also helps optimization: e.g. in
the test case added, `%idx ULT 128` in `@x` is not currently optimized
to `true` by `-indvars` but will be, after this change.

The only functional change in ths commit is that for add recurrences,
ScalarEvolution::getRange will be more aggressive -- computing the
unsigned (resp. signed) range for a SCEVAddRecExpr will now look at the
NSW (resp. NUW) bits and check for signed (resp. unsigned) overflow.
This can be a strict improvement in some cases (such as the attached
test case), and should be no worse in other cases.

Reviewers: atrick, nlewycky

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8142

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231709 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 21:43:43 +00:00
Sanjoy Das
afeb9bf44e [SCEV] Add a `scalar-evolution-print-constant-ranges' option
Summary:
Unused in this commit, but will be used in a subsequent change (D8142)
by a FileCheck test.

Reviewers: atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8143

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231708 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 21:43:39 +00:00
Colin LeMahieu
c2d30aebf3 [Hexagon] Reverting r231699
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231703 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 21:19:02 +00:00
Colin LeMahieu
8c2919a34e [Hexagon] Updating constant set to simpler versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231699 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 20:33:12 +00:00