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dbf51ee459
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223 Commits

Author SHA1 Message Date
Akira Hatanaka
dbf51ee459 [mips] Refactor subword-swap, EXT/INS, load-effective-address and read-hardware 
instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170956 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 23:21:32 +00:00
Akira Hatanaka
e8bc10b902 [mips] Refactor SYNC and multiply/divide instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170955 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 23:17:36 +00:00
Akira Hatanaka
aa7c9cd181 [mips] Refactor BAL instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170954 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 23:15:59 +00:00
Akira Hatanaka
1892253694 [mips] Fix encoding of BAL instruction. Also, fix assembler test case which 
was not catching the error.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170953 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 23:13:59 +00:00
Akira Hatanaka
6a8309e62a [mips] Refactor jump, jump register, jump-and-link and nop instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170952 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 23:03:50 +00:00
Akira Hatanaka
0a57dc1d14 [mips] Refactor load/store left/right and load-link and store-conditional 
instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170950 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 23:01:24 +00:00
Akira Hatanaka
16164657d8 [mips] Refactor load/store instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170948 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:58:55 +00:00
Akira Hatanaka
5f5770baae [mips] Remove unnecessary isPseudo parameter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170947 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:57:26 +00:00
Akira Hatanaka
8e719fac46 [mips] Refactor LUI instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170944 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:46:07 +00:00
Akira Hatanaka
35242e27c5 [mips] Refactor count leading zero or one instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170942 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:43:58 +00:00
Akira Hatanaka
8aaed99a99 [mips] Refactor sign-extension-in-register instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170940 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:41:52 +00:00
Akira Hatanaka
7de001b97e [mips] Refactor instructions which copy from and to HI/LO registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170939 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:39:17 +00:00
Akira Hatanaka
2a732ec272 [mips] Refactor logical NOR instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170937 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:35:47 +00:00
Akira Hatanaka
a8215f4ec2 [mips] Move instruction definitions in MipsInstrInfo.td. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170936 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:33:43 +00:00
Reed Kotler
0fd8313250 There is one more patch to finish large frames. Make sure we assert 
on code that has large frames which will not yet compile correctly.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170673 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 06:57:00 +00:00
Akira Hatanaka
9bf571fe2c [mips] Refactor SLT (set on less than) instructions. Separate encoding 
information from the rest. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170664 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:27:52 +00:00
Akira Hatanaka
c23061547d [mips] Refactor unconditional branch instruction. Separate encoding information 
from the rest. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170663 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:22:39 +00:00
Akira Hatanaka
1e7739f614 [mips] Remove asm string parameter from pseudo instructions. Add InstrItinClass 
parameter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170661 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:20:09 +00:00
Akira Hatanaka
77e85f367c [mips] Delete definition of CPRESTORE instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170660 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:15:30 +00:00
Akira Hatanaka
5c54025645 [mips] Refactor conditional branch instructions with one register operand. 
Separate encoding information from the rest.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170659 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:13:23 +00:00
Akira Hatanaka
c488901355 [mips] Refactor conditional branch instructions with two register operands. 
Separate encoding information from the rest.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170657 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:10:13 +00:00
Akira Hatanaka
2427773f2f [mips] Change the order of template parameters. Move the default parameters to 
the end. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170651 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 03:52:08 +00:00
Akira Hatanaka
cdc0c59d1e [mips] Refactor shift instructions with register operands. Separate encoding 
information from the rest.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170650 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 03:48:24 +00:00
Akira Hatanaka
0dad34a9bf [mips] Refactor shift immediate instructions. Separate encoding information 
from the rest.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170649 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 03:44:41 +00:00
Akira Hatanaka
ab48c503e2 [mips] Refactor arithmetic and logic instructions with immediate operands. 
Separate encoding information from the rest.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170648 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 03:40:03 +00:00
Akira Hatanaka
23a3da0113 [mips] Refactor arithmetic and logic instructions. Separate encoding 
information from the rest.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170647 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 03:34:05 +00:00
Akira Hatanaka
c9e30ea42c [mips] Delete ArithOverflowR and ArithOverflow and use ArithLogicR and 
ArithLogicI as the instruction base classes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170642 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 03:00:16 +00:00
Akira Hatanaka
0232064e6f [mips] Move class IsCommutable into MipsInstrInfo.td. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170054 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-13 00:32:01 +00:00
Akira Hatanaka
f3c0c77bc3 [mips] Delete nodes and instructions for dynamic alloca that are no longer in 
use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169580 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-07 03:10:18 +00:00
Akira Hatanaka
249330eadb [mips] Shorten predicate name. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169579 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-07 03:06:09 +00:00
Akira Hatanaka
ab9705f8fa [mips] Remove unnecessary predicates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169577 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-07 03:01:24 +00:00
Akira Hatanaka
f09a03776d [mips] Generate big GOT code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168460 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-21 20:40:38 +00:00
Akira Hatanaka
0301bc54ad [mips] Add predicate HasFPIdx for floating-point indexed load instruction 
support and use it in place of HasMips32r2Or64.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168089 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-15 21:17:13 +00:00
Akira Hatanaka
3c77033a90 [mips] Set flag neverHasSideEffects flag on floating point conversion 
instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167348 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-03 00:53:12 +00:00
Akira Hatanaka
3c9c1ab7b7 [mips] Set flag isAsCheapAsAMove flag on instruction LUi. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167345 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-03 00:26:02 +00:00
Akira Hatanaka
497204a94b [mips] Set isAsCheapAsAMove flag on ADDiu and DADDiu, which enables 
re-materialization of immediate loads.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167153 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-31 18:37:55 +00:00
Akira Hatanaka
e050902ca7 [mips] Fix TAILCALL's operand node type. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166341 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-19 21:30:15 +00:00
Akira Hatanaka
01a75c46e3 [mips] Add tail call instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166338 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-19 21:14:34 +00:00
Akira Hatanaka
1f027135a8 [mips] Make the branch nodes used in jump instructions a template parameter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166337 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-19 21:11:03 +00:00
Akira Hatanaka
58d1e3f72a Add node and enum for mips tail call. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166318 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-19 20:59:39 +00:00
Jack Carter
2f68b311a1 Initial assembler implementation of Mips load address macro 
This patch provides initial implementation of load address 
macro instruction for Mips. We have implemented two kinds 
of expansions with their variations depending on the size 
of immediate operand:

 1) load address with immediate value directly:
    * la d,j => addiu d,$zero,j   (for -32768 <= j <= 65535)
    * la d,j => lui d,hi16(j)
                ori d,d,lo16(j)   (for any other 32 bit value of j)

 2) load load address with register offset value
    * la d,j(s) => addiu d,s,j     (for -32768 <= j <= 65535)
    * la d,j(s) => lui d,hi16(j)   (for any other 32 bit value of j)
                   ori d,d,lo16(j)
                   addu d,d,s

This patch does not cover the case when the address is loaded 
from the value of the label or function.

Contributer: Vladimir Medic


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165561 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-09 23:29:45 +00:00
Jack Carter
de33227462 Adding support for instructions mfc0, mfc2, mtc0, mtc2 
move from and to coprocessors 0 and 2.

Contributer: Vladimir Medic


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165351 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-06 01:17:37 +00:00
Jack Carter
9d577c8614 Implement methods that enable expansion of load immediate 
macro instruction (li) in the assembler.

We have identified three possible expansions depending on 
the size of immediate operand:
  1) for 0 ≤ j ≤ 65535.
     li d,j =>
     ori d,$zero,j

  2) for −32768 ≤ j < 0.
     li d,j =>
     addiu d,$zero,j

  3) for any other value of j that is representable as a 32-bit integer.
     li d,j =>
     lui d,hi16(j)
     ori d,d,lo16(j)

All of the above have been implemented in ths patch.

Contributer: Vladimir Medic


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165199 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-04 04:03:53 +00:00
Akira Hatanaka
7509ec18d1 MIPS DSP: add vector load/store patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164744 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-27 01:50:59 +00:00
Akira Hatanaka
5a7dd43f04 Remove aligned/unaligned load/store fragments defined in MipsInstrInfo.td and 
use load/store fragments defined in TargetSelectionDAG.td in place of them.
Unaligned loads/stores are either expanded or lowered to target-specific nodes,
so instruction selection should see only aligned load/store nodes.

No changes in functionality.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163960 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-15 01:52:08 +00:00
Jack Carter
04376ebe9f The Mips standalone assembler aliased instruction support. 
The assembler can alias one instruction into another based
on the operands. For example the jump instruction "J" takes
and immediate operand, but if the operand is a register the
assembler will change it into a jump register "JR" instruction.

These changes are in the instruction td file.

Test cases included

Contributer: Vladimir Medic


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163368 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-07 01:42:38 +00:00
Jakob Stoklund Olesen
ea47628cba Add missing SDNPSideEffect flags. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162557 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-08-24 14:43:27 +00:00
Akira Hatanaka
72e9b6aeb4 Add stub methods for mips assembly matcher. 
Patch by Vladimir Medic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162124 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-08-17 20:16:42 +00:00
Jack Carter
61de70d98e The Mips64InstrInfo.td definitions DynAlloc64 LEA_ADDiu64 
were using a class defined for 32 bit instructions and 
thus the instruction was for addiu instead of daddiu.

This was corrected by adding the instruction opcode as a 
field in the  base class to be filled in by the defs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161359 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-08-06 23:29:06 +00:00
Akira Hatanaka
603f69dc2c Define ADJCALLSTACKDOWN/UP nodes. These nodes are emitted regardless of whether 
or not it is in mips16 mode. Define MipsPseudo (mode-independant pseudo) and
PseudoSE (mips32/64 pseudo) classes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161071 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-31 19:13:07 +00:00