Dale Johannesen
5994fd0f4d
Really reserve R2 on PPC Darwin. PR 6314.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96399 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 21:53:27 +00:00
Jim Grosbach
80dc116ce3
80 column cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96393 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 21:23:02 +00:00
Evan Cheng
ae3ecf9603
Look for SSE and instructions of this form: (and x, (build_vector c1,c2,c3,c4)).
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If there exists a use of a build_vector that's the bitwise complement of the mask,
then transform the node to
(and (xor x, (build_vector -1,-1,-1,-1)), (build_vector ~c1,~c2,~c3,~c4)).
Since this transformation is only useful when 1) the given build_vector will
become a load from constpool, and 2) (and (xor x -1), y) matches to a single
instruction, I decided this is appropriate as a x86 specific transformation.
rdar://7323335
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96389 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 21:09:44 +00:00
Jim Grosbach
6417171026
Remove trailing whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96388 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 21:07:46 +00:00
David Greene
8939b0d8a9
Add support for emitting non-temporal stores for DAGs marked
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non-temporal. Fix from r96241 for botched encoding of MOVNTDQ.
Add documentation for !nontemporal metadata.
Add a simpler movnt testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96386 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 20:50:18 +00:00
Jim Grosbach
39be8fcfdc
Update Thumb2 to not use CarryDefIsUnused or CarryDefIsUsed predicates, but
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to have the predicate on the pattern itself instead. Support for the new
ISel. Remove definitions of CarryDefIsUnused and CarryDefIsUsed since they are
no longer used anywhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96384 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 20:42:29 +00:00
Jim Grosbach
cd862b19b8
Remove redundant setting of Defs. CPSR is already marked by the block level set of Defs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96383 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 20:35:59 +00:00
Jim Grosbach
0a145f3d90
First step in eliminating the CarryDefIsUnused and CarryDefIsUsed predicates.
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They won't work with the new ISel mechanism, as Requires predicates are no
longer allowed to reference the node being selected. Moving the predicate to
the patterns instead solves the problem.
This patch handles ARM mode. Thumb2 will follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96381 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 20:17:57 +00:00
Johnny Chen
64dfb7835d
Added for disassembly the following instructions:
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o Store Return State (SRSW, SRS)
o Load/Store Coprocessor (LDC/STC and friends)
o MSR (immediate)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96380 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 20:04:27 +00:00
Bob Wilson
1665b0a224
Fix pr6111: Avoid using the LR register for the target address of an indirect
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branch in ARM v4 code, since it gets clobbered by the return address before
it is used. Instead of adding a new register class containing all the GPRs
except LR, just use the existing tGPR class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96360 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 17:24:15 +00:00
Duncan Sands
47c5188789
Introduce isOpaqueTy and use it rather than isa<OpaqueType>. Also, move some
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methods to try to have the type predicates be more logically positioned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96349 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 14:50:09 +00:00
Duncan Sands
1df9859c40
There are two ways of checking for a given type, for example isa<PointerType>(T)
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and T->isPointerTy(). Convert most instances of the first form to the second form.
Requested by Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96344 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 11:11:14 +00:00
Benjamin Kramer
30fb00aac0
Minor warning fixes (semicolons, newline at EOF).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96343 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 10:25:04 +00:00
Chris Lattner
ccba15f914
mark all the generated node predicates 'const'.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96337 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 07:26:36 +00:00
Chris Lattner
a08b587494
make pcrel immediate values relative to the start of the field,
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not the end of the field, fixing rdar://7651978
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96330 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 05:03:17 +00:00
Sanjiv Gupta
7643ca5c2b
The code section for an ISR has a specific address.
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Currently, whether a function is ISR or not is encoded in the section attribute for that function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96322 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 03:41:07 +00:00
Rafael Espindola
a3b1119977
Drop support for the InReg attribute on the ppc backend. This was used by
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llvm-gcc but has been replaced with pad argument which don't need any
special backend support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96312 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 01:50:18 +00:00
Bob Wilson
7dc9747e89
Put repeated empty pattern into the AQI instruction class.
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We could almost use a multiclass for the signed/unsigned instructions, but
there are only 6 of them so I guess it's not worth it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96297 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 23:43:47 +00:00
Anton Korobeynikov
46885ded4e
Fix a silly darwin-only typo introduced during merge.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96289 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 22:38:10 +00:00
Anton Korobeynikov
362dd0bef5
Move TLOF implementations to libCodegen to resolve layering violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96288 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 22:37:53 +00:00
Anton Korobeynikov
990a9fde39
Add suffix for stubs, so we won't have name clashes with private symbols.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96286 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 22:36:26 +00:00
Anton Korobeynikov
9184b25fa5
Preliminary patch to improve dwarf EH generation - Hooks to return Personality / FDE / LSDA / TType encoding depending on target / options (e.g. code model / relocation model) - MCIzation of Dwarf EH printer to use encoding information - Stub generation for ELF target (needed for indirect references) - Some other small changes here and there
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96285 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 22:35:59 +00:00
Chris Lattner
cd10d14b4c
revert r96241. It breaks two regression tests, isn't documented,
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and the testcase needs improvement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96265 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 20:53:01 +00:00
Evan Cheng
014bf215c3
Split SelectionDAGISel::IsLegalAndProfitableToFold to
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IsLegalToFold and IsProfitableToFold. The generic version of the later simply checks whether the folding candidate has a single use.
This allows the target isel routines more flexibility in deciding whether folding makes sense. The specific case we are interested in is folding constant pool loads with multiple uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96255 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 19:41:07 +00:00
David Greene
786da7dec2
Add support for emitting non-temporal stores for DAGs marked
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non-temporal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96241 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 17:02:56 +00:00
David Greene
db8d989ed5
Remove an assumption of default arguments. This is in anticipation of a
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change to SelectionDAG build APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96239 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 16:57:43 +00:00
David Greene
7720155bec
Remove an assumption of default arguments. This is in anticipation of a
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change to SelectionDAG build APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96238 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 16:57:13 +00:00
David Greene
54a7aa8429
Remove an assumption of default arguments. This is in anticipation of a
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change to SelectionDAG build APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96237 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 16:57:02 +00:00
David Greene
534502d1e9
Remove an assumption of default arguments. This is in anticipation of a
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change to SelectionDAG build APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96236 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 16:56:53 +00:00
David Greene
74a6a7990c
Remove an assumption of default arguments. This is in anticipation of a
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change to SelectionDAG build APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96235 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 16:56:34 +00:00
David Greene
4d58b64125
Remove an assumption of default arguments. This is in anticipation of a
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change to SelectionDAG build APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96234 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 16:56:22 +00:00
David Greene
f6fa186cf9
Remove an assumption of default arguments. This is in anticipation of a
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change to SelectionDAG build APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96233 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 16:56:10 +00:00
David Greene
73657df388
Remove an assumption of default arguments. This is in anticipation of a
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change to SelectionDAG build APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96232 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 16:55:58 +00:00
David Greene
f749efae8b
Remove an assumption of default arguments. This is in anticipation of a
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change to SelectionDAG build APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96231 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 16:55:37 +00:00
David Greene
1b58cab38c
Remove an assumption of default arguments. This is in anticipation of a
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change to SelectionDAG build APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96230 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 16:55:24 +00:00
David Greene
0e2236c70c
Remove an assumption of default arguments. This is in anticipation of a
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change to SelectionDAG build APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96229 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 16:55:07 +00:00
David Greene
67c9d42f93
Remove an assumption of default arguments. This is in anticipation of a
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change to SelectionDAG build APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96228 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 16:53:33 +00:00
David Greene
140a5d6413
Remove an assumption of default arguments. This is in anticipation of a
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change to SelectionDAG build APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96227 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 16:49:52 +00:00
Duncan Sands
b0bc6c361d
Uniformize the names of type predicates: rather than having isFloatTy and
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isInteger, we now have isFloatTy and isIntegerTy. Requested by Chris!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96223 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 16:12:20 +00:00
Andrew Lenharth
6ceeba6043
Fix changes from r75027
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96220 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 15:00:44 +00:00
Chris Lattner
020bb08026
no need to add the instruction count anymore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96212 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 06:38:41 +00:00
Chris Lattner
eb079a3491
mark "addr" as having type "iPTR", eliminating some type comparisons
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in hte generated dag isel fil.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96193 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-14 21:53:19 +00:00
Sanjiv Gupta
44de6823fc
fixes to pagesel/banksel inserter.
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1. restore these across direct/indirect calls.
2. restore pagesel for any macros with gotos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96175 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-14 18:27:42 +00:00
Anton Korobeynikov
77709ac7db
Forgot to commit the header
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96174 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-14 18:25:41 +00:00
Anton Korobeynikov
245ba9698e
Drop winmcasminfo and use normal AT&T COFF for all windows targets.
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Otherwise AT&T asm printer is used with non-compatible MCAsmInfo and
there is no way to override this behaviour.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96165 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-14 15:19:54 +00:00
Johnny Chen
2faf3919d4
Try to factorize the specification of saturating add/subtract operations a bit,
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as suggested by Bob Wilson.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96153 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-14 06:32:20 +00:00
Chris Lattner
1cea10a663
teach the encoder to handle pseudo instructions like FP_REG_KILL,
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encoding them into nothing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96110 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 19:16:53 +00:00
Daniel Dunbar
a8dfb79e6f
X86: Move extended MCFixupKinds into X86FixupKinds.h
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96088 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 09:27:52 +00:00
Chris Lattner
b779033a23
add encoder support and tests for rdtscp
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96076 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 03:42:24 +00:00
Johnny Chen
a1e7621510
Add SETEND and BXJ instructions for disassembly only.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96075 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 02:51:09 +00:00
Sean Callanan
cebe955779
Added the rdtscp instruction to the x86 instruction
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tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96073 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 02:06:11 +00:00
Evan Cheng
7545f49a5e
Teach MachineFrameInfo to track maximum alignment while stack objects are being
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created. This ensures it's updated at all time. It means targets which perform
dynamic stack alignment would know whether it is required and whether frame
pointer register cannot be made available register allocation.
This is a fix for rdar://7625239. Sorry, I can't create a reasonably sized test
case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96069 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 01:56:41 +00:00
Sean Callanan
95a5a7d570
Fixed encodings for invlpg, invept, and invvpid.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96065 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 01:48:34 +00:00
Johnny Chen
08b85f371e
Added a bunch of saturating add/subtract instructions for disassembly only.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96063 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 01:21:01 +00:00
Chris Lattner
f068304b1f
rip out the 'heinous' x86 MCCodeEmitter implementation.
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We still have the templated X86 JIT emitter, *and* the
almost-copy in X86InstrInfo for getting instruction sizes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96059 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 00:49:29 +00:00
Chris Lattner
a599de2410
remove special cases for vmlaunch, vmresume, vmxoff, and swapgs
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fix swapgs to be spelled right.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96058 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 00:41:14 +00:00
Daniel Dunbar
9c60f534cb
MC/X86: Push immediate operands as immediates not expressions when possible.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96055 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 00:17:21 +00:00
Chris Lattner
eaca5fa8e6
Remove special cases for [LM]FENCE, MONITOR and MWAIT from
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encoder and decoder by using new MRM_ forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96048 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 23:54:57 +00:00
Chris Lattner
4a2e5edb94
implement the rest of correct x86-64 encoder support for
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rip-relative addresses, and add a testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96040 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 23:24:09 +00:00
Dale Johannesen
15ce1d71f1
Add the problem I just hacked around in 96015/96020.
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The solution there produces correct code, but is seriously
deficient in several ways.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96039 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 23:16:24 +00:00
Chris Lattner
86020e4628
give MCCodeEmitters access to the current MCContext.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96038 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 23:12:47 +00:00
Chris Lattner
835acabce1
implement infrastructure to support fixups for rip-rel
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addressing. This isn't complete because I need an MCContext
to generate new MCExprs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96036 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 23:00:36 +00:00
Johnny Chen
f4d81051ff
Add YIELD, WFE, WFI, and SEV instructions for disassembly only.
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Plus add two formats: MiscFrm and ThumbMiscFrm. Some of the for disassembly
only instructions are changed from Pseudo Format to MiscFrm Format.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96032 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 22:53:19 +00:00
Chris Lattner
1e35d0e923
pull the rip-relative addressing mode case up early.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96031 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 22:47:55 +00:00
Chris Lattner
9cc48eb897
fixme resolved!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96029 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 22:39:06 +00:00
Chris Lattner
cf65339b52
start producing reloc_pcrel_4byte/reloc_pcrel_1byte for calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96028 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 22:36:47 +00:00
Chris Lattner
a0331199fc
enhance the immediate field encoding to know whether the immediate
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is pc relative or not, mark call and branches as pcrel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96026 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 22:27:07 +00:00
Evan Cheng
3f7aa79c2a
Load / store multiple instructions cannot load / store sp. Sorry, can't come up with a reasonable test case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96023 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 22:17:21 +00:00
Dale Johannesen
ee25bc2942
This should have gone in with 26015, see comments there.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96020 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 22:00:40 +00:00
Johnny Chen
83498e55e2
Add halfword multiply accumulate long SMLALBB/BT/TB/TT for disassembly only.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96019 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 21:59:23 +00:00
Dale Johannesen
c12da8d30a
When save/restoring CR at prolog/epilog, in a large
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stack frame, the prolog/epilog code was using the same
register for the copy of CR and the address of the save slot. Oops.
This is fixed here for Darwin, sort of, by reserving R2 for this case.
A better way would be to do the store before the decrement of SP,
which is safe on Darwin due to the red zone.
SVR4 probably has the same problem, but I don't know how to fix it;
there is no red zone and R2 is already used for something else.
I'm going to leave it to someone interested in that target.
Better still would be to rewrite the CR-saving code completely;
spilling each CR subregister individually is horrible code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96015 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 21:35:34 +00:00
Chris Lattner
fdfeb6976f
Add support for a union type in LLVM IR. Patch by Talin!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96011 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 20:49:41 +00:00
Johnny Chen
b3e1bf54b2
Add SWP (Swap) and SWPB (Swap Byte) for disassembly only.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96010 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 20:48:24 +00:00
Johnny Chen
b98e160318
Add CPS, MRS, MRSsys, MSR, MSRsys for disassembly only.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95999 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 18:55:33 +00:00
Anton Korobeynikov
ebb0c2b287
Setup correct data layout to match gcc's expectations on mingw32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95981 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 15:28:56 +00:00
Anton Korobeynikov
4dd162f394
Cleanup stdcall / fastcall name mangling.
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This should fix alot of problems we saw so far, e.g. PRs 5851 & 2936
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95980 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 15:28:40 +00:00
Chris Lattner
0d8db8e0a8
add a bunch of mod/rm encoding types for fixed mod/rm bytes.
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This will work better for the disassembler for modeling things
like lfence/monitor/vmcall etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95960 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 02:06:33 +00:00
Chris Lattner
c96f6d606f
revert r95949, it turns out that adding new prefixes is not a
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great solution for the disassembler, we'll go with "plan b".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95957 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 01:55:31 +00:00
Johnny Chen
906d57ffe8
Added coprocessor Instructions CDP, CDP2, MCR, MCR2, MRC, MRC2, MCRR, MCRR2,
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MRRC, MRRc2. For disassembly only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95955 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 01:44:23 +00:00
Daniel Dunbar
ccfa1db538
X86: Fix definition for RCL/RCR.*m? operations -- they were getting represented
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with "tied memory operands", which is wrong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95950 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 01:22:03 +00:00
Chris Lattner
239a1edbab
add another bit of space for new kinds of instruction prefixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95949 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 01:15:16 +00:00
Nate Begeman
7cdba6d1f4
Add a missing pattern for movhps so that we get:
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movq (%ecx,%edx,2), %xmm2
movhps (%ecx,%eax,2), %xmm2
rather than:
movq (%eax, %edx, 2), %xmm2
movq (%eax, %ebx, 2), %xmm3
movlhps %xmm3, %xmm2
Testcase forthcoming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95948 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 01:10:45 +00:00
Chris Lattner
c4d3f662fc
fix the encodings of monitor and mwait, which were completely
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busted in both encoders. I'm not bothering to fix it in the
old one at this point.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95947 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 01:06:22 +00:00
Chris Lattner
0d7b0aa760
enhance llvm-mc -show-inst to print the enum of an instruction, like so:
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testb %al, %al ## <MCInst #2412 TEST8rr
## <MCOperand Reg:2>
## <MCOperand Reg:2>>
jne LBB1_7 ## <MCInst #938 JNE_1
## <MCOperand Expr:(LBB1_7)>>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95935 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 22:57:32 +00:00
Chris Lattner
7e85180d15
add a new MCInstPrinter::getOpcodeName interface, when it is
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implemented, llvm-mc --show-inst now uses it to print the
instruction opcode as well as the number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95929 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 22:39:10 +00:00
Chris Lattner
b8db331588
improve encoding information for branches. We now know they have
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8 or 32-bit immediates, which allows the new encoder to handle
them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95927 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 21:45:31 +00:00
Chris Lattner
8d31de6268
make getFixupKindInfo return a const reference, allowing
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the tables to be const. Teach MCCodeEmitter to handle
the target-indep kinds so that we don't crash on them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95924 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 21:27:18 +00:00
Chris Lattner
11eafa8bed
switch to target-indep fixups for 1/2/4/8 byte data.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95920 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 21:17:54 +00:00
Johnny Chen
e4c7f0f6ec
Added LDRT/LDRBT/STRT/STRBT for disassembly only.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95916 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 20:31:08 +00:00
Chris Lattner
8b442a814e
unbreak the build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95915 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 19:52:11 +00:00
Chris Lattner
bd13fb6254
refactor the conditional jump instructions in the .td file to
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use a multipattern that generates both the 1-byte and 4-byte
versions from the same defm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95901 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 19:25:55 +00:00
Johnny Chen
811663f799
Forgot to also check in this file for vcvt (floating-point <-> fixed-point, VFP).
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Sorry!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95892 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 18:47:03 +00:00
Johnny Chen
27bb8d0a88
Added VCVT (between floating-point and fixed-point, VFP) for disassembly.
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A8.6.297
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95885 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 18:17:16 +00:00
Johnny Chen
c6f7b27fda
Added BKPT/tBKPT (breakpoint) to the instruction table for disassembly purpose.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95884 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 18:12:29 +00:00
Johnny Chen
ba6e033f4f
Add pseudo instruction TRAP for disassembly, which is encoded according to A5-21
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as the "Permanently UNDEFINED" instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95873 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 17:14:31 +00:00
Chris Lattner
ecfb3c3d66
dont' call getX86RegNum on X86::RIP, it doesn't like that. This
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fixes the remaining x86-64 jit failures afaik.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95867 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 08:45:56 +00:00
Chris Lattner
5526b69901
fix a really nasty bug I introduced in r95693: r12 (and r12d,
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r12b, etc) also encodes to a R/M value of 4, which is just
as illegal as ESP/RSP for the non-sib version an address.
This fixes x86-64 jit miscompilations of a bunch of programs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95866 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 08:41:21 +00:00
Chris Lattner
8b0f7a7d86
Add and commonize encoder support for all immediates.
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Stub out some dummy fixups to make things work.
We can now emit fixups like this:
subl $20, %esp ## encoding: [0x83,0xec,A]
## fixup A - offset: 2, value: 20, kind: fixup_1byte_imm
Emitting $20 as a single-byte fixup to be later resolved
by the assembler is ridiculous of course (vs just emitting
the byte) but this is a failure of the matcher, which
should be producing an imm of 20, not an MCExpr of 20.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95860 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 07:06:31 +00:00
Chris Lattner
a38c707d82
generalize EmitDisplacementField to work with any size
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and rename it to EmitImmediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95859 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 06:54:23 +00:00
Chris Lattner
0e410918b8
eliminate the dead IsPCRel argument.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95858 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 06:51:36 +00:00
Chris Lattner
1b67060645
eliminate the dead "PCAdj" logic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95857 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 06:49:52 +00:00
Mon P Wang
f7ea6c3ee8
The previous fix of widening divides that trap was too fragile as it depends on custom
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lowering and requires that certain types exist in ValueTypes.h. Modified widening to
check if an op can trap and if so, the widening algorithm will apply only the op on
the defined elements. It is safer to do this in widening because the optimizer can't
guarantee removing unused ops in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95823 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 23:37:45 +00:00
Eli Friedman
11d91e80b4
A few missed optimizations; the last one could have a significant impact on
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code with lots of bitfields.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95809 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 21:26:04 +00:00
Daniel Dunbar
1b6c060591
MC/X86 AsmMatcher: Fix a use after free spotted by d0k, and de-XFAIL
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x86_32-encoding.s in on expectation of it passing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95806 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 21:19:28 +00:00
Johnny Chen
85d5a89f8d
Added NOP, DBG, SVC to the instruction table for disassembly purpose.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95784 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 18:02:25 +00:00
Dan Gohman
f451cb870e
Fix "the the" and similar typos.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95781 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 16:03:48 +00:00
Chris Lattner
5dccfadbf4
emit some simple (and probably incorrect) fixups for symbolic
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displacement values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95773 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 06:52:12 +00:00
Chris Lattner
37ce80eca3
keep track of what the current byte being emitted is
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throughout the X86 encoder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95771 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 06:41:02 +00:00
Chris Lattner
8496a26113
simplify displacement handling, emit displacements by-operand
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even for the immediate case. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95770 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 06:30:00 +00:00
Daniel Dunbar
5d5a1e13a1
MC: Switch MCFixup to just hold an MCExpr pointer instead of index into the
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MCInst it came from.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95767 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 04:47:08 +00:00
Chris Lattner
8e089a9e4d
print all the newlines at the end of instructions with
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OutStreamer.AddBlankLine instead of textually.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95734 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 00:36:00 +00:00
Kevin Enderby
40fe18f66e
Fix the encoding of the movntdqa X86 instruction. It was missing the 0x66
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prefix which is part of the opcode encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95729 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 00:10:31 +00:00
Chris Lattner
5d672cfab0
Add ability for MCInstPrinters to add comments for instructions.
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Enhance the x86 backend to show the hex values of immediates in
comments when they are large. For example:
movl $1072693248, 4(%esp) ## imm = 0x3FF00000
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95728 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 00:10:18 +00:00
David Greene
51898d7a89
TableGen fragment refactoring.
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Move some utility TableGen defs, classes, etc. into a common file so
they may be used my multiple pattern files. We will use this for
the AVX specification to help with the transition from the current
SSE specification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95727 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 23:52:19 +00:00
Johnny Chen
4814e711ab
Add VBIF/VBIT for disassembly only.
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A8.6.279
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95713 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 23:05:23 +00:00
Daniel Dunbar
869fe12cc0
MC/X86: Add a dummy implementation of MCFixup generation for hacky X86 MCCodeEmitter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95709 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 23:00:03 +00:00
Daniel Dunbar
73c557458c
MC: First cut at MCFixup, for getting fixup/relocation information out of an MCCodeEmitter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95708 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 22:59:55 +00:00
Johnny Chen
c9745049e6
Added VMRS/VMSR for disassembly only.
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A8.6.335 & A8.6.336
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95703 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 22:35:38 +00:00
Chris Lattner
a8168ec732
port encoder enhancements over to the new encoder.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95699 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 21:57:34 +00:00
Chris Lattner
9e8528fc5c
fix X86 encoder to output [disp] only addresses with no SIB byte
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in X86-32 mode. This is still required in x86-64 mode to avoid
forming [disp+rip] encoding. Rewrite the SIB byte decision logic
to be actually understandable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95693 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 21:47:19 +00:00
Chris Lattner
32f9a2c54e
revert r95689: getX86RegNum(BaseReg) != N86::ESP is
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a confusing idiom to check for ESP or RSP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95690 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 21:21:26 +00:00
Chris Lattner
203efab2a5
simplify.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95689 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 21:00:12 +00:00
Chris Lattner
518bb53485
move target-independent opcodes out of TargetInstrInfo
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into TargetOpcodes.h. #include the new TargetOpcodes.h
into MachineInstr. Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the
codebase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 19:54:29 +00:00
Jim Grosbach
4152778605
Radar 7417921
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tMOVCCi pattern only valid for low registers, as the Thumb1 mov immediate to
register instruction only works with low registers. Allowing high registers
for the instruction resulted in the assembler choosing the wide (32-bit)
encoding for the mov, but LLVM though the instruction was only 16 bits wide,
so offset calculations for constant pools became incorrect, leading to
out of range constant pool entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95686 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 19:51:37 +00:00
Johnny Chen
2d658df873
Added vcvtb/vcvtt (between half-precision and single-precision, VFP).
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For disassembly only.
A8.6.300
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95669 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 17:21:56 +00:00
Chris Lattner
97dce2a9aa
move PR3462 to here.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95650 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 05:55:14 +00:00
Chris Lattner
1728472726
add a note from PR6194
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95649 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 05:45:29 +00:00
Chris Lattner
e16b0fc3cb
Implement x86 asm parsing support for %st and %st(4)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 00:49:22 +00:00
Chris Lattner
b8d6e98e56
pass stringref by value instead of by const&
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95627 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 00:34:28 +00:00
Chris Lattner
cf031f6d66
move PR6212 to this file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95624 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 00:11:10 +00:00
Chris Lattner
c133457269
this is done, tested by CodeGen/ARM/iabs.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95609 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-08 23:48:10 +00:00
Jim Grosbach
a87ded2695
tighten up eh.setjmp sequence a bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95603 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-08 23:22:00 +00:00
Chris Lattner
3484110c67
unify the paths for external symbols and global variables:
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2 files changed, 48 insertions(+), 83 deletions(-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95599 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-08 23:03:41 +00:00
Chris Lattner
8fb2e233a0
switch the rest of the "@ concatentation" logic in the X86
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backend to use X86MCTargetExpr, simplifying a bunch of code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95595 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-08 22:52:47 +00:00
Sean Callanan
3bdbdd06c8
Fixed the AT&T AsmLexer to report the proper strings
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for register tokens. Before, if it encountered
'%al,' it would report 'al,' as the token. Now it
correctly reports '%al'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95594 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-08 22:50:23 +00:00
Chris Lattner
017ec35e28
switch ELF @GOTOFF references to use X86MCTargetExpr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95593 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-08 22:33:55 +00:00
Chris Lattner
25ceb5f317
add an x86 implementation of MCTargetExpr for
...
representing @GOT and friends. Use it for
personality references as a first use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95588 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-08 22:09:08 +00:00
Johnny Chen
15b423f772
Add VCVTR (between floating-point and integer, VFP) for disassembly purpose.
...
The 'R' suffix means the to-integer operations use the rounding mode specified
by the FPSCR, encoded as Inst{7} = 0.
A8.6.295
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95584 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-08 22:02:41 +00:00
Dan Gohman
1797ed50f4
Rename the PerformTailCallOpt variable to GuaranteedTailCallOpt to reflect
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its current purpose.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95564 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-08 20:27:50 +00:00
Johnny Chen
7edd8e38c4
Add VCMP (VFP floating-point compare without 'E' bit set) for disassembly purpose.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95560 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-08 19:41:48 +00:00
Johnny Chen
23401d6f8c
Added VMOVRRS/VMOVSRR to ARMInstrVFP.td for disassembly purpose.
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A8.6.331 VMOV (between two ARM core registers and two single-precision registers)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95548 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-08 17:26:09 +00:00
Torok Edwin
acf2a65786
Fix x86 JIT stub on MSVC.
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Thanks to Kristaps Straupe for noticing the bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95537 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-08 08:37:27 +00:00
Bruno Cardoso Lopes
6059b8551d
Add suport for VASTART on Mips.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95506 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-06 21:00:02 +00:00
Bruno Cardoso Lopes
b37a742333
First step towards varargs support in Mips:
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- o32 cc must pass all arguments in A0...A3 and stack regardless
if its type (but respect the alignment).
- Store all variable arguments back to the caller stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95500 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-06 19:20:49 +00:00
Evan Cheng
00a99a3584
Run codegen dce pass for all targets at all optimization levels. Previously it's
...
only run for x86 with fastisel. I've found it being very effective in
eliminating some obvious dead code as result of formal parameter lowering
especially when tail call optimization eliminated the need for some of the loads
from fixed frame objects. It also shrinks a number of the tests. A couple of
tests no longer make sense and are now eliminated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95493 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-06 09:07:11 +00:00
Rafael Espindola
2f82ca904a
Fix alignment on ppc linux. This fixes the build of crtend.o
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95477 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-06 03:32:21 +00:00
Evan Cheng
f22f9b35d6
Do not emit callseq instructions around sibcalls. This eliminated some unnecessary stack adjustments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95475 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-06 03:28:46 +00:00
Jakob Stoklund Olesen
570a4a5d9c
Reintroduce the InlineHint function attribute.
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This time it's for real! I am going to hook this up in the frontends as well.
The inliner has some experimental heuristics for dealing with the inline hint.
When given a -respect-inlinehint option, functions marked with the inline
keyword are given a threshold just above the default for -O3.
We need some experiments to determine if that is the right thing to do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95466 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-06 01:16:28 +00:00
Bob Wilson
e6373eb826
Handle AddrMode6 (for NEON load/stores) in Thumb2's rewriteT2FrameIndex.
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Radar 7614112.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95456 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-06 00:24:38 +00:00
Chris Lattner
8f60e4d679
fix incorrect encoding of SBB8mi that Kevin noticed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95448 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 22:56:11 +00:00
Chris Lattner
3f1118310e
fix a case where we'd mis-encode fisttp because of an incorrect (and
...
redundant with a correct one) pattern that was added for the disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95446 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 22:49:06 +00:00
Chris Lattner
faa75f6f6f
add note.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95445 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 22:48:33 +00:00
Chris Lattner
39a612e6f9
port X86InstrInfo::determineREX over to the new encoder.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95440 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 22:10:22 +00:00
Chris Lattner
00cb3fe786
wire up 64-bit MCCodeEmitter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95438 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 21:51:35 +00:00
Chris Lattner
be1778fea7
really kill off the last MRMInitReg inst, remove logic from encoder.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95437 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 21:34:18 +00:00
Chris Lattner
28c1d29b09
lower the last of the MRMInitReg instructions in MCInstLower.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95435 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 21:30:49 +00:00
Chris Lattner
35e0e84f93
teach X86MCInstLower to lower the MOV32r0 and MOV8r0
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pseudo instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95433 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 21:21:06 +00:00
Chris Lattner
ff928976f8
genericize helpers, use them for MOV16r0/MOV64r0
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95432 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 21:15:57 +00:00
Chris Lattner
c74e333ecc
factor code better in X86MCInstLower::Lower, teach it to
...
lower the SETB* instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95431 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 21:13:48 +00:00
Chris Lattner
82ed17eb47
implement the rest of the encoding types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95414 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 19:37:31 +00:00
Chris Lattner
74a2151392
move functions for decoding X86II values into the X86II namespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95410 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 19:24:13 +00:00
Chris Lattner
a62fe66f99
constant propagate a method away.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95408 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 19:20:30 +00:00
Chris Lattner
a3a0db0121
change getSizeOfImm and getBaseOpcodeFor to just take
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TSFlags directly instead of a TargetInstrDesc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95405 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 19:16:26 +00:00
Chris Lattner
daa4555793
add some more encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95403 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 19:04:37 +00:00
Johnny Chen
7acca6707b
VMOVRRD and VMOVDRR both have Inst{7-6} = 0b00.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95397 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 18:04:58 +00:00
Chris Lattner
0e73c39c70
implement the non-relocation forms of memory operands
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95368 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 06:16:07 +00:00
Evan Cheng
5f94193b36
Handle tail call with byval arguments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95351 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 02:21:12 +00:00
Chris Lattner
1ac23b1038
start adding MRMDestMem, which requires memory form mod/rm encoding
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to start limping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95350 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 02:18:40 +00:00
Chris Lattner
28249d98e1
Add a few more encodings, we can now encode all of:
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pushl %ebp
movl %esp, %ebp
movl $42, %eax
popl %ebp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95344 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 01:53:19 +00:00
Evan Phoenix
85bb54f964
Disable external stubs for X86-32 and X86-64
...
Instruction selection for X86 now can choose an instruction
sequence that will fit any address of any symbol, no matter
the pointer width. X86-64 uses a mov+call-via-reg sequence
for this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95323 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-04 19:56:59 +00:00
Chris Lattner
7db21bdb7d
move the PR6214 microoptzn to this file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95299 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-04 07:32:01 +00:00
Evan Cheng
1f2fda97b1
Re-enable x86 tail call optimization.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95295 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-04 06:47:24 +00:00
Chris Lattner
87c06d6179
add support for the sparcv9-*-* target triple to turn on
...
64-bit sparc codegen. Patch by Nathan Keynes!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95293 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-04 06:34:01 +00:00
Evan Cheng
dcea16313d
Indirect tail call has to go through a call preserved register since it's after callee register pops. X86 isel lowering is using EAX / R11 and it was somehow adding that to function live out. That prevented the real function return register from being added to the function live out list and bad things happen.
...
This fixes 483.xalancbmk (with tail call opt).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95280 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-04 02:40:39 +00:00
Dale Johannesen
c4b94e02af
Rewrite FP constant handling in DEBUG_VALUE yet
...
again, so it more or less handles long double.
Restore \n removed in latest MC frenzy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95271 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-04 01:33:43 +00:00
Chris Lattner
1e80f403e2
enhance new encoder to support prefixes + RawFrm
...
instructions with no operands. It can now handle
define void @test2() nounwind { ret void }
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95261 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 21:57:59 +00:00
Chris Lattner
92b1dfe5d8
set up some infrastructure, some minor cleanups.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95260 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 21:43:43 +00:00
Evan Cheng
8148ae8847
Speculatively disable x86 automatic tail call optimization while we track down a self-hosting issue.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95259 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 21:40:40 +00:00
Chris Lattner
4576247928
stub out a new X86 encoder, which can be tried with
...
-enable-new-x86-encoder until its stable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95256 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 21:24:49 +00:00
Chris Lattner
ce79a25980
rename createX86MCCodeEmitter to more accurately reflect what it creates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95254 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 21:14:33 +00:00
Kevin Enderby
12ce0de462
Added support for X86 instruction prefixes so llvm-mc can assemble them. The
...
Lock prefix, Repeat string operation prefixes and the Segment override prefixes.
Also added versions of the move string and store string instructions without the
repeat prefixes to X86InstrInfo.td. And finally marked the rep versions of
move/store string records in X86InstrInfo.td as isCodeGenOnly = 1 so tblgen is
happy building the disassembler files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95252 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 21:04:42 +00:00
Chris Lattner
beb42691b1
reapply r95206, this time actually delete the code I'm replacing in the third stub case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95209 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 06:42:38 +00:00
Chris Lattner
8427d2b0c6
revert r95206, it is apparently causing bootstrap failure on i386-darwin9
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95208 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 06:41:18 +00:00
Chris Lattner
ce2a725a72
make the x86 backend emit darwin stubs through mcstreamer
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instead of textually.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95206 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 06:21:16 +00:00
Chris Lattner
d269a6e460
make MachineModuleInfoMachO hold non-const MCSymbol*'s instead
...
of const ones. non-const ones aren't very useful, because you can't
even, say, emit them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95205 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 06:18:30 +00:00
Evan Cheng
86809ccdad
Allow all types of callee's to be tail called. But avoid automatic tailcall if the callee is a result of bitcast to avoid losing necessary zext / sext etc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95195 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 03:28:02 +00:00
Chris Lattner
d26a80f666
don't emit \n's at the start of X86AsmPrinter::runOnMachineFunction,
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.o files don't like that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95187 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 01:49:49 +00:00
Chris Lattner
99d806186e
rename printMachineInstruction -> EmitInstruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95184 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 01:41:03 +00:00
Chris Lattner
850d2e2a1b
print instructions through the mcstreamer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95181 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 01:16:28 +00:00
Chris Lattner
db0273184b
emit instructions through the streamer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95180 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 01:15:03 +00:00
Chris Lattner
c760be99db
Finally eliminate printMCInst and send instructions through
...
the streamer. Demo:
$ cat t.ll
define i32 @test() nounwind {
ret i32 42
}
$ llc t.ll -o -
...
_test:
movl $42, %eax
ret
$ llc t.ll -o t.o -filetype=obj
$ otool -tv t.o
t.o:
(__TEXT,__text) section
_test:
00000000 movl $0x0000002a,%eax
00000005 ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95179 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 01:13:25 +00:00
Chris Lattner
d1ff72b8a7
rejigger the world so that EmitInstruction prints the \n at
...
the end of the instruction instead of expecting the caller to
do it. This currently causes the asm-verbose instruction
comments to be on the next line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95178 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 01:09:55 +00:00
Chris Lattner
0d883e3f84
sink handling of target-independent machine instrs (other
...
than DEBUG_VALUE :( ) into the target indep AsmPrinter.cpp
file. This allows elimination of the
NO_ASM_WRITER_BOILERPLATE hack among other things.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95177 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 01:00:52 +00:00
Dale Johannesen
b0e94241dd
Print FPImm a less kludgy way; APFloat.toString seems
...
to have some problems anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95171 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 00:36:40 +00:00
Evan Cheng
90567c3560
ByVal frame object size should be that of the byval argument, not the size of the type which is just a pointer. This is not known to break stuff but is wrong nevertheless.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95163 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 23:58:13 +00:00
Jim Grosbach
985d45dea3
As of r79039, we still try to eliminate the frame pointer on leaf functions,
...
even when -disable-fp-elim is specified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95161 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 23:56:14 +00:00
Evan Cheng
022d9e1cef
Revert 95130.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95160 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 23:55:14 +00:00
Dale Johannesen
9d73d78f45
Accept floating point immediates in DEBUG_VALUE.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95159 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 23:54:23 +00:00
Daniel Dunbar
e7070e9006
AsmParser/X86: Add temporary hack to allow parsing "sal". Eventually we need
...
some mechanism for specifying alternative syntaxes, but I'm not sure what form
that should take yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95158 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 23:46:47 +00:00
Chris Lattner
56591ab218
refactor code so that LLVMTargetMachine creates the asmstreamer and
...
mccontext instead of having AsmPrinter do it. This allows other
types of MCStreamer's to be passed in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95155 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 23:37:42 +00:00
Chris Lattner
55fed86353
tidy some targets.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95146 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 22:13:21 +00:00
Chris Lattner
7f89fdae34
remove dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95144 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 22:03:00 +00:00
Chris Lattner
fc89bc903c
detemplatize the ppc code emitter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95142 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 21:55:58 +00:00
Chris Lattner
5335bce43d
remove dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95141 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 21:52:03 +00:00
Chris Lattner
fce4aef806
add a definition for ID.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95140 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 21:49:29 +00:00
Chris Lattner
33fabd7cc1
detemplatize ARM code emitter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95138 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 21:48:51 +00:00
Daniel Dunbar
7b9147afa7
MCAsmParser/X86: Represent absolute memory operands as CodeGen does, with scale
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== 1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95137 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 21:44:16 +00:00
Daniel Dunbar
1945e179e1
MCCodeEmitter/X86: Handle tied registers better when converting MCInst ->
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MCMachineInstr. This also fixes handling of tied registers for MRMSrcMem
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95136 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 21:44:10 +00:00
Chris Lattner
e0faa54705
remove dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95134 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 21:38:59 +00:00
Chris Lattner
782ebe47bb
detemplatize alpha code emission, it is now JIT specific.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95133 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 21:35:47 +00:00
Chris Lattner
f1d6b107d2
eliminate all the dead addSimpleCodeEmitter implementations.
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eliminate random "code emitter" stuff in Alpha, except for
the JIT path. Next up, remove the template cruft.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95131 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 21:31:47 +00:00
Evan Cheng
942619695f
Pass callsite return type to TargetLowering::LowerCall and use that to check sibcall eligibility.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95130 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 21:29:10 +00:00
Chris Lattner
211edae484
eliminate FileModel::Model, just use CodeGenFileType. The client
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of the code generator shouldn't care what object format a target
uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95124 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 21:06:45 +00:00
Chris Lattner
4db361395b
remove the remnants of TargetMachOWriterInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95114 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 19:41:23 +00:00
Johnny Chen
9474d550ff
Added t2BFI (Bitfield Insert) entry for disassembler, with blank pattern field.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95112 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 19:31:58 +00:00
Chris Lattner
6914b8611a
remove PPCMachOWriterInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95111 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 19:23:55 +00:00
Evan Cheng
b2c9290a01
Perform sibcall in some cases when arguments are passes memory. Look for cases
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where callee's arguments are already in the caller's own caller's stack and
they line up perfectly. e.g.
extern int foo(int a, int b, int c);
int bar(int a, int b, int c) {
return foo(a, b, c);
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95053 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 02:22:50 +00:00
Johnny Chen
92e63d817f
MOVi16 should also be marked as a UnaryDP instruction, i.e., it doesn't have a
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Rn operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95025 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-01 23:06:04 +00:00
Evan Cheng
7276c8c2b5
Fix PR6196. GV callee may not be a function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95017 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-01 22:40:09 +00:00
Bruno Cardoso Lopes
9a720b0b0e
MulOp is actually a Mips specific node, so do the match using Opcode. This fixes PR6192
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94977 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-01 12:16:39 +00:00
Evan Cheng
0a4fd46d9e
Undo r94946 now all the tests are passing again.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94970 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-01 02:13:39 +00:00
Bruno Cardoso Lopes
bdef66bf7f
Fix stack size bug while using o32 abi
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94969 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-01 02:03:24 +00:00
Johnny Chen
48d5ccf86a
For MVNr and MVNs, we need to set Inst{25} = 0 so as not to confuse the decoder.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94955 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-31 11:22:28 +00:00
Evan Cheng
aa92bec010
Change TAILJMP's to be varargs and transfer implicit uses over from TCRETURN's. Otherwise the missing uses can make post-regalloc scheduling do bad things. This fixes 403.gcc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94950 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-31 07:28:44 +00:00
Evan Cheng
e626b0f6b1
Fix a missing check from my last commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94949 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-31 07:27:31 +00:00
Evan Cheng
843bd699f6
Avoid recursive sibcall's.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94946 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-31 06:44:49 +00:00
Eli Friedman
1144d7e3cc
Remove a completed item, add a couple new ones.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94945 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-31 04:55:32 +00:00
Sean Callanan
894c1af05f
Moved InstallLexer() from the X86-specific AsmLexer
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to the TargetAsmLexer class so that clients can
actually use the TargetAsmLexer they get from a
Target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94940 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-31 02:28:18 +00:00
Bruno Cardoso Lopes
3ed6f876c8
Fix PR6144. Reload GP before the emission of CALLSEQ_END to guarantee the right reload order
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94915 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-30 18:32:07 +00:00
Bruno Cardoso Lopes
5e194602a4
Fix mov.d out register by using the FFR register class directly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94914 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-30 18:29:19 +00:00
Anton Korobeynikov
90cfc130d6
Fix a gross typo: ARMv6+ may or may not support unaligned memory operations.
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Even if they are suported by the core, they can be disabled
(this is just a configuration bit inside some register).
Allow unaligned memops on darwin and conservatively disallow them otherwise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94889 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-30 14:08:12 +00:00
Evan Cheng
a6bff982c1
Allow more tailcall optimization: calls with inputs that are all passed in registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94873 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-30 01:22:00 +00:00
Evan Cheng
1d885c0ede
Don't forget to transfer target flag when inserting a tailcall instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94872 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-30 01:16:15 +00:00
Daniel Dunbar
b834f5d13d
MC/X86 AsmParser: Handle absolute memory operands correctly. We were doing
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something totally broken and parsing them as immediates, but the .td file also
had the wrong match class so things sortof worked. Except, that is, that we
would parse
movl $0, %eax
as
movl 0, %eax
Feel free to guess how well that worked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94869 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-30 01:02:48 +00:00
Daniel Dunbar
728e5eb927
X86.td: Refactor to bring operands that use print_pcrel_imm together.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94861 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-30 00:24:12 +00:00
Daniel Dunbar
ec2b1f1beb
AsmMatcher/X86: Separate out sublass for memory operands that have no segment
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register, and use to cleanup a FIXME in X86AsmParser.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94859 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-30 00:24:00 +00:00
Johnny Chen
69a8c7f497
Modified encoding bits specification for VFP instructions. In particular, the D
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bit (Inst{22}) and the M bit (Inst{5}) should be left unspecified. For binary
format instructions, Inst{6} and Inst{4} need to specified for proper decodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94855 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-29 23:21:10 +00:00
Evan Cheng
6c2e8a9217
PPC is not ready for sibcall optimization.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94853 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-29 23:05:56 +00:00
Dale Johannesen
973f46790f
Add assertion to humor the paranoid.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94843 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-29 21:21:28 +00:00
Bob Wilson
3eb4f7e2dd
Improve isSafeToLoadUnconditionally to recognize that GEPs with constant
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indices are safe if the result is known to be within the bounds of the
underlying object.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94829 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-29 19:19:08 +00:00
Evan Cheng
7096ae48c9
Catch more trivial tail call opportunities: no inputs and output types match.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94804 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-29 06:45:59 +00:00
Sean Callanan
95fcebd5c4
Added a custom TableGen backend to support the
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enhanced disassembler, and the necessary makefile
rules to build the table for X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94764 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-29 00:21:04 +00:00
Benjamin Kramer
12ea66a727
Replace strcpy with memcpy when we have the length around anyway.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94746 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-28 18:04:38 +00:00
Chris Lattner
a34103f6fa
convert the last 3 targets to use EmitFunctionBody() now that
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it has before/end body hooks.
lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp | 49 ++-----------
lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp | 87 ++++++------------------
lib/Target/XCore/AsmPrinter/XCoreAsmPrinter.cpp | 56 +++------------
test/CodeGen/XCore/ashr.ll | 2
4 files changed, 48 insertions(+), 146 deletions(-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94741 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-28 06:22:43 +00:00
Evan Cheng
5fef8bc1cb
Fix a bug introduced by r94490 where it created a X86ISD::CMP whose output type is different from its inputs.
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This fixes PR6146.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94731 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-28 01:57:22 +00:00
Chris Lattner
a6086fc975
switch blackfin to the default runOnMachineFunction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94729 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-28 01:54:33 +00:00
Chris Lattner
08acebc511
eliminate a now-useless class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94728 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-28 01:50:22 +00:00
Chris Lattner
745ec06ad2
Switch MSP430, SPU, Sparc, and SystemZ to use EmitFunctionBody().
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Diffstat:
6 files changed, 30 insertions(+), 284 deletions(-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94727 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-28 01:48:52 +00:00
Chris Lattner
d49fe1b6bc
Give AsmPrinter the most common expected implementation of
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runOnMachineFunction, and switch PPC to use EmitFunctionBody.
The two ppc asmprinters now don't heave to define
runOnMachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94722 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-28 01:28:58 +00:00
Chris Lattner
a786ceac5c
switch ARM to EmitFunctionBody().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94719 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-28 01:10:34 +00:00