Thomas Harte
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616ccbb878
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Correct ID bit placement, multiplex with motor state.
The latter per my reading of http://www.primrosebank.net/computers/amiga/upgrades/amiga_upgrades_storage_fdis.htm
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2021-10-08 04:05:57 -07:00 |
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Thomas Harte
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5899af0038
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Starts accumulating disk data.
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2021-10-07 05:11:32 -07:00 |
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Thomas Harte
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33ff4f3b5c
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Eliminate drive copies.
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2021-10-06 13:40:28 -07:00 |
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Thomas Harte
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20bad38d42
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Add drive activity lights.
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2021-10-06 04:54:40 -07:00 |
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Thomas Harte
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92a07398cd
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I think CHNG works the other way around.
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2021-10-06 04:47:52 -07:00 |
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Thomas Harte
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e961d0b4a3
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Switch RDY type.
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2021-10-06 04:41:09 -07:00 |
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Thomas Harte
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2253ff656a
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Adds route for inserting disks.
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2021-10-05 16:12:30 -07:00 |
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Thomas Harte
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18631399ad
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Attempts to clock the disk controller.
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2021-10-05 15:38:56 -07:00 |
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Thomas Harte
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ad4afcdcd5
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Switch stepping direction.
Empirically, based on the actions of Kickstart, and assuming my confusion is because the relevant signal is active low.
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2021-10-05 15:23:48 -07:00 |
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Thomas Harte
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2cf5bcc5db
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Clarify logic somewhat.
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2021-10-05 15:20:05 -07:00 |
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Thomas Harte
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1180ad7662
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Disables a couple of now-trustworthy LOGs.
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2021-10-05 06:51:47 -07:00 |
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Thomas Harte
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5463cd1ae3
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Attempts to support stepping and head selection.
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2021-10-05 06:36:17 -07:00 |
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Thomas Harte
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647ec770ce
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Implements motor latching, drive ID shift registers.
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2021-10-05 05:12:01 -07:00 |
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Thomas Harte
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e47bec2e65
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Switch CIA B ports over.
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2021-10-05 03:38:11 -07:00 |
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Thomas Harte
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674941abdf
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Starts to add a disk controller.
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2021-10-04 16:45:05 -07:00 |
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Thomas Harte
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b3f0ca39ed
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Adds some unused drives.
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2021-10-04 08:12:13 -07:00 |
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Thomas Harte
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5ccb512883
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Moves the CIAs into the Chipset class.
This reflects the routing of interrupt signals for now, but also prepares for the addition of disk drives.
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2021-10-04 06:44:54 -07:00 |
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Thomas Harte
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da286d5ae8
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Switch spaces to tabs.
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2021-10-04 05:27:25 -07:00 |
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Thomas Harte
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a282a51673
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Remove last of the direct printf'ing.
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2021-09-30 02:42:59 -04:00 |
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Thomas Harte
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b7b13e20d1
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Single column blits should use both masks.
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2021-09-29 22:49:35 -04:00 |
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Thomas Harte
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402fa41bc0
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Corrects initial error value.
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2021-09-29 22:19:17 -04:00 |
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Thomas Harte
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0b9ebafc0f
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Flip bit deserialisation order.
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2021-09-28 22:12:13 -04:00 |
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Thomas Harte
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140e24ef15
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Grab further copy flags.
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2021-09-28 22:11:58 -04:00 |
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Thomas Harte
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ffcd2ea10c
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Attempts more properly to implement line mode.
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2021-09-28 21:39:09 -04:00 |
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Thomas Harte
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cb460de94d
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Makes bad first attempt at a Bresenham inner loop.
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2021-09-27 22:06:00 -04:00 |
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Thomas Harte
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f6624bf776
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Edges mildly closer to line output.
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2021-09-26 19:18:12 -04:00 |
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Thomas Harte
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b4b6c4d86f
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Attempts to support left and right masks.
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2021-09-26 18:42:08 -04:00 |
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Thomas Harte
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759689ff31
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Fix line mode flag, add busy status.
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2021-09-26 18:16:00 -04:00 |
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Thomas Harte
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9012a7f5e1
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Merge branch 'master' into Amiga
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2021-09-23 23:00:03 -04:00 |
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Thomas Harte
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e5a5faa417
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Resolves Clang 13 implicit conversion warnings.
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2021-09-23 22:53:41 -04:00 |
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Thomas Harte
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c4ab2bbeed
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Hard-code fetch window width. For now.
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2021-09-23 22:06:13 -04:00 |
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Thomas Harte
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42ef459e20
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Resolve resting values.
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2021-09-23 22:05:59 -04:00 |
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Thomas Harte
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cad1a9e0f1
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Correct bit test.
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2021-09-23 20:42:31 -04:00 |
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Thomas Harte
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f1d514470d
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Add note to future self.
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2021-09-23 20:29:39 -04:00 |
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Thomas Harte
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9a7a54f22f
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Take alternative guess as to meaning of 'use' bits.
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2021-09-23 18:42:12 -04:00 |
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Thomas Harte
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137d1c61bd
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Allow for channel enables and blitting direction.
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2021-09-23 18:38:37 -04:00 |
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Thomas Harte
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adc071ed7a
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Fix: modulos are 15-bit signed, the minterms are also in regular BLTCON0.
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2021-09-23 18:30:35 -04:00 |
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Thomas Harte
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e06f470044
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Ensure no implicit conversion from int to IntT.
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2021-09-23 18:30:04 -04:00 |
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Thomas Harte
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ab69fe56c9
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Take a first shot at magical instant blitting.
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2021-09-23 18:13:51 -04:00 |
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Thomas Harte
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60bad22a91
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Correct fetch window.
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2021-09-23 18:13:24 -04:00 |
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Thomas Harte
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7092429f7c
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Added some notes to self on line mode.
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2021-09-20 23:08:26 -04:00 |
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Thomas Harte
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fa800bb809
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Introduces code for minterm application.
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2021-09-20 19:13:23 -04:00 |
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Thomas Harte
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e15f1103a0
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Takes a shot at low resolution shifting.
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2021-09-20 19:00:52 -04:00 |
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Thomas Harte
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a4263b5a8c
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Ties bitplane collection to line position.
Outgoing bug: incrementing the video relative offset too often, due to cycles that are discovered to be CPU-targetted.
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2021-09-19 21:55:45 -04:00 |
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Thomas Harte
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245b7baa61
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Moves the Copper into its own file.
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2021-09-16 21:17:23 -04:00 |
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Thomas Harte
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0eeaaa150a
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Correct Copper start address.
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2021-09-16 21:01:37 -04:00 |
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Thomas Harte
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692d87f446
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Attempts to restrict blitter slot allocation.
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2021-09-16 19:56:28 -04:00 |
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Thomas Harte
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6572efe2a7
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Clarifies word addressing.
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2021-09-16 08:24:52 -04:00 |
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Thomas Harte
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8aac2bd029
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Stubs in serial port status.
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2021-09-14 21:53:07 -04:00 |
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Thomas Harte
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add11db369
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Factors out DMADevice, which is now a parent of Blitter.
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2021-09-14 20:51:32 -04:00 |
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Thomas Harte
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e47eab1d40
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Merge branch 'master' into Amiga
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2021-09-14 20:27:59 -04:00 |
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Thomas Harte
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fa71ae3174
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Add apology.
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2021-09-14 20:23:36 -04:00 |
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Thomas Harte
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dfcd1508c9
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Establishes valid initial BRAM.
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2021-09-10 19:56:20 -04:00 |
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Thomas Harte
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7e5fc4444a
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Default to ROM01.
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2021-09-09 22:09:09 -04:00 |
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Thomas Harte
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d8e42c4379
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Tweak guess at initial state.
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2021-09-09 22:06:36 -04:00 |
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Thomas Harte
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dd37fa49a0
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Stabilises Apple IIgs display.
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2021-09-09 20:08:15 -04:00 |
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Thomas Harte
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fd70f7ad43
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Attempts to make pixel content observeable.
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2021-09-08 20:57:26 -04:00 |
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Thomas Harte
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6e034c9b7f
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At least manages to place a pixel region on screen.
Albeit that I've suddenly realised that I've failed properly to think about high-res versus low-res.
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2021-08-11 20:31:37 -04:00 |
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Thomas Harte
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52e375a985
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Move towards playfield decoding.
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2021-08-11 18:47:35 -04:00 |
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Thomas Harte
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10a5e7313f
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Makes a buggy first attempt at bitplane data collection.
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2021-08-10 21:28:48 -04:00 |
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Thomas Harte
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ec9cb21fae
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Starts towards bitplane collection.
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2021-08-10 19:01:41 -04:00 |
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Thomas Harte
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fdd02ad6a6
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Neaten, slightly.
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2021-08-10 09:20:34 -04:00 |
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Thomas Harte
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76e9fcc94a
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Obey blitter DMA-enable mask.
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2021-08-10 09:19:15 -04:00 |
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Thomas Harte
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e412927415
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Logs a bit more from the Blitter, gives it access to slots.
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2021-08-10 07:17:01 -04:00 |
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Thomas Harte
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dda154c7c6
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Adds nonsense disk reads, which seems to lead to bitplane and blitter requests.
Progress, at last!
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2021-08-09 20:31:14 -04:00 |
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Thomas Harte
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9215535bee
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Adds a container for the disk controller.
Thereby appears to prove that my Amiga is getting as far as attempting to load from floppy.
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2021-08-09 17:35:09 -04:00 |
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Thomas Harte
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86c6248b48
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Merge branch 'master' into Amiga
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2021-08-09 17:09:04 -04:00 |
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Thomas Harte
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1502c4530e
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Takes a further step towards real timing.
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2021-08-08 21:52:28 -04:00 |
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Thomas Harte
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c1df4d1c0b
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Mirroring is correct.
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2021-08-08 20:20:12 -04:00 |
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Thomas Harte
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7f2610c4fc
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Disambiguates serial control logs.
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2021-08-07 16:57:30 -04:00 |
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Thomas Harte
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b11dd6950c
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Adds an entry for DiagROM.
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2021-08-07 16:56:18 -04:00 |
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Thomas Harte
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db3c158215
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Further increases logging.
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2021-08-05 20:07:14 -04:00 |
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Thomas Harte
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25e2bd307a
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Sets VPA for CIA accesses; logs a little more.
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2021-08-05 20:06:48 -04:00 |
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Adam Smith
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fdb676da4e
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.
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2021-08-01 00:26:14 -07:00 |
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Thomas Harte
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1bae4973bc
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Post the serial control write onwards.
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2021-07-30 18:24:27 -04:00 |
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Thomas Harte
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3d9f86c584
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Begins keyboard sketches and notes.
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2021-07-30 18:23:15 -04:00 |
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Thomas Harte
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3514e537ca
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Minor logging tweaks.
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2021-07-30 18:22:59 -04:00 |
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Thomas Harte
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b78090ec76
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Fixes IOPortsAndTimers classification.
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2021-07-28 19:39:42 -04:00 |
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Thomas Harte
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759007ffc1
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Attempts to route CIA interrupts.
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2021-07-28 19:36:30 -04:00 |
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Thomas Harte
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69ae9d72c8
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Remove dead non-access.
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2021-07-27 22:27:20 -04:00 |
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Thomas Harte
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604232acd9
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Establish appropriate word-size mask.
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2021-07-27 22:23:38 -04:00 |
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Thomas Harte
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82205d71cc
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Breaks up loop for arithmetic simplicity.
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2021-07-27 21:59:27 -04:00 |
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Thomas Harte
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402eab10f8
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Breaks video output while attempting to pull it into the main loop.
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2021-07-27 21:33:07 -04:00 |
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Thomas Harte
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b6bf4d73ad
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Blitter-finished bit aside, attempts to complete the Copper.
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2021-07-27 21:10:14 -04:00 |
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Thomas Harte
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5425b5c423
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Adds some form of WAITing to the Copper.
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2021-07-27 19:32:55 -04:00 |
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Thomas Harte
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29cd8504ca
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Implements enough Copper to get a first store.
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2021-07-27 19:06:16 -04:00 |
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Thomas Harte
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3544746934
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Modifies interface, starts on scheduler.
Probably corrects the pixel clock, which I think was scaled up by a factor of 4.
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2021-07-27 16:41:18 -04:00 |
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Thomas Harte
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d8f814f1c4
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If I'm going to push only a single colour, might as well make it fast.
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2021-07-26 21:19:43 -04:00 |
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Thomas Harte
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a43175125a
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Assuming I'm going to keep this synchronous, extends function signature.
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2021-07-26 20:13:06 -04:00 |
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Thomas Harte
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1d03bc560a
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Stores the colour palette, uses entry 0 as my new always output.
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2021-07-26 18:59:11 -04:00 |
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Thomas Harte
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3832acf6e3
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Produces a static white box, at least.
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2021-07-26 18:51:01 -04:00 |
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Thomas Harte
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7894b50321
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Starts towards an actual pixel output loop.
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2021-07-26 18:44:20 -04:00 |
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Thomas Harte
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ffded619e6
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Returns track 0 found, as a guess.
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2021-07-26 18:44:01 -04:00 |
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Thomas Harte
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bcb7bb5cce
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Improves logging further.
To investigate the new perpetual loop.
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2021-07-26 17:02:30 -04:00 |
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Thomas Harte
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87dcd82f69
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Makes a first attempt at some sort of interrupt functionality.
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2021-07-26 16:40:42 -04:00 |
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Thomas Harte
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e671cc6056
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Add stubs for joystick/mouse querying.
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2021-07-26 16:21:51 -04:00 |
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Thomas Harte
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5da89b88a6
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Add missing space.
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2021-07-25 22:17:55 -04:00 |
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Thomas Harte
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5d60c1f20b
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Stubs in Paula.
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2021-07-25 22:16:31 -04:00 |
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Thomas Harte
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7fd00165c9
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Switch to [hard-coded] PAL, for now.
In the hope that I get to see some graphics soon, this should better conform to my expectations.
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2021-07-25 20:41:51 -04:00 |
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Thomas Harte
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20da194fab
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Log slightly more accurately.
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2021-07-25 19:59:24 -04:00 |
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