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576 Commits

Author SHA1 Message Date
Thomas Harte
6773a321c1 Switch to portable direct bitwise logic. 2022-09-13 16:02:49 -04:00
Thomas Harte
ffdf44ad4f Switch to overt use of std::fill. 2022-09-13 15:39:17 -04:00
Thomas Harte
cbfd8e18e8 Eliminate repetitive magic constants. 2022-09-02 15:54:16 -04:00
Thomas Harte
8dc1aca67c Add TODO shout-outs. 2022-08-31 21:20:08 -04:00
Thomas Harte
df29a50738 Attempt to support the DMA interface. 2022-08-31 15:33:48 -04:00
Thomas Harte
7996fe6dab 'Clock' the SCSI bus (i.e. make it aware of passing time). 2022-08-30 16:40:25 -04:00
Thomas Harte
4df2a29a1f Add storage to the bus. 2022-08-24 15:23:50 -04:00
Thomas Harte
6010c971a1 Provide a volume to the SCSI card if one is received. 2022-08-23 15:11:56 -04:00
Thomas Harte
ea4bf5f31a Provide card's SCSI ID. 2022-08-23 15:05:36 -04:00
Thomas Harte
f4c242d5e9 Attempt to offer centralised C8 region decoding. 2022-08-23 14:50:44 -04:00
Thomas Harte
0595773355 Invents a new virtual select line for extended handling card ROM areas. 2022-08-23 14:41:45 -04:00
Thomas Harte
f89ca84902 Add missing include. 2022-08-22 21:44:33 -04:00
Thomas Harte
3c2d01451a Remove dead comment. 2022-08-22 17:01:52 -04:00
Thomas Harte
c2c81162a1 Sketch out some of the easy stuff. 2022-08-22 16:48:51 -04:00
Thomas Harte
3d234147a6 Add in collected specs. 2022-08-22 10:22:19 -04:00
Thomas Harte
8f2e94a1d8 Switch name back to emphasise _async_. 2022-07-16 14:41:04 -04:00
Thomas Harte
f465fe65f4
Merge pull request #1061 from TomHarte/MacintoshPixels 
Microtweak: simplify Macintosh pixel serialisation.
 2022-07-14 18:54:10 -04:00
Thomas Harte
bf03bda314 Generalise AsyncTaskQueue, DeferringAsyncTaskQueue and AsyncUpdater into a single template. 2022-07-14 16:39:26 -04:00
Thomas Harte
6dabdaca45 Switch to int; attempt to do a better job of initial audio filling. 2022-07-09 13:33:46 -04:00
Thomas Harte
b097b1296b Adopt granular flushing widely. 2022-07-08 16:04:32 -04:00
Thomas Harte
924de35cf3 Go all in on support for physical shadowing. 2022-06-29 14:39:56 -04:00
Thomas Harte
7cf9e08948 Map shadowing by logical address, not physical. 
Disclaimer: although this better matches the tests, I've yet to verify.
 2022-06-29 06:10:15 -04:00
Thomas Harte
60d3519993 Clarify, attempt to implement as internally documented. 2022-06-28 22:32:31 -04:00
Thomas Harte
6abc317986 Avoid permitting writes in the Cx00 region after uninhibiting the language card. 2022-06-28 16:35:47 -04:00
Thomas Harte
94fcc90886 Use auxiliary switches to control language card area when card is inhibited. 2022-06-28 12:46:31 -04:00
Thomas Harte
7aeaa4a485 Tweak paging semantics, to allow simple multiple dependencies. 2022-06-27 21:38:45 -04:00
Thomas Harte
ef40a81be2 Remove temporary hack. 2022-06-27 08:00:29 -04:00
Thomas Harte
21842052cf Alternative zero page should affect bank 0's language card area when the card is disabled. 2022-06-27 07:56:45 -04:00
Thomas Harte
5495f30329 Microtweak: simplify Macintosh pixel serialisation. 2022-06-06 08:34:58 -04:00
Thomas Harte
403eda7024 Add missing flush. 2022-06-05 09:08:36 -04:00
Thomas Harte
a61f7e38b6 Very minor: avoid division and modulus when unnecessary. 2022-06-03 15:39:29 -04:00
Thomas Harte
3d059cb751 Make use of Microcycle helpers where relevant. 
None of these existed when the Macintosh was first added to this emulator.
 2022-06-03 15:33:31 -04:00
Thomas Harte
1365fca161 Avoid phoney write modifies. 2022-05-27 21:42:55 -04:00
Thomas Harte
a611a745e7 Switch the Macintosh to 68000 mk2. 2022-05-24 12:35:36 -04:00
Thomas Harte
b0518040b5 Plants the seek of a 68000 mark 2. 2022-05-16 11:44:16 -04:00
Thomas Harte
866b6c6129 Eliminate off_t. 2022-04-27 19:16:37 -04:00
Thomas Harte
efff91ea3d Undo bad guess at initial switch state. 2022-04-17 17:03:05 -04:00
Thomas Harte
f8e8f18be5 Switch to std::clamp. 2021-11-26 18:10:29 -05:00
Thomas Harte
0df8173536 Merge branch 'master' into Amiga 2021-11-24 08:58:03 -05:00
Thomas Harte
f5d3d6bcea Splits the lowpass filter into push and pull variants. 2021-11-21 15:37:29 -05:00
Thomas Harte
da286d5ae8 Switch spaces to tabs. 2021-10-04 05:27:25 -07:00
Thomas Harte
fa71ae3174 Add apology. 2021-09-14 20:23:36 -04:00
Thomas Harte
dfcd1508c9 Establishes valid initial BRAM. 2021-09-10 19:56:20 -04:00
Thomas Harte
7e5fc4444a Default to ROM01. 2021-09-09 22:09:09 -04:00
Thomas Harte
d8e42c4379 Tweak guess at initial state. 2021-09-09 22:06:36 -04:00
Thomas Harte
dd37fa49a0 Stabilises Apple IIgs display. 2021-09-09 20:08:15 -04:00
Adam Smith
fdb676da4e . 2021-08-01 00:26:14 -07:00
Thomas Harte
10bf6744aa Correct typo. 2021-06-27 16:26:55 -04:00
Thomas Harte
1ea4130035 Avoid OpenGL restretching bug. 2021-06-13 19:46:47 -04:00
Thomas Harte
d18a537509 Fiddles with the preprocessor to make kiosk mode match other OSes even on macOS. 2021-06-13 19:28:05 -04:00
Thomas Harte
778b9ef683 Ensures set_square_pixels is exposed, works around OpenGL aspect ratio bug. 2021-06-07 20:41:02 -04:00
Thomas Harte
96e7eb1bed Adds a use-square-pixels option for the Apple II. 2021-06-07 20:16:01 -04:00
Thomas Harte
b6b3d845a3 Correct Apple IIe and Enhanced IIe startup. 2021-06-04 22:48:08 -04:00
Thomas Harte
f4db4c3a73 Implements ROM::Request::validate. 
It now also validates ROM sizes, so can no longer take a const Map.
 2021-06-04 18:54:50 -04:00
Thomas Harte
d923fe72c0 Resolves various ROM selection warnings. 2021-06-03 22:46:47 -04:00
Thomas Harte
0aa8c3c40d For SDL at least, advances to failed linking. 
... and with error reporting currently AWOL.
 2021-06-03 22:22:56 -04:00
Thomas Harte
a30eeaab6a Starts to introduce a new grammar for ROM requests. 
They can be optional, and chained together in AND or OR combinations. A central catalogue knows the definitions of all ROMs.
 2021-06-03 21:55:59 -04:00
Thomas Harte
0cf1c9040a Add missing fallthrough declaration. 2021-05-03 22:17:06 -04:00
Thomas Harte
db52f13c32 Disambiguates reset_all_keys. 2021-04-19 21:49:06 -04:00
Thomas Harte
094d623485 Updates unit tests. 2021-04-05 21:33:04 -04:00
Thomas Harte
d77ddaf4fa Switches the Electron to JustInTimeActor video. 
Also reorders template parameters; I think that specifying a different time base is likely to be more common than using a divider.
 2021-04-04 17:33:49 -04:00
Thomas Harte
158122fbf4 Determine TargetTimeScale automatically. 2021-04-04 15:37:07 -04:00
Thomas Harte
03ef81b07c Attempts to reduce initial bounce. 2021-03-23 17:12:00 -04:00
Thomas Harte
0f9ab53ea0 Resolves GCC warnings from dangling Apple IIgs work. 2021-03-21 22:36:18 -04:00
Thomas Harte
67408521cd Makes absolutely sure not to try to use quickboot workaround for Mac 128kb/512kb. 
Albeit that it should be harmless; it's just seeding RAM.
 2021-03-06 22:34:35 -05:00
Thomas Harte
7b164de6fd Reenables interrupts. 2021-03-06 18:53:39 -05:00
Thomas Harte
24e68166c6 Minor clean-ups of my temporary cruft. 2021-03-06 17:11:06 -05:00
Thomas Harte
b72474f418 Reduces debugging shout outs a touch. 2021-03-03 20:53:05 -05:00
Thomas Harte
38046d49aa Increases debugging noise. 2021-03-03 20:52:14 -05:00
Thomas Harte
4601421aa6 This conditional is gone. 2021-03-03 20:52:01 -05:00
Thomas Harte
2f45e07d82 Further consolidates region map, now that shadowing is orthogonal. 2021-02-28 15:22:36 -05:00
Thomas Harte
496b6b5cfc Introduces a further 128 bits of storage to eliminate the conditional in IsShadowed. 2021-02-28 15:14:32 -05:00
Thomas Harte
8604b1786e Simplifies banks $02+ to a single region. 2021-02-27 23:34:51 -05:00
Thomas Harte
267e28e012 Adds various bits of debugging detritus. 2021-02-27 22:27:57 -05:00
Thomas Harte
631a8a7421 Adds bitset header. 2021-02-27 22:13:49 -05:00
Thomas Harte
7dcb0553e4 Switches to a target-centric view of shadowing. 2021-02-27 22:13:10 -05:00
Thomas Harte
2a7ea9f57c Merge branch 'master' into AppleIIgs 2021-02-26 21:31:18 -05:00
Thomas Harte
9781460c41 Thanks to a hint from the MAME guys: finally completes Macintosh 128kb and 512kb emulation (!) 2021-02-26 21:22:35 -05:00
Thomas Harte
55c9d152e9 Slightly smarter: this does branchless shadowing without additional storage. 2021-02-24 18:46:41 -05:00
Thomas Harte
6cf9099ce1 Don't clear the mouse data full flag until both registers have been read. 2021-02-23 21:57:02 -05:00
Thomas Harte
e6dc39f6f0 Makes an attempt at mouse event transmission. 2021-02-19 22:48:15 -05:00
Thomas Harte
28ce675c96 Takes a further stab at ::CommandDataIsValid. 2021-02-19 22:22:14 -05:00
Thomas Harte
3d91b0a31b Fixes keyboard data return. 
Input sort of works now! Except that key repeat is way out of control.
 2021-02-19 21:55:06 -05:00
Thomas Harte
5d1970d201 Adds a hacky different guess at how register access might work. 2021-02-19 21:46:18 -05:00
Thomas Harte
72d7901c88 Takes a shot at the keyboard data full flag. 
Just a guess. But likely?
 2021-02-19 20:06:12 -05:00
Thomas Harte
60cfec6a65 Amongst ever more cruft, adds a couple of extra asserts. 2021-02-18 22:49:48 -05:00
Thomas Harte
2e9065b34c Increases number of fixed initial values. 2021-02-18 22:48:53 -05:00
Thomas Harte
e42843cca0 This may temporarily exhaust my wit for asserts. 2021-02-16 22:47:46 -05:00
Thomas Harte
3336a123f8 Asserts even more overtly. 2021-02-16 22:33:28 -05:00
Thomas Harte
28bd620e7f Adds joystick support to the IIgs. 2021-02-16 19:39:22 -05:00
Thomas Harte
b117df3367 Factors out joystick logic. 2021-02-16 19:17:32 -05:00
Thomas Harte
fa8236741d Takes a shot at an ADB mouse. 2021-02-15 20:49:16 -05:00
Thomas Harte
e16d5f33d1 Adds service requests. The microcontroller now appears to consume keyboard events. 2021-02-15 20:33:10 -05:00
Thomas Harte
e773b331cd Implements register 2 listen. 2021-02-15 15:05:46 -05:00
Thomas Harte
99c21925f4 Makes attempt at keyboard mapping. 2021-02-15 15:00:12 -05:00
Thomas Harte
eccf5ca043 Makes first effort to wire up the ADB vertical blank input. 
However: looking at the disassembly, I'm not sure it really is wired to INTR. So work to do.
 2021-02-14 22:20:58 -05:00
Thomas Harte
24af62a3e5 Sets a default handler of 1. 2021-02-14 22:20:07 -05:00
Thomas Harte
52cf15c3e6 Attempts to route out modifier state. 2021-02-14 21:15:31 -05:00
Thomas Harte
a791680e6f Implements set_status as per advice. 2021-02-14 21:04:20 -05:00
Thomas Harte
6e53b4c507 Corrects centralised ADB decoder. 
I still think it's appropriate to do this in only a single place, given that using it is optional.
 2021-02-14 20:41:05 -05:00
Thomas Harte
52c38e72f6 Starts seeking to automate register 3 handling. 
Immediate pitfall: byte capture on the bus side isn't working correctly.
 2021-02-14 20:37:33 -05:00
Thomas Harte
a51d143c35 Corrects reactive-device transmission logic. 
Albeit that I'm still not properly responding to register 3 stuff, so the ADB bus needn't believe anything is out there. Also, without VSYNC being piped to the microcontroller it may well just not be polling anyway.
 2021-02-14 18:54:22 -05:00
Thomas Harte
17e9305282 Starts adding a keyboard. 2021-02-13 23:16:45 -05:00
Thomas Harte
c284b34003 Resolves inability of ADB microcontroller to read its own ROM (!) 2021-02-13 17:53:40 -05:00
Thomas Harte
2ab3bba695 Attempts GLU register latching, restoring expected startup sequence. 2021-02-13 17:38:42 -05:00
Thomas Harte
2c4dcf8843 Edges towards implementing an ADB device. 2021-02-12 21:50:24 -05:00
Thomas Harte
ea40b2c982 Takes a stab at implementing device response. 2021-02-12 18:56:43 -05:00
Thomas Harte
adfdfa205f Starts to establish the means by which I'll implement ADB devices. 2021-02-12 18:42:12 -05:00
Thomas Harte
33abdc95aa Adds a helper for decoding ADB commands. 
Still very noticeably to do: any sort of standard part for devices to respond to the bus.
 2021-02-10 21:39:33 -05:00
Thomas Harte
6ca8aa99fc Commit SDL and Qt project files; improve commenting. 2021-02-10 21:28:32 -05:00
Thomas Harte
17bac4c8cf Starts to formalise the ADB bus. 2021-02-10 21:24:31 -05:00
Thomas Harte
46bd20b5e0 Attempts to simplify ADB bit parsing. 
On-line output still looks reasonable, albeit that the microcontroller suddenly seems to be interested in devices F and 3 rather than 2 and 3.
 2021-02-08 22:08:49 -05:00
Thomas Harte
93a80a30d3 With correct divider appears to get reset requests posted. 2021-02-07 23:05:01 -05:00
Thomas Harte
77b1efd176 Sets sensible 'reset' values. 2021-02-07 21:53:57 -05:00
Thomas Harte
acfab1dfb3 Starts to make some effort at timers. 2021-02-06 21:02:44 -05:00
Thomas Harte
b8c6d4b153 Rips out my high-level ADB microcontroller protocol implementation. 
Adds just enough that the main computer validates the ADB controller as present and talking.
 2021-01-30 17:53:27 -05:00
Thomas Harte
f50e8b5106 If I'm going to maintain the max_address approach, & is 'correct'. 
% +1 would be 'more correct', but I think this approach is probably misguided.
 2021-01-27 18:31:11 -05:00
Thomas Harte
dcc2fe0990 Improves M50470 entry-point detection, adds test output. 2021-01-26 21:29:17 -05:00
Thomas Harte
56111c75ae Makes first efforts towards disassembly. 2021-01-26 19:52:30 -05:00
Thomas Harte
fc4bda0047 Experimentally flipping interpretation of the output bit gives something closer to coherent. 2021-01-25 22:02:39 -05:00
Thomas Harte
c8beb59172 Attempts properly to track ADB bus activity. 
Output is not yet a valid ADB stream. Work to do.
 2021-01-25 17:43:22 -05:00
Thomas Harte
8789ffda15 Corrects performer storage, RMW/W confusion, implicit casts, port readback. 2021-01-24 22:30:42 -05:00
Thomas Harte
e8e604dc3c Attempts to wire up M50470 and GLU. 
Resulting in an unexpected interest in R15. Bugs to find, I guess.
 2021-01-24 18:07:05 -05:00
Thomas Harte
57e0fdfadc Ensures ADB microcontroller is clocked. 
And runs at the 'correct' speed (i.e. modulo my instruction-by-instruction implementation).
 2021-01-23 22:55:12 -05:00
Thomas Harte
ec0018df79 Routes in the ADB keyboard ROM. This should get as far as parsing. 2021-01-18 16:59:49 -05:00
Thomas Harte
12784a71e2 A stab in the dark: does the IOLC inhibit also affect vector fetches? 2020-12-29 20:53:56 -05:00
Thomas Harte
114d48b076 This register appears to be read/write. 2020-12-11 21:43:34 -05:00
Thomas Harte
6e9d517c26 Minor cleanliness improvement. 2020-12-11 21:43:13 -05:00
Thomas Harte
159924dcc0 More clarity tweaks. 2020-12-10 22:47:11 -05:00
Thomas Harte
5d8f284757 Makes minor style improvements. 2020-12-10 22:11:53 -05:00
Thomas Harte
c978a95463 Increases asserts and adds a test. 
Thereby discovers and fixes a problem with set_main_paging().
 2020-12-10 21:49:23 -05:00
Thomas Harte
1928c955d9 Ensures safe startup of the Ensoniq. 2020-12-09 19:46:32 -05:00
Thomas Harte
049a78c667 Slightly restricts video flushing test. 2020-12-08 18:47:15 -05:00
Thomas Harte
65ca931e83 Throws in a new assert, against the unimplemented bit 0 of new video. 2020-12-06 20:26:24 -05:00
Thomas Harte
6cb71eb11b This needs explicitly to be a bool for the table lookups to work. 2020-12-06 16:43:07 -05:00
Thomas Harte
43251193ee The actual maximum line length is now 656. 2020-12-06 16:42:43 -05:00
Thomas Harte
55de98fb46 Adds a new statement of intent. 
Now I need to try to decide whether I like my current all-in-one mapping for shadowing + paging, or whether it's better to split the things. I'm tending towards the latter at least until the functionality works.
 2020-12-05 19:09:21 -05:00
Thomas Harte
1422d43c35 Corrects documentation errors and ambiguities. 2020-12-05 19:07:38 -05:00
Thomas Harte
6273ef8ba2 Adds means to force specific ROM 03 self tests. 2020-12-02 20:48:19 -05:00
Thomas Harte
3c6f09a898 Corrects super high-res aspect ratio and placement. 2020-12-02 20:47:26 -05:00
Thomas Harte
24fcb0c24b Corrects video counter values. 
The built-in speed test now passes.
 2020-12-01 18:35:55 -05:00
Thomas Harte
03e2b6a265 Makes a slightly more rigorous attempt at discerning 1Mhz and 2.8Mhz operation. 2020-12-01 17:46:30 -05:00
Thomas Harte
ee22cf7ca1 Ensures that PAGE2 propagates from the state register to video. 2020-11-30 22:56:19 -05:00
Thomas Harte
187f507532 The soft switch is LCBANK2, not LCBANK1. 
[This also jimmys the IIgs into always entering its extended self test, for now]
 2020-11-30 22:35:51 -05:00
Thomas Harte
6000bd3a5e Adds a bonus debugging assert. Let's see. 2020-11-30 18:15:02 -05:00
Thomas Harte
87069da3dd Improves exposition, eliminates a couple of redundant map adjustments. 2020-11-30 18:07:03 -05:00
Thomas Harte
5cb4077576 Switches from modulo to and. 2020-11-30 17:47:57 -05:00
Thomas Harte
e9c7e0b9dd Provisionally reverses meaning of language card RAM bank select. 2020-11-29 21:57:17 -05:00
Thomas Harte
35aa7612bb Ensures that auxiliary/language-card soft switches don't trigger my assert. 2020-11-29 21:32:24 -05:00
Thomas Harte
acaa841822 Adds guaranteed trip to ROM for vector pulls. 2020-11-29 21:29:15 -05:00