Thomas Harte
36f843bc6e
Ensure std::function is visible to 65816Storage.cpp.
2020-09-29 19:23:38 -04:00
Thomas Harte
15c87e02e9
Ditto for printf
.
2020-09-29 18:53:02 -04:00
Thomas Harte
00923eac7c
Ensure assert
is visible to 65816Implementation.hpp.
2020-09-29 18:52:25 -04:00
Thomas Harte
78b3ec4b10
The actual work begins: starts implementing 65816 micro-ops.
2020-09-29 18:42:07 -04:00
Thomas Harte
ef1a514785
Introduces 6502Selector, for picking either a 6502 or a 65816 based on a single template parameter.
2020-09-28 21:35:46 -04:00
Thomas Harte
6635876e7e
Performs a bare factoring out of the 6502 bus handler.
2020-09-28 18:43:53 -04:00
Thomas Harte
5645f90abe
Takes a minor first step towards actually performing 65816 instructions.
2020-09-27 22:20:58 -04:00
Thomas Harte
ad8a2e2cb9
Corrects a long-standing naming obscurity.
2020-09-27 22:19:42 -04:00
Thomas Harte
8641494809
Resolve various test-case warnings.
2020-09-27 15:10:29 -04:00
Thomas Harte
5449e90b34
Edges towards offering the 65816 as another type of 6502 for testing.
2020-09-26 22:31:50 -04:00
Thomas Harte
1cd664ad85
Adds a sanity check.
2020-09-26 21:43:26 -04:00
Thomas Harte
e680022b1f
Completes the opcode set.
...
A million bugs yet to find.
2020-09-26 21:35:31 -04:00
Thomas Harte
67c2ce2174
Takes a run at completing the stack section.
...
I'm not really sure about BRK though — does it gain a signature on the 65816?
2020-09-26 21:20:01 -04:00
Thomas Harte
596e700b60
Drags myself onto the final page of bus programs.
...
233 opcodes now complete; six bus programs to go.
2020-09-26 20:57:24 -04:00
Thomas Harte
4a53b6e538
Adds push and pull, reaching 229/256 opcodes.
2020-09-26 20:38:29 -04:00
Thomas Harte
687f4bb3bb
Adds relative and relative long bus patterns.
...
Many of the rest cover only one or two opcodes so this puts me at 216/256 opcodes covered; 35/47 bus programs; just more than 5/7 pages.
2020-09-26 20:24:50 -04:00
Thomas Harte
473799cb62
There's not a lot to STP and WAI from a bus program point of view.
2020-09-26 20:18:30 -04:00
Thomas Harte
3dc22a9fd5
Adds implied and immediate modes.
...
... for 204/256 opcodes covered.
2020-09-26 17:42:42 -04:00
Thomas Harte
f54b655606
Adds d, x
and d, y
.
2020-09-26 17:26:17 -04:00
Thomas Harte
d2e868ea2b
Adds (d), y; [d], y; and [d].
...
Now covered: 146/256 opcodes, 4/7 pages, 25/47 bus programs.
2020-09-26 16:55:58 -04:00
Thomas Harte
3fc649359a
Transcribes the titles of all remaining bus programs.
...
Thereby frames the distance yet to travel.
2020-09-25 22:29:19 -04:00
Thomas Harte
1512ac11da
Adds (d, x) and (d) modes. Albeit by deferring the hard work.
...
That's: 122/256 opcodes; 22/47 bus programs, ~3.5/7 pages transcribed. Maybe I'll be able to get to the runtime stuff sooner rather than later?
2020-09-25 22:22:30 -04:00
Thomas Harte
5039cc7bb2
Adds direct page.
...
... to cover 106 opcodes.
2020-09-25 22:01:36 -04:00
Thomas Harte
5360a7b4ce
Adds block moves.
...
These are fairly specialised, dealing in two data addresses simultaneously.
2020-09-25 21:49:03 -04:00
Thomas Harte
2957a31f40
Adds absolute, x; absolute,y; and accumulator addressing modes.
...
Now covered: 80/256 opcodes, from 2/6 pages of the data sheet; or 16/47 bus programs.
2020-09-25 21:16:36 -04:00
Thomas Harte
8c11df52bf
Adds absolute long, x.
...
Factors out the commonality of a closing read/write while I'm here.
2020-09-25 19:27:17 -04:00
Thomas Harte
2b7ffcd48f
Takes a run at JSL al.
2020-09-25 18:35:00 -04:00
Thomas Harte
7980a9033e
Adds two-thirds of absolute long.
...
Working total: 31 opcodes covered; 10/47ths of bus patterns.
Next is JSL, which I think will require additional operations.
2020-09-25 18:16:49 -04:00
Thomas Harte
125ddfa513
Pays a little attention to runtime storage; completes the first page of bus patterns.
2020-09-25 18:00:02 -04:00
Thomas Harte
636e929607
Adds a check for 8/16-bit redundancy.
2020-09-25 17:42:42 -04:00
Thomas Harte
22c792dc46
Adds enough logic to start serialising instructions to somewhere.
...
Possibly extraneous for now, but it means I can start stepping and testing.
2020-09-25 17:18:25 -04:00
Thomas Harte
95af1815c8
Completes absolute indexed indirect micro-ops.
...
For the record: this is just six out of forty-seven codes complete. Or about two-thirds of six pages. Plenty to do even before I start trying to interpret these things.
2020-09-24 22:37:31 -04:00
Thomas Harte
d707c5ac95
Switches to generators with stable pointers; adds 2a.
2020-09-24 22:27:20 -04:00
Thomas Harte
5c9192e5e6
Switches to generators for spitting out micro-ops.
...
Hopefully with a lot of parts to factor out naturally.
2020-09-24 17:36:11 -04:00
Thomas Harte
72b5584042
Immediately runs afoul of a read/write difference in the specs between 8/16-bit mode that suggests maybe this isn't a good structure.
...
Perhaps generators of some sort?
2020-09-23 22:28:15 -04:00
Thomas Harte
f9045b5352
Rounds out declaration of the absolutes.
2020-09-23 22:23:23 -04:00
Thomas Harte
f87fe92bc8
Begins a meandering road towards the 65816.
2020-09-23 22:14:42 -04:00
Thomas Harte
402f2ddbd9
Increases likelihood of 68000 Program
offset-size assumptions being met.
2020-07-02 22:24:04 -04:00
Thomas Harte
6e4b8d58a5
Completes [[fallthrough]]
s.
2020-06-19 23:50:37 -04:00
Thomas Harte
945a9da94f
Adds further [[fallthrough]]s.
2020-06-19 23:44:20 -04:00
Thomas Harte
2477752fa4
Adds further [[fallthrough]]
attributes.
2020-06-19 23:36:51 -04:00
Thomas Harte
91229a1dbd
Adds overt fallthrough attributes.
2020-06-19 23:22:29 -04:00
Thomas Harte
73131735fa
Further qmake warning corrections.
2020-05-30 19:31:17 -04:00
Thomas Harte
267006782f
Starts to add Qt target; resolves many build warnings.
2020-05-30 00:37:06 -04:00
Thomas Harte
512a52e88d
Increases const correctness, marks some additional constructors as constexpr, switches std::atomic construction style.
2020-05-20 23:34:26 -04:00
Thomas Harte
28881cb391
Implements apply
.
2020-05-19 18:27:10 -04:00
Thomas Harte
a16b710d22
Removes <cassert> from Struct.h (which means it's needed in the 68000's State).
2020-05-19 00:06:29 -04:00
Thomas Harte
a3d4c7599b
Attempts fully to capture 68000 state.
...
Albeit that it can't be put back yet.
2020-05-18 23:55:54 -04:00
Thomas Harte
6f16928215
Adds all remaining simple scalar fields.
2020-05-16 22:47:04 -04:00
Thomas Harte
57edfe8751
Formalises TODO list and marches onward into execution state.
2020-05-16 18:31:43 -04:00
Thomas Harte
dcc0ee3679
Adds input line capture.
2020-05-16 17:44:15 -04:00
Thomas Harte
f7a16762b4
Starts populating the 68000 state registers.
2020-05-16 00:06:04 -04:00
Thomas Harte
8b76d4007e
Starts adding State
for the 68000.
2020-05-14 22:46:40 -04:00
Thomas Harte
c5b746543b
Factors the half mask into steps count.
2020-05-14 00:09:01 -04:00
Thomas Harte
11d936331d
Attempts to preserve scheduled_program_counter_.
2020-05-13 23:58:04 -04:00
Thomas Harte
3709aa7555
Edges almost up to an initially complete implementation.
2020-05-13 22:04:04 -04:00
Thomas Harte
7c9d9ee048
Adds basic Z80 state.
2020-05-13 20:15:22 -04:00
Thomas Harte
66c2eb0414
Further tightens const
and constexpr
usage.
2020-05-12 22:22:21 -04:00
Thomas Harte
25996ce180
Further doubles down on construction syntax for type conversions.
2020-05-09 23:00:39 -04:00
Thomas Harte
cc357a6afa
Removes boilerplate from header.
2020-04-02 19:15:57 -04:00
Thomas Harte
dfc1c7d358
Separates 6502 State object to make it optional.
...
Also makes a few minor const improvements while I'm poking around.
2020-04-02 19:11:27 -04:00
Thomas Harte
7ed8e33622
Eliminates unused 6502 counter.
2020-04-02 18:49:28 -04:00
Thomas Harte
a491650c8b
Adds safety asserts.
2020-03-30 21:39:31 -04:00
Thomas Harte
95c68c76e1
Corrects use of StructImpl.
2020-03-30 00:27:40 -04:00
Thomas Harte
edc553fa1d
Removes duplicative 'register'.
2020-03-29 22:58:00 -04:00
Thomas Harte
4f2ebad8e0
Takes a shot a set_state.
2020-03-29 22:50:30 -04:00
Thomas Harte
cfb75b58ca
Pulls all 6502 MicroOp sequences into the main operations_ table.
...
This will make state restoration somewhat more tractable.
2020-03-29 18:36:41 -04:00
Thomas Harte
4fbe983527
Provisionally adds State
and get_state
to the 6502.
...
`set_state` may be a little more complicated, requiring a way to advance in single-cycle steps **without applying bus accesses**.
2020-03-28 00:33:27 -04:00
Thomas Harte
a51fe70498
Standardises cast syntax.
2020-03-06 21:55:00 -05:00
Thomas Harte
b971e2a42c
Adds get_is_resetting to the Z80, eliminating the CPC's custom version.
2020-02-29 19:58:25 -05:00
Thomas Harte
01faffd5bf
Corrects memptr behaviour of OTIR/OTDR and INIR/INDR.
...
This seemingly perfects memptr.
2020-02-27 20:55:43 -05:00
Thomas Harte
26de5be07c
Corrects memptr behaviour of LDIR/LDDR and CPIR/CPDR.
2020-02-27 20:44:53 -05:00
Thomas Harte
87474d5916
Corrects memptr behaviour of OUT (C), 0
.
2020-02-27 20:38:27 -05:00
Thomas Harte
06163165d9
Corrects memptr effect of LD rr, (nn).
2020-02-26 22:22:54 -05:00
Thomas Harte
ec82c075be
Fixes memptr for IN C, (C).
2020-02-26 22:19:37 -05:00
Thomas Harte
3b0df172a7
Corrects memptr behaviour of JP nn.
2020-02-26 22:02:15 -05:00
Thomas Harte
7058dbc3cc
Corrects memptr for LD HL, (nn).
2020-02-26 21:54:49 -05:00
Thomas Harte
b64de89d2d
Corrects JR memptrs.
2020-02-26 21:47:34 -05:00
Thomas Harte
8878396339
Corrects DJNZ memptr behaviour.
2020-02-26 21:42:31 -05:00
Thomas Harte
3097c4ccae
Improves MEMPTR testing and some results.
2020-02-24 23:32:18 -05:00
Thomas Harte
7959d243f6
Adds single-stepping. Of a kind.
2020-02-24 23:31:42 -05:00
Thomas Harte
79dd402bc8
Consolidates different test port input selection.
2020-02-23 16:12:28 -05:00
Thomas Harte
3f3229851b
Implements MEMPTR for IN.
2020-02-23 00:32:33 -05:00
Thomas Harte
dca79ea10e
Requires trace flag currently set.
2020-01-18 22:52:53 -05:00
Thomas Harte
b7fd4de32f
Ensures a one-instruction latency on the trace flag.
2020-01-18 22:06:00 -05:00
Thomas Harte
9f2f547932
Adds and satisfies test on the function code word.
...
Thanks to ijor's "68000 Address and Bus Error Stack Frame" re: contents.
2020-01-04 23:58:07 -05:00
Thomas Harte
f0d5bbecf2
Introduces a test of stack contents after an address error.
...
Fixes: stacked PC, address of fault.
2020-01-04 23:22:07 -05:00
Thomas Harte
a28c52c250
Fixes A7-relative JSRs.
...
I completely withdraw my earlier statement re: the test cases.
2020-01-04 22:22:33 -05:00
Thomas Harte
7de1181213
Make a new guess at post-overflow DIV flags, based on tests.
...
Specifically: for DIVU, stick with the current guess of a fixed set. For DIVS, leave N and Z alone.
2020-01-03 23:44:49 -05:00
Thomas Harte
c7a5b054db
There's no TODO here; overflow is always 0 for a 16x16 multiply.
...
... and the original 68000 doesn't support 32x32 multiplies.
2020-01-03 22:44:19 -05:00
Thomas Harte
2f8078db22
Switches to should_log as a global when I'm hacking about.
2020-01-02 20:15:48 -05:00
Thomas Harte
5be30b1f7b
Introduces further comparative tests, prompting a new CHK fix.
...
Specifically: how to set N when both is_under and is_over are true, and to eliminate a failure fully to prefetch in the longer addressing modes.
2020-01-01 19:11:36 -05:00
Thomas Harte
b184426f2b
Ensure that an interrupt from a STOP doesn't return to the STOP.
2020-01-01 14:51:47 -05:00
Thomas Harte
1de4f179c0
Adds more thorough comment on the bus program used.
2019-12-25 19:49:49 -05:00
Thomas Harte
3cb5684d95
Fixes RTR: the whole top half of the SR should be preserved.
...
Specifically, the 68000 Reference Manual says: "The supervisor portion of the status register is unaffected." Clearly when I first read that I misread it as the supervisor _flag_ (rather than _portion_) should be preserved.
2019-12-25 19:49:20 -05:00
Thomas Harte
274867579b
Deploys constexpr
as a stricter const
.
2019-12-22 00:22:17 -05:00
Thomas Harte
cf16f41939
Makes value8_high/low and value16 branchless.
2019-12-21 20:58:37 -05:00
Thomas Harte
08f2877382
I think the 68000 actually loads a byte value onto both the upper and lower data lines.
2019-12-21 20:37:03 -05:00
Thomas Harte
a3e64cae41
Corrects SBCD carry.
2019-12-17 22:16:02 -05:00
Thomas Harte
8a2ac87209
Reverted SBCD/NBCD V behaviour.
2019-12-16 23:08:59 -05:00
Thomas Harte
096b447b4b
Corrects MOVE -(An), SR/CCR, which was not previously decrementing.
...
Also adds a safety check against other instances of the same error. There seem to be none.
2019-12-16 22:38:54 -05:00
Thomas Harte
84167af54f
Corrects CHK N flag.
2019-12-16 20:01:33 -05:00
Thomas Harte
8be26502c4
Fixes NBCD -(An)+
, adds some additional comments.
2019-12-16 20:01:19 -05:00
Thomas Harte
4c068e9bb8
Corrects flags on CMPA.w.
2019-12-15 20:39:47 -05:00
Thomas Harte
dc1abd874e
Corrects indentation typo.
2019-12-14 23:52:53 -05:00
Thomas Harte
4dd235f677
Adds supervisor/user to logged flags in trace mode.
2019-12-08 22:39:10 -05:00
Thomas Harte
407cc78c78
Extends to offer simpler 8-bit access handling.
2019-12-08 20:19:44 -05:00
Thomas Harte
b12136691a
Corrects comment.
2019-11-18 23:46:33 -05:00
Thomas Harte
db03b03276
Corrects [AND/OR/EOR].bw Dn, -(An) to decrement destination.
...
It was previously doing a predecrement on the internal source address, which is unused. This fixes at least Dan Dare III and Silkworm.
2019-11-09 11:25:23 -05:00
Thomas Harte
6afefa107e
Resolves unused variable warning.
2019-11-05 23:18:25 -05:00
Thomas Harte
07582cee4a
BusGrant is a further signal I will need.
2019-11-03 21:10:42 -05:00
Thomas Harte
a67e0014a4
Fixes video base address and mono/colour monitor value.
...
Now I see a GEM desktop. In blue.
2019-11-02 19:36:15 -04:00
Thomas Harte
c070f2100c
Attempts to regularise data bus access.
2019-11-01 23:01:06 -04:00
Thomas Harte
1c154131f9
Expands size of storage in Cycles/HalfCycles; adjusts widely to compensate.
2019-10-29 22:36:29 -04:00
Thomas Harte
ecc0cea5a1
Added a potential branch for the newer TOS memory map.
2019-10-26 16:52:06 -04:00
Thomas Harte
8a14f5d814
Updates to Xcode11 recommended project settings.
...
The updated compiler also flagged a potential issue with CPU::Z80::Register not being a namespace re: 'Refresh' versus CPU::Z80::PartialMachineCycle. I don't entirely see it, but this fixes the problem.
I also finally figured out what the compiler was trying to tell me about ROMRequester.xib.
2019-09-22 12:13:56 -04:00
Thomas Harte
6a80832140
Moves timing of interrupt sampling into prefetch queue advancement.
...
As per comment, that is definitely the only place it can occur; I don't know whether it always occurs there.
2019-08-04 21:06:34 -04:00
Thomas Harte
35b1a55c12
Corrects DIVS negative flag.
2019-08-04 20:36:33 -04:00
Thomas Harte
e3794c0c0e
Takes a second pass at DIVS timing, seeming to correct that side of things.
2019-08-04 20:33:43 -04:00
Thomas Harte
478f2533b5
Corrects 68000 address bus during interrupt acknowledge.
...
All unused bits should be 1, not 0.
2019-08-03 15:38:36 -04:00
Thomas Harte
b7b62aa3f6
Resolves some type conversion warnings.
2019-07-26 23:20:40 -04:00
Thomas Harte
5769944918
Shrinks MicroOp
struct size from 16 bytes to 4.
2019-07-25 10:14:36 -04:00
Thomas Harte
9ef1211d53
Adds missing header file.
2019-07-24 22:13:32 -04:00
Thomas Harte
f2ae04597f
Updates test case.
2019-07-24 22:07:17 -04:00
Thomas Harte
1327de1c82
Slims the Program struct down to 8 bytes total.
2019-07-24 22:02:50 -04:00
Thomas Harte
827c4e172a
Cuts a third from the Program
struct.
...
Observation: [source/destination]_address are always one of the address registers. So you can fit both within a single byte.
Net effect: around a 12% reduction in execution costs, given that this reduces the size of the instructions table from 3mb to 2mb.
2019-07-24 18:39:36 -04:00
Thomas Harte
c300bd17fa
Regularises as many source/destination sets as fit the current setter.
2019-07-24 18:22:44 -04:00
Thomas Harte
0187fd8eae
Hides all runtime Program member accesses behind macros.
...
... and fixes unit tests.
2019-07-24 12:01:30 -04:00
Thomas Harte
4aca6c5ef8
Adds a note of admission here.
2019-07-23 23:03:15 -04:00
Thomas Harte
fa226bb1b9
Seeks to reduce enquiry costs.
2019-07-17 15:09:26 -04:00
Thomas Harte
cac97a9663
Devolves drive responsibility.
2019-07-10 22:39:56 -04:00
Thomas Harte
2ccb564a7b
Throws some extra logging into place, to test the IWM changeover.
2019-07-10 21:39:45 -04:00
Thomas Harte
ed4ddcfda8
Reduces call/return overhead on Microcycle methods.
2019-07-09 19:55:30 -04:00
Thomas Harte
69b94719a1
Switches to faster bit count logic.
2019-07-09 18:41:20 -04:00
Thomas Harte
5078f6fb5c
Marginally reduces MOVE heft.
2019-07-09 18:07:11 -04:00
Thomas Harte
94457d81b6
Eliminates redundant and integer-size-troubling AND on ASL.
2019-07-08 18:33:50 -04:00
Thomas Harte
fb352a8d40
Ensures assert
is completely excluded if NDEBUG.
2019-07-08 18:00:37 -04:00
Thomas Harte
b9c2c42bc0
Switches drives to using floats for time counting.
...
Hopefully to eliminate a lot of unnecessary `Time` work; inaccuracies should still be within tolerable range.
2019-07-02 15:43:03 -04:00
Thomas Harte
c4cbe9476c
Corrects EA selection logic, fixing MOVEP.
2019-07-02 13:54:21 -04:00
Thomas Harte
0a67cc3dab
Goes nuclear on ROXL and ROXR.
2019-07-01 23:05:48 -04:00
Thomas Harte
726e07ed5b
Corrects ASL overflow flag.
2019-07-01 19:46:58 -04:00
Thomas Harte
11d8f765b2
Corrects divide-by-zero exception length, enables all other DIVS checks.
2019-07-01 15:46:04 -04:00
Thomas Harte
514e57b3e9
Corrects DIVU timing and flags, improves DIVS.
2019-07-01 14:24:32 -04:00
Thomas Harte
d8fb6fb951
Corrects MULU timing.
2019-06-30 22:40:10 -04:00
Thomas Harte
255f0d4b2a
Corrects MULS timing.
2019-06-30 22:33:54 -04:00
Thomas Harte
8d0cd356fd
Corrects TRAP, TRAPV and CHK timing.
2019-06-29 21:25:22 -04:00
Thomas Harte
17666bc059
Corrects CHK flags.
2019-06-28 19:48:53 -04:00
Thomas Harte
241d29ff7c
Imports SBCD and NBCD tests, and fixes corresponding operation.
2019-06-28 19:39:08 -04:00
Thomas Harte
c5039a4719
Imports ANDI, ORI and EORI to SR tests.
...
Hence corrects supervisor/user privileges for SR/CCR.
2019-06-28 15:05:46 -04:00
Thomas Harte
6c588a1510
Makes some further random swings at tracking the startup procedure.
2019-06-28 13:03:47 -04:00