Eric Christopher
722d315ac9
This code should never fire on non-darwin subtargets.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114811 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-27 06:01:51 +00:00
Chris Lattner
fd8fddd830
implement support for 'clr' alias. This is part of rdar://8416805,
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but balrog was wanting it on irc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114809 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-27 04:23:03 +00:00
Rafael Espindola
73ffea47d2
Move ELF to HasReliableSymbolDifference=true. Also take the opportunity to put
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symbols defined in merge sections in independent atoms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114786 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-25 05:42:19 +00:00
Dale Johannesen
c451051157
We can't return SSE/MMX vectors if SSE is disabled.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114745 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-24 19:05:48 +00:00
Owen Anderson
f523e476c2
Revert r114703 and r114702, removing the isConditionalMove flag from instructions. After further
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reflection, this isn't going to achieve the purpose I intended it for. Back to the drawing board!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114710 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-23 23:45:25 +00:00
Owen Anderson
71e416ac3a
Add isConditionalMove bits to X86 and ARM instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114703 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-23 22:57:01 +00:00
Cameron Esfahani
4af1eaee70
Fix PR8201: Update the code to call via X86::CALL64pcrel32 in the 64-bit case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114597 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 22:35:21 +00:00
Eric Christopher
56a8b817b1
Temporarily work around new address lowering while I figure out what
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needs to happen for darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114577 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 20:42:08 +00:00
Bob Wilson
eafca4e2b2
Attempt to fix llvm-gcc build. It was crashing when building gcov.o for an
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ARM cross-compiler on x86, because the MMO size did not match the type size.
This fixes the MMO size and also the size of the stack object to match the
type size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114554 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 17:35:14 +00:00
Chris Lattner
2c5291b563
fix rdar://8456371 - Handle commutable instructions written backward.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114536 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 06:26:39 +00:00
Chris Lattner
1eb1b68e3a
Fix an inconsistency in the x86 backend that led it to reject "calll foo" on
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x86-32: 32-bit calls were named "call" not "calll". 64-bit calls were correctly
named "callq", so this only impacted x86-32.
This fixes rdar://8456370 - llvm-mc rejects 'calll'
This also exposes that mingw/64 is generating a 32-bit call instead of a 64-bit call,
I will file a bugzilla.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114534 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 05:49:14 +00:00
Chris Lattner
bc57c6db4a
fix rdar://8456412 - llvm-mc crash in encoder on "mov %rdx, %cr8"
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Teaching the code generator about CR8-15, how to rex them up, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114533 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 05:29:50 +00:00
Chris Lattner
c2b942acf6
add the missing aliases for fp stack cmovs, rdar://8456391
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114531 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 04:56:20 +00:00
Chris Lattner
f93b90c5df
reimplement elf TLS support in terms of addressing modes, eliminating SegmentBaseAddress.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114529 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 04:39:11 +00:00
Chris Lattner
33d60d5e56
Fix rdar://8456364 - llvm-mc rejects '%CS'
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114528 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 04:11:10 +00:00
Chris Lattner
0c289c140e
fix rdar://8456389 - llvm-mc mismatch with 'as' on 'fstp'
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-This line, and those below, will be ignored--
M test/MC/AsmParser/X86/x86_instructions.s
M lib/Target/X86/AsmParser/X86AsmParser.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114527 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 04:04:03 +00:00
Chris Lattner
61129252e4
fix rdar://8456361 - llvm-mc rejects 'rep movsd'
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114526 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 03:50:32 +00:00
Chris Lattner
492a43e6f6
convert the last 4 X86ISD nodes that should have memoperands to have them.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114523 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 01:28:21 +00:00
Chris Lattner
2156b79c49
give X86ISD::FNSTCW16m a memoperand, since it touches memory. It only
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can access the stack due to how it is generated though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114522 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 01:11:26 +00:00
Chris Lattner
0729093cd7
give FP_TO_INT16_IN_MEM and friends a memoperand. They are only
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used with stack slots, but hey, lets be safe.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114521 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 01:05:16 +00:00
Chris Lattner
8864155a35
give VZEXT_LOAD a memory operand, it now works with segment registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114515 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 00:34:38 +00:00
Chris Lattner
0b79cfee15
revert r114386 now that address modes work correctly, we get a nice
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call through gs-relative memory now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114510 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 00:11:31 +00:00
Chris Lattner
93c4a5bef7
give LCMPXCHG_DAG[8] a memory operand, allowing it to work with addrspace 256/257
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114508 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 23:59:42 +00:00
Chris Lattner
b86faa17a4
reimplement support for GS and FS relative address space matching
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by having X86DAGToDAGISel::SelectAddr get passed in the parent node
of the operand match (the load/store/atomic op) and having it get
the address space from that, instead of having special FS/GS addr
mode operations that require duplicating the entire instruction set
to support.
This makes FS and GS relative accesses *far* more predictable and
work much better. It also simplifies the X86 backend a bit, more
to come.
There is still a pending issue with nodes like ISD::PREFETCH and
X86ISD::FLD, which really should be MemSDNode's but aren't.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114491 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 22:07:31 +00:00
Owen Anderson
bc146b0a4d
Reimplement r114460 in target-independent DAGCombine rather than target-dependent, by using
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the predicate to discover the number of sign bits. Enhance X86's target lowering to provide
a useful response to this query.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114473 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 20:42:50 +00:00
Chris Lattner
52a261b3c1
fix a long standing wart: all the ComplexPattern's were being
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passed the root of the match, even though only a few patterns
actually needed this (one in X86, several in ARM [which should
be refactored anyway], and some in CellSPU that I don't feel
like detangling). Instead of requiring all ComplexPatterns to
take the dead root, have targets opt into getting the root by
putting SDNPWantRoot on the ComplexPattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114471 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 20:31:19 +00:00
Chris Lattner
701cd62297
even though I'm about to rip it out, simplify the address mode stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114468 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 19:41:58 +00:00
Chris Lattner
fc448ff89b
convert a couple more places to use the new getStore()
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114463 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 18:51:21 +00:00
Owen Anderson
c004eec71b
When adding the carry bit to another value on X86, exploit the fact that the carry-materialization
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(sbbl x, x) sets the registers to 0 or ~0. Combined with two's complement arithmetic, we can fold
the intermediate AND and the ADD into a single SUB.
This fixes <rdar://problem/8449754>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114460 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 18:41:19 +00:00
Chris Lattner
8026a9d3ee
eliminate some uses of the getStore overload.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114453 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 17:50:43 +00:00
Chris Lattner
3d6ccfba31
propagate MachinePointerInfo through various uses of the old
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SelectionDAG::getExtLoad overload, and eliminate it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114446 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 17:04:51 +00:00
Chris Lattner
d1c24ed81c
convert the targets off the non-MachinePointerInfo of getLoad.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114410 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 06:44:06 +00:00
Chris Lattner
e8639036b1
it's more elegant to put the "getConstantPool" and
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"getFixedStack" on the MachinePointerInfo class. While
this isn't the problem I'm setting out to solve, it is the
right way to eliminate PseudoSourceValue, so lets go with it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114406 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 06:22:23 +00:00
Chris Lattner
51abfe490b
update the X86 backend to use the MachinePointerInfo version of one
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of the getLoad methods. This fixes at least one bug where an incorrect
svoffset is passed in (a potential combiner-aa miscompile).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114404 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 06:02:19 +00:00
Chris Lattner
e54b482d1c
Fix a bug where the x86 backend would lower memcpy/memset of segment relative operations
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into non-segment-relative copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114402 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 05:43:34 +00:00
Chris Lattner
e72f2027e9
reimplement memcpy/memmove/memset lowering to use MachinePointerInfo
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instead of srcvalue/offset pairs. This corrects SV info for mem
operations whose size is > 32-bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114401 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 05:40:29 +00:00
Chris Lattner
59db5496f4
convert targets to the new MF.getMachineMemOperand interface.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114391 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 04:39:43 +00:00
Chris Lattner
08bad54baf
fix rdar://8453210, a crash handling a call through a GS relative load.
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For now, just disable folding the load into the call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114386 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 03:37:00 +00:00
NAKAMURA Takumi
cd458be047
X86Subtarget.h: Fix Cygwin's TD.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114297 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-18 19:50:42 +00:00
Dan Gohman
d8c0a51362
Avoid emitting a PIC base register if no PIC addresses are needed.
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This fixes rdar://8396318.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114201 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-17 20:24:24 +00:00
Chris Lattner
40cc3f8783
fix rdar://8444631 - encoder crash on 'enter'
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What a weird instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114190 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-17 18:02:29 +00:00
Chris Lattner
35aa94b229
fix rdar://8438816 - unrecognized 'fildq' instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114116 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-16 20:46:38 +00:00
Chris Lattner
d0bcc9a015
lcall and ljmp always default to lcalll and ljmpl. This finally
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wraps up r8418316
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113949 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-15 05:30:20 +00:00
Chris Lattner
cbb442640f
apparently jmpl $1,$2 is an alias for ljmpl, similiarly
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for call. Add this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113948 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-15 05:25:21 +00:00
Chris Lattner
250b948f21
Disambiguate lcall/ljmp to the 32-bit version. This happens
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even in 64-bit mode apparently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113945 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-15 05:14:54 +00:00
Chris Lattner
6c1b3b1e32
fix the encoding of sldt GR16 to have the 0x66 prefix, and
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add sldt GR32, which isn't documented in the intel manual
but which gas accepts. Part of rdar://8418316
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113938 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-15 04:45:10 +00:00
Chris Lattner
cfad564043
implement aliases for shld/shrd, part of rdar://8418316
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113937 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-15 04:37:18 +00:00
Chris Lattner
e9e16a36d9
fix rdar://8431880 - rcl/rcr with no shift amount not recognized
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113936 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-15 04:33:27 +00:00
Chris Lattner
84f362d891
add various broken forms of fnstsw. I didn't add the %rax
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version because it adds a prefix and makes even less sense
than the other broken forms. This wraps up rdar://8431422
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113932 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-15 04:15:16 +00:00
Chris Lattner
8f777a205e
add some aliases for f[u]comi, part of rdar://8431422
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113930 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-15 04:08:38 +00:00
Chris Lattner
2d592d10a5
add a bunch of aliases for fp operations with no operand,
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rdar://8431422
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113929 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-15 04:04:33 +00:00
Chris Lattner
f884012c93
Diagnose invalid instructions like "incl" with "too few operands for instruction"
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instead of crashing. This fixes:
rdar://8431815 - crash when invalid operand is one that isn't present
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113921 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-15 03:50:11 +00:00
Jim Grosbach
22854b777e
trailing whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113915 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-15 01:01:45 +00:00
Chris Lattner
ef63c9a9b6
add a terrible hack to allow out with dx is parens, a gas bug.
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This fixes PR8114
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113894 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-14 23:34:29 +00:00
Michael J. Spencer
3a210e2d30
Revert "CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally."
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This reverts commit r113632
Conflicts:
cmake/modules/AddLLVM.cmake
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113819 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-13 23:59:48 +00:00
Dale Johannesen
e5db19ebd5
Fix typos. 128-bit PSHUFB takes 128-bit memory op.
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v8i16 is not an MMX type; put it where it belongs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113785 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-13 21:15:43 +00:00
John Thompson
eac6e1d0c7
Added skeleton for inline asm multiple alternative constraint support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113766 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-13 18:15:37 +00:00
Chris Lattner
0989d29d09
add a missed cmov alias, part of rdar://8416805
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113693 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-11 17:08:22 +00:00
Chris Lattner
697d37a436
add support for all the setCC aliases. Part of rdar://8416805
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113692 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-11 17:06:05 +00:00
Chris Lattner
dfa3c9d982
add support for pushfd/popfd which are aliases for pushfl/popfl.
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This fixes rdar://8408129 - pushfd and popfd get invalid instruction mnemonic errors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113690 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-11 16:39:16 +00:00
Chris Lattner
ee211d0ed6
implement rdar://8407928 - support for in/out with a missing "a" register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113689 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-11 16:32:12 +00:00
Chris Lattner
cbf8a98c7c
fix the asmparser so that the target is responsible for skipping to
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the end of the line on a parser error, allowing skipping to happen
for syntactic errors but not for semantic errors. Before we would
miss emitting a diagnostic about the second line, because we skipped
it due to the semantic error on the first line:
foo %eax
bar %al
This fixes rdar://8414033 - llvm-mc ignores lines after an invalid instruction mnemonic errors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113688 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-11 16:18:25 +00:00
Michael J. Spencer
4e9c939312
CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113632 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-10 21:14:25 +00:00
Bill Wendling
1ec2ee6526
Reapply r113585. The msvc machine is mercurial.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113610 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-10 20:20:28 +00:00
Bill Wendling
b28f579200
r113585 was causing clang-i686-xp-msvc9 to fail in mysterious ways that I can't
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understand (the log file was no help).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113605 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-10 19:20:47 +00:00
Bill Wendling
81781ed939
Mark the sse_load_f32 and sse_load_f64 load patterns as having memoperands so
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that the memoperands are properly set after DAG building and general mucking
about.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113585 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-10 10:34:22 +00:00
Bruno Cardoso Lopes
ae4f7421c0
Add one more pattern to fallback movddup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113522 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-09 18:48:34 +00:00
Roman Divacky
5baf79edc0
Make ELF OS ABI dependent on the OS from target triple.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113508 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-09 17:57:50 +00:00
Dale Johannesen
f73c5587fa
Move remaining MMX instructions from SSE to MMX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113501 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-09 17:13:07 +00:00
Dale Johannesen
4efb0feac8
Move most MMX instructions (defined as anything that
...
uses MMX, even if it also uses other things) from InstrSSE
into InstrMMX. No (intended) functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113462 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-09 01:02:39 +00:00
Chris Lattner
90b54547d9
fix rdar://8407548, I missed the commuted form of xchg/test without a suffix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113427 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 22:27:05 +00:00
Chris Lattner
a7f08b4970
fix wonky formatting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113426 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 22:22:10 +00:00
Chris Lattner
373c458850
fix bugs in push/pop segment support, rdar://8407242
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113422 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 22:13:08 +00:00
Dale Johannesen
52664c8efe
Add intrinsic-based patterns for MMX PINSRW and PEXTRW.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113420 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 22:08:40 +00:00
Dale Johannesen
ab1deb998e
Check in forgotten file. Should fix build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113409 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 21:09:48 +00:00
Dale Johannesen
246658f158
Slight cleanup, use only one form of MMXI_binop_rm_int.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113406 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 20:54:00 +00:00
Dale Johannesen
af4748168c
Add intrinsic forms of mmx<->sse conversions. Notes:
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Omission of memory form of PI2PD is intentional; this
does not use an MMX register and does not put the chip
into MMX mode (PI2PS, oddly enough, does).
Operands of PI2PS follow the gcc builtin, not Intel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113388 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 19:15:38 +00:00
Bruno Cardoso Lopes
0a7dd4fa40
Minor change. Fix comments and remove unused and redundant code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113378 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 18:12:31 +00:00
Bruno Cardoso Lopes
1485cc2bb3
x86 vector shuffle lowering now relies only on target specific
...
nodes to emit shuffles and don't do isel mask matching anymore.
- Add the selection of the remaining shuffle opcode (movddup)
- Introduce two new functions to "recognize" where we may get
potential folds and add several comments to them explaining why
they are not yet in the desidered shape.
- Add more patterns to fallback the case where we select
a specific shuffle opcode as if it could fold a load, but it
can't, so remap to a valid instruction.
- Add a couple of FIXMEs to address in the following days once
there's a good solution to the current folding problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113369 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 17:43:25 +00:00
Chris Lattner
c8ae35a8e8
add support for the commuted form of the test instruction, rdar://8018260.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113352 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 05:51:12 +00:00
Chris Lattner
ba8e81cca2
implement proper support for sysret{,l,q}, rdar://8403907
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113350 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 05:45:34 +00:00
Chris Lattner
ba8cea450f
implement the iret suite of instructions properly,
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fixing rdar://8403974
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113349 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 05:38:31 +00:00
Chris Lattner
2544f42692
add support for instruction prefixes on the same line as the instruction,
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implementing rdar://8033482 and PR7254.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113348 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 05:17:37 +00:00
Chris Lattner
34e53140c2
change the MC "ParseInstruction" interface to make it the
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implementation's job to check for and lex the EndOfStatement
marker.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113347 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 05:10:46 +00:00
Chris Lattner
9607c40601
gas accepts xchg <mem>, <reg> as a synonym for xchg <reg>, <mem>.
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Add this to the mc assembler, fixing PR8061
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113346 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 04:53:27 +00:00
Chris Lattner
a247685b30
fix the encoding of the "jump on *cx" family of instructions,
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rdar://8061602
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113343 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 04:30:51 +00:00
Bruno Cardoso Lopes
90462b4ae1
Factor out some x86 vector shuffle rewriting and add comments about the direction the shuffle lowering is heading to
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113286 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 21:03:14 +00:00
Bruno Cardoso Lopes
0d1340b181
Move code around to prepare for moving some of the logic together to another function
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113267 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 20:20:27 +00:00
Bill Wendling
d8dd5757e0
Add an MVT::x86mmx type. It will take the place of all current MMX vector types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113261 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 20:03:56 +00:00
Evan Cheng
dc0b06c815
Remove a dead comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113259 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 20:01:10 +00:00
Bruno Cardoso Lopes
58277b17c3
decouple MMX check from regular splat checks. Some refactoring is coming, and MMX should be left alone to be easily removed after moving to intrinsics
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113247 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 18:41:45 +00:00
Bruno Cardoso Lopes
673bf78bb5
Remove now useless check, because the code can be matched below, no need to leave it for isel
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113242 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 18:29:03 +00:00
Bruno Cardoso Lopes
67fc1e76d4
Minor change. Since the checks are equivalent, use isMMX
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113239 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 18:24:00 +00:00
Dale Johannesen
86097c384f
Add patterns for MMX that use the new intrinsics.
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Enable palignr intrinsic.
These may need adjustment for a new VT in due course.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113233 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 18:10:56 +00:00
Bruno Cardoso Lopes
70e81f1517
Remove unused target specific node
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113224 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 17:38:55 +00:00
Benjamin Kramer
aceeb3a4e2
Don't leak the old operand when transforming "sldt" into "sldtw".
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113200 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 14:40:58 +00:00
Chris Lattner
e9e0fc5eed
add missing cmov aliases, this resolves rdar://8208499
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113189 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 00:05:45 +00:00
Chris Lattner
7d284de955
remove duplicated entry
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113188 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 23:57:24 +00:00
Chris Lattner
c5cebeb3cb
"sldt <mem>" is ambiguous in 64-bit mode, but should
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always be disambiguated as sldtw. sldtw and sldtq with
a mem operands have the same effect, but sldtw is more
compact. Force it to sldtw, resolving rdar://8017530
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113186 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 23:51:44 +00:00
Chris Lattner
d68c474ec5
fix rdar://8017621 - llvm-mc can't guess encoding for "push $(1000)"
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113184 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 23:40:56 +00:00
Chris Lattner
9389b60a03
fix the operand constraints of the immediate form of in/out,
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allowing unsigned 8-bit operands. This fixes rdar://8208481
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113182 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 23:29:05 +00:00
Chris Lattner
ce4a3355d9
in the case where an instruction only has one implementation
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of a mneumonic, report operand errors with better location
info. For example, we now report:
t.s:6:14: error: invalid operand for instruction
cwtl $1
^
but we fail for common cases like:
t.s:11:4: error: invalid operand for instruction
addl $1, $1
^
because we don't know if this is supposed to be the reg/imm or imm/reg
form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113178 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 22:11:18 +00:00
Chris Lattner
a008e8ac73
Now that we know if we had a total fail on the instruction mnemonic,
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give a more detailed error. Before:
t.s:11:4: error: unrecognized instruction
addl $1, $1
^
t.s:12:4: error: unrecognized instruction
f2efqefa $1
^
After:
t.s:11:4: error: invalid operand for instruction
addl $1, $1
^
t.s:12:4: error: invalid instruction mnemonic 'f2efqefa'
f2efqefa $1
^
This fixes rdar://8017912 - llvm-mc says "unrecognized instruction" when it means "invalid operands"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113176 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 21:54:15 +00:00
Chris Lattner
69c7249a6f
simplify the hacks around jrcxz.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113167 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 20:10:12 +00:00
Chris Lattner
ec6789f4f9
have tblgen detect when an instruction would have matched, but
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failed because a subtarget feature was not enabled. Use this to
remove a bunch of hacks from the X86AsmParser for rejecting things
like popfl in 64-bit mode. Previously these hacks weren't needed,
but were important to get a message better than "invalid instruction"
when used in the wrong mode.
This also fixes bugs where pushal would not be rejected correctly in
32-bit mode (just pusha).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113166 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 20:08:02 +00:00
Chris Lattner
79ed3f77e8
change MatchInstructionImpl to return an enum instead of bool.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113165 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 19:22:17 +00:00
Chris Lattner
0692ee676f
have AsmMatcherEmitter.cpp produce the hunk of code that gets included
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into the middle of the class, and rework how the different sections of
the generated file are conditionally included for simplicity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113163 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 19:11:01 +00:00
Roman Divacky
436c54a186
Redefine LOOP* instructions from I to Ii8PCRel as they take an i8 argument.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113158 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 18:43:14 +00:00
Chris Lattner
47ab90bfa8
random cleanups
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113157 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 18:32:06 +00:00
Chris Lattner
f0f5780b39
update this.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113116 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-05 20:22:09 +00:00
Chris Lattner
beac75da37
implement rdar://6653118 - fastisel should fold loads where possible.
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Since mem2reg isn't run at -O0, we get a ton of reloads from the stack,
for example, before, this code:
int foo(int x, int y, int z) {
return x+y+z;
}
used to compile into:
_foo: ## @foo
subq $12, %rsp
movl %edi, 8(%rsp)
movl %esi, 4(%rsp)
movl %edx, (%rsp)
movl 8(%rsp), %edx
movl 4(%rsp), %esi
addl %edx, %esi
movl (%rsp), %edx
addl %esi, %edx
movl %edx, %eax
addq $12, %rsp
ret
Now we produce:
_foo: ## @foo
subq $12, %rsp
movl %edi, 8(%rsp)
movl %esi, 4(%rsp)
movl %edx, (%rsp)
movl 8(%rsp), %edx
addl 4(%rsp), %edx ## Folded load
addl (%rsp), %edx ## Folded load
movl %edx, %eax
addq $12, %rsp
ret
Fewer instructions and less register use = faster compiles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113102 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-05 02:18:34 +00:00
Chris Lattner
17aa68055b
zap dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113073 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 18:12:00 +00:00
Bruno Cardoso Lopes
2eb63dfa0a
Remove the last bit of isShuffleMaskLegal checks and improve the comment regarding mmx shuffles
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113059 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 02:58:56 +00:00
Bruno Cardoso Lopes
828f6ae03c
make explicit that we not handle several mmx shuffles
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113058 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 02:50:13 +00:00
Bruno Cardoso Lopes
aace0f295b
Emit target specific nodes to handle palignr. Do not touch it for MMX versions yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113056 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 02:36:07 +00:00
Bruno Cardoso Lopes
c800c0d25f
Emit target specific nodes to handle splats starting at zero indicies
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113055 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 02:02:14 +00:00
Bruno Cardoso Lopes
bbfc31012b
Emit target specific nodes for isPSHUFHWMask and isPSHUFLWMask
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113050 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 01:36:45 +00:00
Bruno Cardoso Lopes
4c827f5ae1
Emit target specific nodes for isSHUFPMask
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113048 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 01:22:57 +00:00
Bruno Cardoso Lopes
d344f28b9d
Previous isMOVLMask matching already emits targets nodes, remove check
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113047 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 00:50:08 +00:00
Bruno Cardoso Lopes
e09abcd3c4
One more check from the original isShuffleMaskLegal goes away
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113045 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 00:46:16 +00:00
Bruno Cardoso Lopes
b733996110
Remove a duplicated but useless check that i've inserted in the previous commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113044 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 00:43:12 +00:00
Bruno Cardoso Lopes
a22c84571a
Refactor some code and remove the extra checks for unpckl_undef and unpckh_undef
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113043 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 00:39:43 +00:00
Bruno Cardoso Lopes
43c05744b5
Remove check for unpckh mask
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113035 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 23:32:47 +00:00
Bruno Cardoso Lopes
ef3adb3243
Remove check for unpckl mask
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113034 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 23:31:50 +00:00
Bruno Cardoso Lopes
7256e22f77
Inline isShuffleMaskLegal into LowerVECTOR_SHUFFLE, so we can start
...
checking each standalone condition and decide whether emit target
specific nodes or remove the condition if it's already matched before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113031 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 23:24:06 +00:00
Bruno Cardoso Lopes
e8f279cbd4
Reapply considered harmfull part of rr112934 and r112942.
...
"Use target specific nodes instead of relying in unpckl and
unpckh pattern fragments during isel time. Also place a
depth limit in getShuffleScalarElt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113020 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 22:09:41 +00:00
Dale Johannesen
caa9ba228d
Remove the rest of the nonexistent 64-bit AVX instructions.
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Bruno, please review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113014 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 21:23:00 +00:00
Bruno Cardoso Lopes
190d0a54c1
Reapply last harmless part of r112934, the pattern fragment to match X86Unpcklpd
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113009 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 20:44:26 +00:00
Bruno Cardoso Lopes
2a4460606e
Reintroduce a simple function refactoring done in r112934, also without any functionality changes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113008 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 20:20:02 +00:00
Bruno Cardoso Lopes
be8b084d8a
Reapply piecies of r112942 and r112934 which don't do
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functional changes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113007 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 20:10:35 +00:00
Bruno Cardoso Lopes
b3e0669b8e
Reapply Fix comment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113006 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 19:55:05 +00:00
Daniel Dunbar
3139422058
Revert r112934, "- Use specific nodes to match unpckl masks.", which introduced
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some infinite loop and select failures.
- Apologies for eager reverting, but its branch day.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113000 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 19:38:11 +00:00
Daniel Dunbar
78541f258c
Revert r112938 "Fix comment", which depends on r112934, which introduced some
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infinite loop and select failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112999 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 19:38:08 +00:00
Daniel Dunbar
a87ccce95b
Revert r112942, "Use punpckh and unpckh family of nodes instead of using unpckh
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mask pattern fragment", which depends on r112934, which introduced some infinite
loop and select failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112998 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 19:38:05 +00:00
Bruno Cardoso Lopes
95f1e2d6b5
AVX doesn't support mm operations neither its instrinsics.
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The AVX versions of PALIGN and PABS* should only exist for
128-bit. Remove the unnecessary stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112944 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 02:08:45 +00:00
Bruno Cardoso Lopes
4b0c9f3e73
Use punpckh and unpckh family of nodes instead of using unpckh mask pattern fragment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112942 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 01:39:08 +00:00
Bruno Cardoso Lopes
01f0847ce8
Fix comment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112938 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 01:28:51 +00:00
Bruno Cardoso Lopes
5e5342b0a8
- Use specific nodes to match unpckl masks.
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- Teach getShuffleScalarElt how to handle more target
specific nodes, so the DAGCombine can make use of it.
- Add another hack to avoid the node update problem
during legalization. More description on the comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112934 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 01:24:00 +00:00
Jakob Stoklund Olesen
3061c4442e
Don't call Predicate_* from X86 target.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112921 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 00:35:18 +00:00
Anton Korobeynikov
ace53f2fbc
Properly emit __chkstk call instead of __alloca on non-mingw windows targets.
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Patch by Cameron Esfahani!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112902 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 23:03:46 +00:00
Bruno Cardoso Lopes
ed5c711a6e
Move insertps mask decoding to header file
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112896 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 22:43:39 +00:00
Anton Korobeynikov
c7c62bb3ca
Revert win64 changes. They seem to be incomplete
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112885 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 22:31:32 +00:00
Anton Korobeynikov
2f4fad99ea
Properly allocate win64 shadow reg area.
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Patch by Jan Sjodin!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112875 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 22:16:28 +00:00
Bruno Cardoso Lopes
5594560766
Move decoding of insertps back to avoid unused warnings in x86 isel lowering, and fix movlhps/movhlps to decode 4 elements shuffles
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112869 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 21:51:11 +00:00
Dan Gohman
24bde5bce1
Don't narrow the load and store in a load+twiddle+store sequence unless
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there are clearly no stores between the load and the store. This fixes
this miscompile reported as PR7833.
This breaks the test/CodeGen/X86/narrow_op-2.ll optimization, which is
safe, but awkward to prove safe. Move it to X86's README.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112861 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 21:18:42 +00:00
Bruno Cardoso Lopes
6b1d0a3b36
Move x86 specific shuffle mask decoding to its own header, it's also going to be used elsewhere. Also trim trailing whitespaces
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112846 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 18:40:13 +00:00
Bruno Cardoso Lopes
3722f007b6
Replace unpckl_undef and unpckh_undef matching with target specific opcodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112806 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 05:23:12 +00:00
Bruno Cardoso Lopes
dd69db858c
Move condition out to prepare for more matching
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112805 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 04:20:26 +00:00
Bruno Cardoso Lopes
ad10fb2b56
Remove checking for isUNPCKL_v_undef_Mask, the specific node is already emitted for it
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112804 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 03:57:58 +00:00
Bruno Cardoso Lopes
d00bfe1f8d
become more strict about when it's safe to use X86ISD::MOVLPS
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112799 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 02:35:51 +00:00