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77 Commits

Author SHA1 Message Date
Chris Lattner
e594fd473e Emit saveri with the correct operand order, patch by Richard Pennington! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54313 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-03 18:16:14 +00:00
Evan Cheng
ca1267c02b Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48995 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-31 20:40:39 +00:00
Dan Gohman
6f0d024a53 Rename MRegisterInfo to TargetRegisterInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-10 18:45:23 +00:00
Owen Anderson
43dbe05279 Move even more functionality from MRegisterInfo into TargetInstrInfo. 
Some day I'll get it all moved over...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45672 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-01-07 01:35:02 +00:00
Owen Anderson
f6372aa1cc Move some more instruction creation methods from RegisterInfo into InstrInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45484 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-01-01 21:11:32 +00:00
Owen Anderson
d10fd9791c Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the 
Machine-level API cleanup instigated by Chris.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45470 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-31 06:32:00 +00:00
Chris Lattner
8aa797aa51 Add new shorter predicates for testing machine operands for various types: 
e.g. MO.isMBB() instead of MO.isMachineBasicBlock().  I don't plan on 
switching everything over, so new clients should just start using the 
shorter names.

Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(), 
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45464 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-30 23:10:15 +00:00
Chris Lattner
9a1ceaedc2 Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45453 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-30 20:49:49 +00:00
Chris Lattner
4ee451de36 Remove attribution from file headers, per discussion on llvmdev. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-29 20:36:04 +00:00
Evan Cheng
d64b5c82b9 Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether 
the stored register is killed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44600 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-05 03:14:33 +00:00
Evan Cheng
aee4af68ae Remove redundant foldMemoryOperand variants and other code clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44517 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-02 08:30:39 +00:00
Dale Johannesen
b97aec663b Add parameter to getDwarfRegNum to permit targets 
to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44056 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-13 19:13:01 +00:00
Anton Korobeynikov
f191c80cd7 Use TableGen to emit information for dwarf register numbers. 
This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43997 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-11 19:50:10 +00:00
Evan Cheng
f0a0cddbcd - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding. 
- Fix some copy+paste bugs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43153 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-18 22:40:57 +00:00
Evan Cheng
58184e6878 Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43150 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-18 21:29:24 +00:00
Evan Cheng
66f0f64082 - Added a few target hooks to generate load / store instructions from / to any 
address (not just from / to frameindexes).
- Added target hooks to unfold load / store instructions / SDNodes into separate
load, data processing, store instructions / SDNodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42621 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 01:32:41 +00:00
Evan Cheng
9efce638d3 Allow copyRegToReg to emit cross register classes copies. 
Tested with "make check"!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42346 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-26 06:25:56 +00:00
Anton Korobeynikov
2365f51ed0 Long live the exception handling! 
This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.

In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.

After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be 
thought as 'finished': I expect many small and not so small glitches
everywhere.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39855 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-14 14:06:15 +00:00
Evan Cheng
97de913821 eliminateFrameIndex() change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36626 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-01 09:13:03 +00:00
Evan Cheng
bf2c8b3c96 Added MRegisterInfo hook to re-materialize an instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35205 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 08:09:38 +00:00
Evan Cheng
5e6df4647e PEI now passes a RegScavenger ptr to eliminateFrameIndex. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34707 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 00:21:17 +00:00
Evan Cheng
0fa1b6d1b1 By default, spills kills the register being stored. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34515 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-23 01:10:04 +00:00
Jim Laskey
62819f3144 Support to provide exception and selector registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34482 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-21 22:54:50 +00:00
Evan Cheng
b371f457b0 Re-apply my liveintervalanalysis changes. Now with PR1207 fixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34428 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-19 21:49:54 +00:00
Reid Spencer
a284cbf667 For PR1207: 
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34399 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-19 03:20:00 +00:00
Evan Cheng
eceada6728 Added getReservedRegs(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34376 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-17 11:06:00 +00:00
Evan Cheng
dc77540d95 hasFP() is now a virtual method of MRegisterInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33455 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-23 00:57:47 +00:00
Evan Cheng
c2b861da18 Fix naming inconsistency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32823 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-02 21:33:40 +00:00
Bill Wendling
f5da13367f What should be the last unnecessary <iostream>s in the library. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32333 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-07 22:21:48 +00:00
Evan Cheng
c0f64ffab9 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead 
of opcode and number of operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 23:37:22 +00:00
Evan Cheng
6ce7dc2a97 Properly transfer kill / dead info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31765 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 20:58:11 +00:00
Evan Cheng
7ce4578353 Matches MachineInstr changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31712 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-13 23:36:35 +00:00
Chris Lattner
09e460662a Completely eliminate def&use operands. Now a register operand is EITHER a 
def operand or a use operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30109 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 02:31:13 +00:00
Evan Cheng
0f3ac8d8d4 getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28378 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-18 00:12:58 +00:00
Chris Lattner
e53f4a055f Move some methods out of MachineInstr into MachineOperand 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28102 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 17:52:23 +00:00
Chris Lattner
63b3d7113d There shalt be only one "immediate" operand type! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28099 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 17:21:20 +00:00
Jim Laskey
4188699f80 Foundation for call frame information. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27491 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-07 16:34:46 +00:00
Jim Laskey
a99791886d Expose base register for DwarfWriter. Refactor code accordingly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27225 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 13:48:33 +00:00
Jim Laskey
414e682bac Translate llvm target registers to dwarf register numbers properly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27180 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 20:18:45 +00:00
Jim Laskey
f1d78e8335 Add support to locate local variables in frames (early version.) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26994 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 18:12:57 +00:00
Chris Lattner
7c90f73a1b Rename SPARC V8 target to be the LLVM SPARC target. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25985 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-05 05:50:24 +00:00
Chris Lattner
c4b612ba2a Fix a nasty typo that broke functions with big stack frames. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25966 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-04 08:04:21 +00:00
Chris Lattner
69d39091fe Two changes: 
1. Treat FMOVD as a copy instruction, to help with coallescing in V9 mode
2. When in V9 mode, insert FMOVD instead of FpMOVD instructions, as we don't
   ever rewrite FpMOVD instructions into FMOVS instructions, thus we just end
   up with commented out copies!
This should fix a bunch of failures in V9 mode on sparc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25961 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-04 06:58:46 +00:00
Chris Lattner
6184f9ca5e Teach sparc to fold loads/stores into copies. 
Remove the dead getRegClassForType method
minor formating changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25936 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-03 07:06:25 +00:00
Evan Cheng
6da8d99f70 New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace 
hasInFlag, hasOutFlag.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25155 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-09 18:28:21 +00:00
Evan Cheng
171049d10f * Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead. 
* Added a pseudo instruction (for each target) that represent "return void".
  This is a workaround for lack of optional flag operand (return void is not
  lowered so it does not have a flag operand.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24997 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-23 22:14:32 +00:00
Chris Lattner
85e42b45ac Reserve G1 for frame offset stuff and use it to handle large stack frames. 
For example, instead of emitting this:

test:
        save -40112, %o6, %o6   ;; imm too large
        add %i6, -40016, %o0    ;; imm too large
        call caller
        nop
        restore %g0, %g0, %g0
        retl
        nop

emit this:

test:
        sethi 4194264, %g1
        or %g1, 848, %g1
        save %o6, %g1, %o6
        sethi 4194264, %g1
        add %g1, %i6, %g1
        add %i1, 944, %o0
        call caller
        nop
        restore %g0, %g0, %g0
        retl
        nop

which doesn't cause the assembler to barf.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24880 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-20 07:56:31 +00:00
Chris Lattner
43875e63f3 don't emit 'add %o6, 0, %o6' instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24857 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-19 02:51:12 +00:00
Chris Lattner
8ba0423660 Elimiante SP and FP, which weren't members of the IntRegs register class 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24844 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-19 00:06:52 +00:00
Chris Lattner
331355cf7d Rename load/store instructions to include an RI suffix 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24784 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-17 20:18:49 +00:00