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7486 Commits

Author SHA1 Message Date
Chris Lattner
a16b7cb1d3 Two changes: 
1) codegen a shift of a register as a shift, not an LEA.
2) teach the RA to convert a shift to an LEA instruction if it wants something
   in three-address form.

This gives us asm diffs like:

-       leal (,%eax,4), %eax
+       shll $2, %eax

which is faster on some processors and smaller on all of them.

and, more interestingly:

-       movl 24(%esi), %eax
-       leal (,%eax,4), %edi
+       movl 24(%esi), %edi
+       shll $2, %edi

Without #2, #1 was a significant pessimization in some cases.

This implements CodeGen/X86/shift-codegen.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35204 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 06:08:29 +00:00
Chris Lattner
1719e13da0 fix indentation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35202 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 02:25:53 +00:00
Dale Johannesen
80dae195c7 fix obvious comment bug 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35196 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 00:30:56 +00:00
Evan Cheng
9f6636ff0c Fix naming inconsistencies. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35163 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-19 07:48:02 +00:00
Evan Cheng
fa775d09c6 Special LDR instructions to load from non-pc-relative constantpools. These are 
rematerializable. Only used for constant generation for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35162 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-19 07:20:03 +00:00
Evan Cheng
a251570417 Constant generation instructions are re-materializable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35161 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-19 07:09:02 +00:00
Evan Cheng
e2e9e44d8f Added isReMaterializable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35160 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-19 06:22:07 +00:00
Chris Lattner
d435dbcbf9 fix a warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35152 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-19 00:39:32 +00:00
Chris Lattner
11a3a9d27d minor updates 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35143 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-18 22:41:33 +00:00
Nick Lewycky
7f4ba44f37 This is implemented. We now generate: 
entry:
        icmp ugt i32 %x, 4              ; <i1>:0 [#uses=1]
        br i1 %0, label %cond_true, label %cond_false

cond_true:              ; preds = %entry
        %tmp1 = tail call i32 (...)* @bar( i32 12 )             ; <i32> [#uses=0]
        ret void

cond_false:             ; preds = %entry
        switch i32 %x, label %cond_true15 [
                 i32 4, label %cond_true3
                 i32 3, label %cond_true7
                 i32 2, label %cond_true11
                 i32 0, label %cond_false17
        ]

...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35142 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-18 14:37:20 +00:00
Devang Patel
84f7fd2483 Support 'I' inline asm constraint. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35129 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-17 00:13:28 +00:00
Lauro Ramos Venancio
368f20fda4 Only ARMv6 has BSWAP. 
Fix MultiSource/Applications/aha test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35128 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-16 22:54:16 +00:00
Bill Wendling
1b7a81d3ae And now support for MMX logical operations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35125 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-16 09:44:46 +00:00
Evan Cheng
2770747216 Added isLegalAddressExpression(). Only allows X +/- C for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35122 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-16 08:43:56 +00:00
Bill Wendling
74027e98f1 Multiplication support for MMX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35118 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-15 21:24:36 +00:00
Evan Cheng
ba693005e9 Under X86-64 large code model, do not emit 32-bit pc relative calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35108 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-14 22:11:11 +00:00
Evan Cheng
4485d3897b Notes about codegen issues. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35107 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-14 21:03:53 +00:00
Evan Cheng
e70ef98043 Clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35105 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-14 20:20:19 +00:00
Evan Cheng
774be29769 Oops. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35104 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-14 19:44:58 +00:00
Evan Cheng
a19ac52863 X86-64 JIT is in large code model. Need stubs for direct calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35097 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-14 10:51:55 +00:00
Evan Cheng
8510dc086e x86-64 JIT stub codegen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35096 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-14 10:48:08 +00:00
Evan Cheng
5c0b61a64b Preliminary support for X86-64 JIT stub codegen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35095 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-14 10:44:30 +00:00
Evan Cheng
a13fd108f2 AM2 can match 2^n +/- 1. e.g. ldr r3, [r2, r2, lsl #2] 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35088 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-13 21:05:54 +00:00
Evan Cheng
961f879ed8 Zero is always a legal AM immediate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35087 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-13 20:37:59 +00:00
Nicolas Geoffray
b2ec1cc6cb Stack and register alignment of call arguments in the ELF ABI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35083 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-13 15:02:46 +00:00
Evan Cheng
e8308df0b9 Implement getTargetLowering() or else LSR won't be using ARM specific hooks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35077 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-13 01:20:42 +00:00
Evan Cheng
b01fad6d19 Updated TargetLowering LSR addressing mode hooks for ARM and Thumb. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35075 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-12 23:30:29 +00:00
Evan Cheng
861939152d More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35074 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-12 23:29:01 +00:00
Evan Cheng
a8a155e77f More flexible TargetLowering LSR hooks for testing whether an immediate is 
a legal target address immediate or scale.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35073 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-12 23:28:50 +00:00
Evan Cheng
37e8856f74 Stupid bug: SSE2 supports v2i64 add / sub. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35070 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-12 22:58:52 +00:00
Bill Wendling
c1fb0473ed Adding more arithmetic operators to MMX. This is an almost exact copy of 
the addition. Please let me know if you have suggestions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35055 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-10 09:57:05 +00:00
Evan Cheng
1a9da0d66c Minor stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35049 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-09 19:46:06 +00:00
Evan Cheng
44f4fca3c0 Add comments about LSR / ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35048 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-09 19:35:33 +00:00
Evan Cheng
2265b49193 Unfinished work and ideas related to register scavenger. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35047 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-09 19:34:51 +00:00
Dale Johannesen
818c085232 apply comments from review of last patch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35045 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-09 19:18:59 +00:00
Dale Johannesen
a6bc6fc170 Add some observations from CoreGraphics benchmark. Remove register 
scavenging todo item, since it is now implemented.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35044 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-09 17:58:17 +00:00
Evan Cheng
23a9570494 Implement inline asm modifier c. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35035 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 22:42:46 +00:00
Bill Wendling
2f88dcdfb3 Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that 
moves, loads, etc. are recognized.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35031 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 22:09:11 +00:00
Evan Cheng
b582b1b1fc Fix a typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35030 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 21:59:30 +00:00
Evan Cheng
032953d747 Putting more constants which do not contain relocations into .literal{4|8|16} 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35026 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 08:31:54 +00:00
Evan Cheng
bf822eb6a3 Change register allocation order to Dale's suggestion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35021 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 02:56:40 +00:00
Evan Cheng
11788fde93 Bug fix. Not advancing the register scavenger iterator correctly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35020 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 02:55:08 +00:00
Evan Cheng
98ded765c2 For Darwin, put constant data into .const, .const_data, .literal{4|8|16} 
sections.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35017 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 01:25:25 +00:00
Evan Cheng
f0b5d56efd Put constant data to .const, .const_data, .literal{4|8|16} sections. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35016 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 01:07:07 +00:00
Evan Cheng
be346c9476 Add ReadOnlySection directive. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35015 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 01:00:38 +00:00
Evan Cheng
603b83ebcd Only safe to use a call-clobbered or spilled callee-saved register as scratch register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35010 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-07 20:30:36 +00:00
Bill Wendling
c32a7f98ab Remove useless pattern fragments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35009 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-07 18:23:09 +00:00
Anton Korobeynikov
d0b82b301d Refactoring of formal parameter flags. Enable properly use of 
zext/sext/aext stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35008 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-07 16:25:09 +00:00
Bill Wendling
bc9bffa27b Properly support v8i8 and v4i16 types. It now converts them to v2i32 for 
load and stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35002 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-07 05:43:18 +00:00
Anton Korobeynikov
a6199c87c2 Fix DWARF debugging information on x86/Linux and (hopefully) 
Mingw32/Cygwin targets. This fixes PR978


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35000 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-07 02:47:57 +00:00
Evan Cheng
cb20998b3f ARM always use register scavenger. No longer reserves R12. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34999 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-07 02:46:23 +00:00
Evan Cheng
0ea12ec848 Fix some brittle code. Watch out for cases where register scavenger is pointing to deleted instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34998 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-07 02:38:05 +00:00
Evan Cheng
3d06cf4584 Fix one more Thumb eliminateFrameIndex bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34990 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-07 00:12:18 +00:00
Evan Cheng
e6257632fc Register scavenging is now on by default for ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34987 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-06 22:02:53 +00:00
Evan Cheng
a90f3408b3 Make load / store optimizer use register scavenger. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34986 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-06 21:59:20 +00:00
Bill Wendling
a31bd27f12 Add LOAD/STORE support for MMX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34978 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-06 18:53:42 +00:00
Evan Cheng
cc1c427266 Code clean up. Prepare to use register scavenger. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34976 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-06 18:02:41 +00:00
Evan Cheng
28b3c45109 Minor interface change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34967 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-06 10:05:14 +00:00
Evan Cheng
140e33cfd1 Scavenge a register using the register scavenger when needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34966 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-06 10:03:56 +00:00
Anton Korobeynikov
1d9baccc9b Use new SDIselParamAttr enumeration. This removes "magick" constants 
from formal attributes' flags processing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34963 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-06 08:12:33 +00:00
Chris Lattner
b9a7bea99c Switch PPC return lower to use an autogenerated CC description. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34940 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-06 00:59:59 +00:00
Bill Wendling
229baffc4e Add the emms intrinsic for MMX support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34938 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-05 23:09:45 +00:00
Lauro Ramos Venancio
6d7dd8ef46 Use init_array/fini_array sections for static contructors/destructors when the ABI is AAPCS. 
Fix SingleSource/Regression/C/ConstructorDestructorAttributes test on arm-linux-gnueabi.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34931 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-05 17:59:58 +00:00
Jeff Cohen
ca5183d445 Unbreak VC++ build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34917 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-05 00:00:42 +00:00
Chris Lattner
569bdc7bb7 add missing braces 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34905 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-04 06:13:52 +00:00
Reid Spencer
bdc75089ab Make sure that when we store a value it is masked to its correct bit 
width. This helps CBE work with non-standard integer bit widths.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34885 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-03 16:33:33 +00:00
Nick Lewycky
f54949dc49 Emit low/high immediate loads properly for Linux/PPC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34871 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-03 05:29:51 +00:00
Evan Cheng
ae6421935b X86-64 VACOPY needs custom expansion. va_list is a struct { i32, i32, i8*, i8* }. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34857 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-02 23:16:35 +00:00
Anton Korobeynikov
f7dcfa81c5 Simplify things 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34849 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-02 21:50:27 +00:00
Chris Lattner
82932a5e4a argument lowering should copy from the vreg shadows of live-in arguments 
passed in registers, not directly from the pregs themselves.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34838 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-02 05:12:29 +00:00
Chris Lattner
9b6f57c303 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34837 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-02 05:04:52 +00:00
Dale Johannesen
9f8e50d4ed eliminate unnecessary reset of SP in epilog on darwin 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34824 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-02 01:17:17 +00:00
Reid Spencer
1ede29c951 Wrap a long line. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34799 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-01 19:48:16 +00:00
Anton Korobeynikov
9dd9abd87f Ensure that fastcall'ed function is correctly mangled & stack is 
properly aligned


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34788 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-01 16:29:22 +00:00
Nicolas Geoffray
43c6e7cd9b Implemented the frameaddress intrinsic for PPC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34787 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-01 13:11:38 +00:00
Evan Cheng
c1c2de0ae7 Use a spilled free callee-saved register as scratch register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34785 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-01 08:57:52 +00:00
Evan Cheng
f49407b790 - Track which callee-saved registers are spilled. 
- Some code clean up.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34783 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-01 08:26:31 +00:00
Evan Cheng
cda067bad9 Switch from std::vector<bool> to BitVector. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34781 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-01 07:52:44 +00:00
Bill Wendling
f1d6006ad6 Get rid of verboten <iostream> include. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34777 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-01 06:05:39 +00:00
Dale Johannesen
b71aa2b6ca Changes requested in review of last pass. Also pulled isThumb into a 
member, instead of resetting in every function that uses it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34764 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 23:20:38 +00:00
Evan Cheng
ad78ef2154 Doh. ARM::PC is obvious a reserved register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34763 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 23:12:34 +00:00
Dale Johannesen
f1b214d3ca Add intelligence about where to break large blocks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34755 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 18:41:23 +00:00
Chris Lattner
eac6607d7c remove dead option 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34754 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 18:39:53 +00:00
Chris Lattner
70500805d5 bugfix: fastcall does not require the first two params to be marked 'inreg', 
they always get registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34748 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 18:35:11 +00:00
Nate Begeman
fec910c3b9 More Mach-O writer improvements. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34740 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 07:40:50 +00:00
Chris Lattner
e32bbf61c0 use high-level functions in CCState 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34739 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 07:09:55 +00:00
Chris Lattner
638402b253 make use of helper functions in CCState for analyzing formals and calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34737 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 07:00:42 +00:00
Chris Lattner
f5d280a0a6 switch LowerFastCCCallTo over to using the new fastcall description. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34734 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 06:26:33 +00:00
Chris Lattner
fc664c1bc0 switch LowerFastCCArguments over to using the autogenerated Fastcall description. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34733 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 06:21:19 +00:00
Chris Lattner
011bcc8cdd add new CC_X86_32_FastCall calling conv, which describes fastcall on win32. 
Factor out a CC_X86_32_Common convention, which is the part shared between
ccc, stdcall and fastcall


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34732 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 06:20:01 +00:00
Chris Lattner
fcf1a3de7a rearrange code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34731 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 06:10:12 +00:00
Chris Lattner
2db39b865e remove fastcc (not fastcall) support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34730 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 06:05:16 +00:00
Chris Lattner
f39f771b02 switch LowerCCCArguments over to using autogenerated CC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34729 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 05:46:49 +00:00
Chris Lattner
c0bdf3460c simplify sret handling 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34728 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 05:39:26 +00:00
Chris Lattner
423c5f44f8 switch LowerCCCCallTo over to using an autogenerated callingconv 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34727 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 05:31:48 +00:00
Chris Lattner
370bdda526 rename stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34726 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 05:30:29 +00:00
Chris Lattner
62247f62ce rename some CCActions, add CCIfInReg 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34725 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 05:29:33 +00:00
Chris Lattner
59ed56b9ee switch return value passing and the x86-64 calling convention information 
over to being autogenerated from the X86CallingConv.td file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34722 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 04:55:35 +00:00
Chris Lattner
3d5591038a make subtarget references work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34721 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 04:51:41 +00:00
Evan Cheng
36230cdda4 Make requiresRegisterScavenging determination on a per MachineFunction basis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34711 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 00:59:19 +00:00