Evan Cheng
d23aa5a053
Rename keyword "modify" -> "implicit".
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42282 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 01:48:59 +00:00
Dale Johannesen
48d1e4517e
When mixing SSE and x87 codegen, it's possible to
...
have situations where an SSE instruction turns into
multiple blocks, with the live range of an x87
register crossing them. To do this correctly make
sure we examine all blocks when inserting
FP_REG_KILL. PR 1697. (This was exposed by my
fix for PR 1681, but the same thing could happen
mixing x87 long double with SSE.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42281 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-24 22:52:39 +00:00
Dan Gohman
a5a403d766
Add support on x86 for having Legalize lower ISD::LOCATION to ISD::DEBUG_LOC
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instead of ISD::LABEL with a manual .debug_line entry when the assembler
supports .file and .loc directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42278 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-24 21:54:14 +00:00
Dan Gohman
72252732c8
Merge hasDotLoc and hasDotFile into hasDotLocAndDotFile since .loc and .file
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aren't really usable without each other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42274 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-24 21:09:53 +00:00
Bruno Cardoso Lopes
b42abebe36
Added "LoadEffective" pattern to handle stack locations.
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Fixed some comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42271 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-24 20:15:11 +00:00
Dan Gohman
6b5766e27c
Fix the syntax for the .loc directive in preparation for using it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42268 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-24 19:25:06 +00:00
Dan Gohman
5e6e93ecdc
The code that used the StartLabelId label was removed, so remove the
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code that creates the label too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42265 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-24 16:44:26 +00:00
Chris Lattner
9b4baf1692
claim that "st" is from the 80-bit register file. This causes x87-using inline
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asm to die with:
ScheduleDAG.cpp:269: failed assertion `false && "Couldn't find the register class"'
instead of:
failed assertion `RegMap->getRegClass(VReg) == RC && "Register class of operand and regclass of use don't agree!"'
yay.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42259 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-24 05:27:37 +00:00
Dale Johannesen
f1fc3a8fa6
Fix PR 1681. When X86 target uses +sse -sse2,
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keep f32 in SSE registers and f64 in x87. This
is effectively a new codegen mode.
Change addLegalFPImmediate to permit float and
double variants to do different things.
Adjust callers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42246 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-23 14:52:20 +00:00
Chris Lattner
96b207c380
Fix PR1679, by printing GEP indices as signed values instead of unsigned.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42239 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-22 20:16:48 +00:00
Rafael Espindola
a37ac9ff53
Don't add a default STACK_ALIGN (use the generic ABI alignment)
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Implement calls to functions with byval arguments on X86
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42192 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-21 15:50:22 +00:00
Rafael Espindola
1242d28093
small cleanup: use LowerMemArgument in LowerFastCCArguments also
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42189 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-21 14:55:38 +00:00
Evan Cheng
76a4023096
Honor user-defined section specification of a global, ignores whether its initializer is null.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42182 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-21 00:41:19 +00:00
Devang Patel
0f0daea654
Do not override user specified section.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42179 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-20 23:07:37 +00:00
Dan Gohman
a4ddacf60b
Fix several more entries in the x86 reload/remat folding tables.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42162 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-20 14:17:21 +00:00
Dale Johannesen
41de436ca3
another long double buglet
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42159 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-20 01:27:54 +00:00
Evan Cheng
17207ddf38
Enable if-conversion for ARM by default.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42156 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-20 00:48:22 +00:00
Dale Johannesen
73328d14ac
More long double fixes. x86_64 should build now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42155 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-19 23:55:34 +00:00
Evan Cheng
e71bff7405
Avoid referencing deleted instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42153 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-19 21:48:07 +00:00
Evan Cheng
fab7eff0fa
PSHUFDmi, etc. are actually folding a load, not a store.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42147 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-19 19:02:47 +00:00
Evan Cheng
dcfa73fe3c
Set CCR (EFLAGS) copy cost to -1, i.e. extremely expensive to copy.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42124 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-19 01:36:39 +00:00
Evan Cheng
a3ca3149f2
Add CopyCost to TargetRegisterClass. This specifies the cost of copying a value
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between two registers in the specific class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42123 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-19 01:35:01 +00:00
Dan Gohman
869b2b2c23
Move the entries for 64-bit CMP, IMUL, and a few others into the correct
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tables so that they are eligible for reload/remat folding. And add
entries for JMP and CALL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42094 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-18 14:59:14 +00:00
Dale Johannesen
ca8035e356
Remove RSTRegClass case from loadRegFromStackSlot
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and storeRegToStackSlot. Evan and I concluded this
should never be needed and it appears to be true.
(It if is needed, adjustment would be needed for
long double to work.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42049 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-17 20:15:38 +00:00
Chris Lattner
76c1b97e40
Merge DenseMapKeyInfo & DenseMapValueInfo into DenseMapInfo
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Add a new DenseMapInfo::isEqual method to allow clients to redefine
the equality predicate used when probing the hash table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42042 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-17 18:34:04 +00:00
Evan Cheng
7d6ff3a25d
X86ISD::TEST is dead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42037 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-17 17:42:53 +00:00
Dan Gohman
a0a7c1de9c
Add 64-bit jmp instructions to the list of instructions that
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can terminate a block with no fall-through.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42029 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-17 15:19:08 +00:00
Dan Gohman
959062475d
Use xorl instead of xorq to enter a zero into a 64-bit register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42027 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-17 14:55:08 +00:00
Dan Gohman
5f6913cecd
Emit integer x<1 as x<=0, as comparisons with zero (now includeing
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64-bit) can use test instead of cmp with an immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42026 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-17 14:49:27 +00:00
Dan Gohman
11f7bfbb83
Use "test reg,reg" in place of "cmp reg,0" for 64-bit operands. This was
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previously only done for 32-bit and smaller operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42024 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-17 14:35:24 +00:00
Dale Johannesen
53f0bc1b25
Implement x86 long double (uses host long double,
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so only works on x86 target).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42019 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-17 00:38:27 +00:00
Bill Wendling
bd626b885f
Follow-up to patch r41999. Make the conditional that emits the personality stub
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match the conditional that turns on exception handling emittion in the asm
printer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42008 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-16 19:21:08 +00:00
Bill Wendling
656ab16c56
Only emit the personality function as a global value if the backend actually
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supports it. This solves this error on the Darwin x86-64 platform:
$ cat testcase.ii
struct A {
A();
};
A *bork() {
return new A;
}
$ llvm-g++ -arch x86_64 -c testcase.ii
/var/tmp//cc3U8fd8.s:52:unknown section type: non_lazy_symbol_pointers
/var/tmp//cc3U8fd8.s:52:Rest of line ignored. 1st junk character valued 76 (L).
/var/tmp//cc3U8fd8.s:53:Unknown pseudo-op: .indirect_symbol
/var/tmp//cc3U8fd8.s:53:Rest of line ignored. 1st junk character valued 95 (_).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41999 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-16 10:36:17 +00:00
Chris Lattner
5bda9e49ec
Fix PR1666, SPASS with the CBE and 254.gap with the CBE.
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GCC optimizes away things like ptr < NULL to false. To "fix" this,
have the CBE emit casts of pointers to intptr_t when doing relational
pointer comparisons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41983 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-15 06:51:03 +00:00
Dan Gohman
e47f1f9633
Add patterns for SHLD64* and SHRD64*.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41975 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-14 23:17:45 +00:00
Dale Johannesen
9e3d3abd93
Remove the assumption that FP's are either float or
...
double from some of the many places in the optimizers
it appears, and do something reasonable with x86
long double.
Make APInt::dump() public, remove newline, use it to
dump ConstantSDNode's.
Allow APFloats in FoldingSet.
Expand X86 backend handling of long doubles (conversions
to/from int, mostly).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41967 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-14 22:26:36 +00:00
Evan Cheng
24f2ea3971
Add implicit def of EFLAGS on those instructions that may modify flags.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41962 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-14 21:48:26 +00:00
Dan Gohman
92dfe2001e
Remove isReg, isImm, and isMBB, and change all their users to use
...
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41958 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-14 20:33:02 +00:00
Rafael Espindola
7effac5475
Add support for functions with byval arguments on x86
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41953 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-14 15:48:13 +00:00
Evan Cheng
fdd9f006bc
Fix comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41947 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-14 01:57:02 +00:00
Evan Cheng
85dbe1a1d2
Initial support for multi-result patterns:
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1.
[(set GR32:$dst, (add GR32:$src1, GR32:$src2)),
(modify EFLAGS)]
This indicates the source pattern expects the instruction would produce 2 values. The first is the result of the addition. The second is an implicit definition in register EFLAGS.
2.
def : Pat<(parallel (addc GR32:$src1, GR32:$src2), (modify EFLAGS)), ()>
Similar to #1 except this is used for def : Pat patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41897 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-12 23:30:14 +00:00
Dale Johannesen
9d5f456077
Revise previous patch per review comments.
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Next round of x87 long double stuff.
Getting close now, basically works.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41875 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-12 03:30:33 +00:00
Bill Wendling
fe4afb17d3
Enable indirect encoding for the personality function
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41873 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 23:55:40 +00:00
Evan Cheng
071a279e94
Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41863 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 19:55:27 +00:00
Evan Cheng
3054dde813
Added status flags register: EFLAGS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41862 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 19:53:28 +00:00
Dale Johannesen
3f6eb7419d
Add APInt interfaces to APFloat (allows directly
...
access to bits). Use them in place of float and
double interfaces where appropriate.
First bits of x86 long double constants handling
(untested, probably does not work).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41858 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 18:32:33 +00:00
Bill Wendling
ef4a661725
Add a bool to indicate if we should set the "indirect encoding" bit in the Dwarf
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information for EH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41852 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 17:20:55 +00:00
Duncan Sands
f7331b3dd7
Fold the adjust_trampoline intrinsic into
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init_trampoline. There is now only one
trampoline intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41841 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 14:10:23 +00:00
Duncan Sands
49c23935e0
My compiler warns about the semicolon.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41840 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 12:30:25 +00:00
Bill Wendling
d60da495cd
The personality function on Darwin needs a global stub. We then refer to
...
that global stub instead of doing the ".set" thingy we were doing before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41838 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 08:27:17 +00:00
Evan Cheng
be36798bfe
80 col.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41812 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-10 22:22:23 +00:00
Evan Cheng
f618e7c2a1
New entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41810 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-10 22:16:37 +00:00
Chris Lattner
bf8ae84a21
Add some notes about better flag handling.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41808 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-10 21:43:18 +00:00
Evan Cheng
b0869ed44d
It's not safe to rematerialize MOV32r0 etc. by simply cloning the original
...
instruction. These are implemented with xor which will modify the conditional
code. They should be rematerialized as move instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41802 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-10 20:48:53 +00:00
Evan Cheng
ef61ed3507
TableGen no longer emit CopyFromReg nodes for implicit results in physical
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registers. The scheduler is now responsible for emitting them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41781 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-07 23:59:02 +00:00
Bill Wendling
82d25148a7
Add missing index versions of instructions to the map.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41776 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-07 22:01:02 +00:00
Dan Gohman
1ab79897e2
Avoid storing and reloading zeros and other constants from stack slots
...
by flagging the associated instructions as being trivially rematerializable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41775 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-07 21:32:51 +00:00
Dale Johannesen
cdd509aecd
Apply feedback from previous patch.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41774 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-07 21:07:57 +00:00
Rafael Espindola
588af2fb99
Add support for having different alignment for objects on call frames.
...
The x86-64 ABI states that objects passed on the stack have
8 byte alignment. Implement that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41768 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-07 14:52:14 +00:00
Owen Anderson
718cb665ca
Add lengthof and endof templates that hide a lot of sizeof computations.
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Patch by Sterling Stein!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41758 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-07 04:06:50 +00:00
Dale Johannesen
43421b3dd7
Next round of APFloat changes.
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Use APFloat in UpgradeParser and AsmParser.
Change all references to ConstantFP to use the
APFloat interface rather than double. Remove
the ConstantFP double interfaces.
Use APFloat functions for constant folding arithmetic
and comparisons.
(There are still way too many places APFloat is
just a wrapper around host float/double, but we're
getting there.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41747 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-06 18:13:44 +00:00
Evan Cheng
61d9c861fd
Fix a bug in X86InstrInfo::convertToThreeAddress that caused it to codegen:
...
leal (,%rcx,8), %rcx
It should be
leal (,%rcx,8), %ecx
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41735 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-06 00:14:41 +00:00
Bill Wendling
399ea50dc3
LVXL and STVXL are also a load and store resp.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41733 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-05 23:47:12 +00:00
Bill Wendling
c3536b8ecb
Add the 64-bit versions of the DS* Altivec instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41717 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-05 04:05:20 +00:00
Evan Cheng
67c906dce7
Fix for PR1613: added 64-bit rotate left PPC instructions and patterns.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41711 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-04 20:20:29 +00:00
Evan Cheng
29d62bebd9
Mac OS X X86-64 ABI is same as the standard.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41700 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-04 16:44:41 +00:00
Anton Korobeynikov
3825262399
Reapply r41578 with proper fix
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41680 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-03 00:36:06 +00:00
Dale Johannesen
ee8476847d
Revise per review of previous patch.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41645 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-31 17:03:33 +00:00
Rafael Espindola
1b5dcc34b7
Initial support for calling functions with byval arguments on x86-64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41643 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-31 15:06:30 +00:00
Rafael Espindola
7240ae3cac
Align i64 and f64 at 8 byte on x86-64.
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This is mandated table 3.1 at
http://www.x86-64.org/documentation/abi.pdf
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41642 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-31 12:23:58 +00:00
Dale Johannesen
eaf089430e
Enhance APFloat to retain bits of NaNs (fixes oggenc).
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Use APFloat interfaces for more references, mostly
of ConstantFPSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41632 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-31 04:03:46 +00:00
Raul Herbster
8c132633c8
Instruction formats added used to generate multiply instructions of V5TE.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41629 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 23:34:14 +00:00
Raul Herbster
b94e60872e
Unused relocation type reloc_arm_absolute removed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41628 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 23:31:35 +00:00
Raul Herbster
9c1a3827ce
Comments added. It now generates V5TE multiply instructions. However, it is still necessary to model PUWLSH bits more clearly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41627 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 23:29:26 +00:00
Raul Herbster
37fb5b154c
ARM instruction table was modified by adding information to generate multiply instruction of V5TE.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41626 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 23:25:47 +00:00
Raul Herbster
d05c04c169
JITInfo now resolves function addrs and also relocations. It always emits a stub.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41625 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 23:21:27 +00:00
Evan Cheng
f4c3a59dba
Added support to fold X86 load / store instructions. This allow rematerialized loads to be folded into their uses.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41599 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 05:54:07 +00:00
Evan Cheng
35b35c5c32
Add a variant of foldMemoryOperand to fold any load / store, not just load / store from / to stack slots.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41597 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 05:52:20 +00:00
Evan Cheng
2f39426ec9
Mark load instructions with isLoad = 1.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41595 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 05:49:43 +00:00
Bill Wendling
b8a80f03bf
Use i64 on a PPC64 machine
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41590 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 00:59:19 +00:00
Dale Johannesen
f04afdbb48
Change LegalFPImmediates to use APFloat.
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Add APFloat interfaces to ConstantFP, SelectionDAG.
Fix integer bit in double->APFloat conversion.
Convert LegalizeDAG to use APFloat interface in
ConstantFPSDNode uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41587 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 00:23:21 +00:00
Duncan Sands
ee46574931
Move getX86RegNum into X86RegisterInfo and use it
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in the trampoline lowering. Lookup the jump and
mov opcodes for the trampoline rather than hard
coding them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41577 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-29 19:01:20 +00:00
Bruno Cardoso Lopes
51195af45f
Added method to get Mips register numbers
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Changed the stack frame layout, StackGrowsUp fits better to Mips strange stack.
Stack offset calculation bug fixed!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41529 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-28 05:13:42 +00:00
Bruno Cardoso Lopes
a2b1bb5296
Changed stack allocation On LowerFORMAL_ARGUMENTS.
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Added comments about new stack allocation.
Expand SelectCC for i32 results
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41527 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-28 05:08:16 +00:00
Bruno Cardoso Lopes
dc0c04c0ed
Mask directive completed with CalleeSave info
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Comments for Mips directives added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41526 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-28 05:06:17 +00:00
Bruno Cardoso Lopes
2d4575ea5a
Added methods to record SPOffsets from LowerFORMAL_ARGUMENTS
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41525 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-28 05:04:41 +00:00
Rafael Espindola
44c8265cf8
Add a comment about using libc memset/memcpy or generating inline code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41502 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-27 17:48:26 +00:00
Rafael Espindola
6b83b5d1ae
call libc memcpy/memset if array size is bigger then threshold.
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Coping 100MB array (after a warmup) shows that glibc 2.6.1 implementation on
x86-64 (core 2) is 30% faster (from 0.270917s to 0.188079s)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41479 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-27 10:18:20 +00:00
Chris Lattner
48884cd80b
rename isOperandValidForConstraint to LowerAsmOperandForConstraint,
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changing the interface to allow for future changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41384 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-25 00:47:38 +00:00
Chris Lattner
90e167a908
Disable EH generation until PPC works 100%.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41360 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-24 16:00:15 +00:00
Chris Lattner
b23f4c5f44
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41359 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-24 15:17:59 +00:00
Chris Lattner
9e43d6316f
add some notes on really poor codegen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41319 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-23 15:22:07 +00:00
Chris Lattner
aabd0359a3
new example
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41318 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-23 15:16:03 +00:00
Bill Wendling
adbda021e7
Add the PCSymbol for Darwin x86 platforms.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41284 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-22 18:44:05 +00:00
Bruno Cardoso Lopes
84f47c52fd
InlineAsm asm support for integer registers added
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41225 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-21 16:09:25 +00:00
Bruno Cardoso Lopes
edeede2bb5
Instruction Itinerary attribution fixed
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41224 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-21 16:06:45 +00:00
Anton Korobeynikov
095546ce34
Use only 1 knob to enable exceptions on Darwin :).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41208 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-21 00:31:30 +00:00
Rafael Espindola
21485be444
Partial implementation of calling functions with byval arguments:
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*) The needed information is propagated to the DAG
*) The X86-64 backend detects it and aborts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41179 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-20 15:18:24 +00:00
Chris Lattner
cf8ba696b3
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41178 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-20 02:14:33 +00:00
Bruno Cardoso Lopes
9710536b44
MipsHi now has ouput flag
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MipsAdd SDNode created to add support to an Add opcode which supports input flag
Added an instruction itinerary to all instruction classes
Added branches with zero cond codes
Now call clobbers all non-callee saved registers
Call w/ register support added
Added DelaySlot to branch and load instructions
Added patterns to handle all setcc, brcond/setcc and MipsAdd instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41161 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-18 02:37:46 +00:00
Bruno Cardoso Lopes
055c7eb4a4
Fixed stack frame addressing bug
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41160 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-18 02:19:09 +00:00
Bruno Cardoso Lopes
6d32ca0762
support for Schedule included on Mips.td
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41159 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-18 02:18:07 +00:00
Bruno Cardoso Lopes
7ff6fa2503
Removed LowerRETURADDR, fixed small bug into LowerRET, LowerGlobalAddress
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fixed to generate instructions (add, lui) glued!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41158 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-18 02:16:30 +00:00
Bruno Cardoso Lopes
250a1714be
Couple of small changes. Delay Slot handle header declared.
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Newline added after macros at function init on generated asm!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41157 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-18 02:05:24 +00:00
Bruno Cardoso Lopes
e88c36819e
Added InstrItinClass support for instruction formats
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41156 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-18 02:01:28 +00:00
Bruno Cardoso Lopes
0b2cd89a39
Branch Analysis and InsertNoop inserted into header files
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41155 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-18 01:59:45 +00:00
Bruno Cardoso Lopes
aff42dcf5d
createMipsDelaySlotFillerPass added to mips codegen runtime
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41154 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-18 01:58:15 +00:00
Bruno Cardoso Lopes
35d2a47994
Added Branch Analysis support
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Added InsertNoop support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41153 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-18 01:56:48 +00:00
Bruno Cardoso Lopes
de6a9411db
LowerRETURNADDR removed since it was wrong and does not have utility yet!
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MipsAdd opcode added
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41152 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-18 01:54:09 +00:00
Bruno Cardoso Lopes
13d1b7bbb3
InstrItineraryData support on added.
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Added Mips3 ISA feature (needed when supporting R4000 machines)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41151 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-18 01:52:27 +00:00
Bruno Cardoso Lopes
9684a697d5
A Pass to insert Nops on intructions with DelaySlot
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41150 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-18 01:50:47 +00:00
Bruno Cardoso Lopes
a5793899e3
Mips generic fallback instruction schedule support!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41149 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-18 01:46:44 +00:00
Anton Korobeynikov
a2780e11ef
Move ReturnAddrIndex variable to X86MachineFunctionInfo structure. This fixed
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hard to catch bugs with retaddr lowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41104 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-15 17:12:32 +00:00
Chris Lattner
d42b8be3da
add a note.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41103 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-15 16:58:38 +00:00
Evan Cheng
12914380ed
Fix a typo pointd out by Maarten ter Huurne.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41059 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-13 23:27:11 +00:00
Dan Gohman
badb2d23d1
When x86 addresses matching exceeds its recursion limit, check to
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see if the base register is already occupied before assuming it can be
used. This fixes bogus code generation in the accompanying testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41049 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-13 20:03:06 +00:00
Chris Lattner
a45d9a15ba
Fix PR1607
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41048 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-13 18:42:37 +00:00
Chris Lattner
ace2e8ad0c
expand a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41021 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-11 18:19:07 +00:00
Chris Lattner
384f4a94f8
With evan's explicit flag representation, hopefully we will finally be
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able to 3-addressify away stuff like this:
movl %ecx, %eax
decl %eax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41020 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-11 18:16:46 +00:00
Bill Wendling
01284b4d55
64-bit SSSE3 ops that use MMX registers don't require 16-byte alignment.
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Make a 'memop' pattern just for them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41017 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-11 09:52:53 +00:00
Christopher Lamb
a1eb155e52
Use subregs to improve any_extend code generation when feasible.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41013 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-10 22:22:41 +00:00
Christopher Lamb
c59e52108b
Increase efficiency of sign_extend_inreg by using subregisters for truncation. As the README suggests sign_extend_subreg is selected to (sext(trunc)).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41010 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-10 21:48:46 +00:00
Christopher Lamb
6f41435879
Edit README in light of previous LEA16 commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41009 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-10 21:29:05 +00:00
Christopher Lamb
b81337117c
Add 2-addr to 3-addr promotion code that allows 32-bit LEA to be used via subregisters when 16-bit LEA is disabled.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41007 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-10 21:18:25 +00:00
Rafael Espindola
594d37e21a
propagate struct size and alignment of byval arguments to the DAG
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40986 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-10 14:44:42 +00:00
Bill Wendling
ae9671b838
For kicks, I though it would be fun to use the correct opcode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40985 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-10 09:00:17 +00:00
Bill Wendling
76d708b76f
Adding SSSE3 intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40982 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-10 06:22:27 +00:00
Evan Cheng
a3231ba237
Temporarily backing out this change until we know why some dejagnu tests are failing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40973 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-09 22:25:35 +00:00
Evan Cheng
f7ef26e701
divb / mulb outputs to ah. Under x86-64 it's not legal to read ah if the instruction requires a rex prefix (i.e. outputs to r8b, etc.). So issue shift right by 8 on AX and then truncate it to 8 bits instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40972 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-09 21:59:35 +00:00
Evan Cheng
a333b41af9
GR16_ sub-register class should be GR8_, not GR8. That is, it should only be 8-bit registers in 32-bit mode. Ditto for GR32_.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40970 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-09 18:05:17 +00:00
Dale Johannesen
5411a3937f
long double 9 of N. This finishes up the X86-32 bits
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(constants are still not handled). Adds ConvertActions
to control fp-to-fp conversions (these are currently
defaulted for all other targets, so no changes there).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40958 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-09 01:04:01 +00:00
Dale Johannesen
48bd15ed72
Fix arguments for some Altivec instructions. From SWB.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40957 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-09 00:49:19 +00:00
Dale Johannesen
84109cd015
Fix spelling of mtvscr and mfvscr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40908 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-07 23:08:00 +00:00
Dale Johannesen
cdbe4d3ebe
Long double patch 8 of N: make it partially work in
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SSE mode (all but conversions <-> other FP types, I think):
>>Do not mark all-80-bit operations as "Requires[FPStack]"
(which really means "not SSE").
>>Refactor load-and-extend to facilitate this.
>>Update comments.
>>Handle long double in SSE when computing FP_REG_KILL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40906 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-07 20:29:26 +00:00
Evan Cheng
0ff94f7fcc
Initial JIT support for ARM by Raul Fernandes Herbster.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40887 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-07 01:37:15 +00:00
Dale Johannesen
a996d52e37
Long double patch 7 of N, unless I lost count:).
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Last x87 bits for full functionality (not
thoroughly tested, and long doubles do not work
in SSE modes at all - use -mcpu=i486 for now)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40886 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-07 01:17:37 +00:00
Dale Johannesen
9989a65693
Replace 4-line function with 10-line version per review comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40881 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-06 22:10:35 +00:00
Dale Johannesen
27f92be8b7
Move lengthy conditional down 1 level per review comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40878 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-06 21:48:35 +00:00
Dale Johannesen
6a30811d5c
Get X86 long double calling convention to work
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(on Darwin, anyway). Fix some table omissions for
LD arithmetic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40877 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-06 21:31:06 +00:00
Dale Johannesen
88835735f4
Make 80-bit store maintain simulated FP stack correctly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40868 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-06 19:50:32 +00:00
Reid Spencer
181b6c9cb5
Fix minor doxygen nits.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40854 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-05 20:06:04 +00:00
Dale Johannesen
59a587337e
Long double patch 4 of N: initial x87 implementation.
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Lots of problems yet but some simple things work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40847 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-05 18:49:15 +00:00
Chandler Carruth
6994040a95
This is the patch to provide clean intrinsic function overloading support in LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future.
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This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40807 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-04 01:51:18 +00:00
Dale Johannesen
8c78a26955
Make x86 long double alignment 32 for everything but
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Darwin (which makes size within a struct==96)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40796 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-03 22:46:15 +00:00
Dale Johannesen
8c1e6a119a
long double patch 2 of N. Handle it in TargetData.
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(I've tried to get the info right for all targets,
but I'm not expert on all of them - check yours.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40792 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-03 20:20:50 +00:00
Chris Lattner
107f54a002
add an observation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40772 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-03 00:17:42 +00:00
Dan Gohman
61e729e2e9
More explicit keywords.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40757 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-02 21:21:54 +00:00
Dan Gohman
7f55fcbc6b
Fix the alignment requirements of several unpck and shuf instructions.
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Generalize isPSHUFDMask and add a unary SHUFPD pattern so that SHUFPD's
memory operand alignment can be tested as well, with a fix to avoid
breaking MMX's use of isPSHUFDMask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40756 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-02 21:17:01 +00:00
Dan Gohman
f3372d1d64
Fix pastos in vector arithmetic intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40754 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-02 21:06:40 +00:00
Dan Gohman
73a902b228
Mark the SSE and MMX load instructions that
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X86InstrInfo::isReallyTriviallyReMaterializable knows how to handle
with the isReMaterializable flag so that it is given a chance to handle
them. Without hoisting constant-pool loads from loops this isn't very
visible, though it does keep CodeGen/X86/constant-pool-remat-0.ll from
making a copy of the constant pool on the stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40736 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-02 14:27:55 +00:00