6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-10-09 18:55:33 +00:00
Code Issues Projects Releases Wiki Activity
80,669 Commits 39 Branches 0 Tags 277 MiB
1f59523521
Commit Graph

21402 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
a1aa8db517 Calls don't really change the stack pointer. 
Even if a call instruction has %SP<imp-def> operands, it doesn't change
the value of the stack pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151104 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-21 23:47:43 +00:00
Evan Cheng
07043279f6 Proper support for a bastardized darwin-eabi hybird ABI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151083 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-21 20:46:00 +00:00
Andrew Trick
19273aec44 Clear virtual registers after they are no longer referenced. 
Passes after RegAlloc should be able to rely on MRI->getNumVirtRegs() == 0.
This makes sharing code for pre/postRA passes more robust.
Now, to check if a pass is running before the RA pipeline begins, use MRI->isSSA().
To check if a pass is running after the RA pipeline ends, use !MRI->getNumVirtRegs().

PEI resets virtual regs when it's done scavenging.

PTX will either have to provide its own PEI pass or assign physregs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151032 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-21 04:51:23 +00:00
James Molloy
873fd5f753 Improve generated code for extending loads and some trunc stores on ARM. 
Teach TargetSelectionDAG about lengthening loads for vector types and set v4i8 as legal. Allow FP_TO_UINT for v4i16 from v4i32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150956 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-20 09:24:05 +00:00
Ahmed Charles
b0934ab7d8 Remove dead code. Improve llvm_unreachable text. Simplify some control flow. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150918 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-19 11:37:01 +00:00
Craig Topper
1bf724b28b Remove some unneeded includes and fix ordering in X86ISelLowering.cpp. Remove unneeded 'using namespace'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150916 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-19 07:15:48 +00:00
Craig Topper
dd637ae0c3 Unify all shuffle mask checking functions take a mask and VT instead of VectorShuffleSDNode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150913 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-19 05:41:45 +00:00
Craig Topper
5aaffa8470 Make a bunch of X86ISelLowering shuffle functions static now that they are no longer needed by isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150908 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-19 02:53:47 +00:00
Jia Liu
9ad012a29c comment fix ARM.h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150904 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-19 02:04:03 +00:00
Jia Liu
44de83a7f6 some comment fix for X86 and ARM 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150902 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-19 02:03:36 +00:00
Craig Topper
28a713b20a Add vmfunc instruction to X86 assembler and disassembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150899 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-19 01:39:49 +00:00
Jia Liu
31d157ae1a Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-18 12:03:15 +00:00
Craig Topper
a771330366 Add X86InstrSVM.td that I forgot to add in r150873. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150874 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-18 08:34:12 +00:00
Craig Topper
9e3d0b3351 Add X86 assembler and disassembler support for AMD SVM instructions. Original patch by Kay Tiong Khoo. Few tweaks by me for code density and to reduce replication. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150873 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-18 08:19:49 +00:00
Jakob Stoklund Olesen
2420b558de Handle regmask operands in ARMInstrInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150833 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-17 19:23:15 +00:00
Jakob Stoklund Olesen
8c3b87cf19 Fix ARMBaseInstrInfo::getInstrLatency for calls. 
Calls always clobber CPSR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150831 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-17 19:07:59 +00:00
Jia Liu
c5707112e7 remove Emacs-tag form .cpp files in Mips Backend, and fix some typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150805 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-17 08:55:11 +00:00
Craig Topper
6e94e68b75 Remove the last of the old vector_shuffle patterns from X86 isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150795 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-17 07:02:34 +00:00
Akira Hatanaka
38bdc5762f Do not promote i32 arguments to i64. This was causing unnecessary sign extension 
instructions to be emitted.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150782 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-17 02:20:26 +00:00
Jia Liu
8f5e8c1cd6 add Emacs tag and fix some comment error in file headers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150775 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-17 01:23:50 +00:00
Chad Rosier
b8703fe265 [fast-isel] Add support for returning non-legal types with no sign- or zero- 
entend flag.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150774 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-17 01:21:28 +00:00
Lang Hames
c2e08db4e5 Re-enable 150652 and 150654 - Make FPSCR non-reserved, and make MachineCSE bail on reserved registers. This *should* be safe as of r150786. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150769 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-17 00:27:16 +00:00
Akira Hatanaka
178d870795 Remove comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150739 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-16 22:52:29 +00:00
Chad Rosier
a69feb0f33 Remove unnecessary assignment to temporary, ResultReg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150737 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-16 22:45:33 +00:00
Jakob Stoklund Olesen
8b0a3f2df9 Remove the YMM_HI_6_15 hack. 
Call clobbers are now represented with register mask operands.  The
regmask can easily represent the fact that xmm6 is call-preserved while
ymm6 isn't.  This is automatically computed by TableGen from the
CalleeSavedRegs containing xmm6.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150709 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-16 17:56:06 +00:00
Jakob Stoklund Olesen
527a08b253 Use the same CALL instructions for Windows as for everything else. 
The different calling conventions and call-preserved registers are
represented with regmask operands that are added dynamically.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150708 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-16 17:56:02 +00:00
Akira Hatanaka
e3186774f3 Remove trailing whitespace. Add newline. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150706 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-16 17:48:20 +00:00
Lang Hames
1834df8384 Oop - r150653 + r150654 broke one of my test cases. Backing out for now... 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150655 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-16 02:32:10 +00:00
Lang Hames
afae28b1c6 FPSCR shouldn't be reserved. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150654 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-16 02:28:14 +00:00
Jakob Stoklund Olesen
8bcde2aa66 Enable register mask operands for x86 calls. 
Call instructions no longer have a list of 43 call-clobbered registers.
Instead, they get a single register mask operand with a bit vector of
call-preserved registers.

This saves a lot of memory, 42 x 32 bytes = 1344 bytes per call
instruction, and it speeds up building call instructions because those
43 imp-def operands no longer need to be added to use-def lists. (And
removed and shifted and re-added for every explicit call operand).

Passes like LiveVariables, LiveIntervals, RAGreedy, PEI, and
BranchFolding are significantly faster because they can deal with call
clobbers in bulk.

Overall, clang -O2 is between 0% and 8% faster, uniformly distributed
depending on call density in the compiled code.  Debug builds using
clang -O0 are 0% - 3% faster.

I have verified that this patch doesn't change the assembly generated
for the LLVM nightly test suite when building with -disable-copyprop
and -disable-branch-fold.

Branch folding behaves slightly differently in a few cases because call
instructions have different hash values now.

Copy propagation flushes its data structures when it crosses a register
mask operand. This causes it to leave a few dead copies behind, on the
order of 20 instruction across the entire nightly test suite, including
SPEC. Fixing this properly would require the pass to use different data
structures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150638 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-16 00:02:50 +00:00
Sirish Pande
ab7955b9ce Optimize redundant sign extends and negation of predicates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150606 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-15 18:52:27 +00:00
Eric Christopher
2a4bc1e703 Revert "Replacing HexagonOptimizeSZExtends with HexagonPeephole." 
This reverts commit 1656806a944bbd23e98c6e578810fe02495ab741.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150605 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-15 18:34:25 +00:00
Eric Christopher
eddd6abdde Revert "Optimize redundant sign extends and negation of predicates" 
as it's breaking the build.

This reverts commit 11241abca5.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150604 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-15 18:32:25 +00:00
Sirish Pande
a997b3e51a Replacing HexagonOptimizeSZExtends with HexagonPeephole. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150603 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-15 18:31:35 +00:00
Sirish Pande
11241abca5 Optimize redundant sign extends and negation of predicates 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150601 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-15 18:22:18 +00:00
Chad Rosier
40d552e0be Add braces to if clause to make symmetric with associate else clause. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150591 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-15 17:36:21 +00:00
Bill Wendling
4a1ff2fb3e Strip the pointer casts from the constants here. 
The c'tor list is stored as a list of 'void ()*'s, so all of the functions are
bitcast to that. However, the dyn_cast doesn't automagically look through
bitcasts. Do that for it.
<rdar://problem/10813350>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150572 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-15 09:14:08 +00:00
Andrew Trick
5e108eeeef Added TargetPassConfig::disablePass/substitutePass as a general mechanism to override specific passes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150562 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-15 03:21:47 +00:00
Chad Rosier
15b4497333 Use a temporary variable, rather then a series of redundant calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150538 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-15 00:36:26 +00:00
Pete Cooper
9989a63818 Stop custom lowering forr x86 DEC64m from happening if the load in the lowered sequence has more than 1 user 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150537 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-15 00:33:37 +00:00
Chad Rosier
92fd017364 Use a temporary variable, rather then a series of redundant calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150536 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-15 00:23:55 +00:00
Chad Rosier
5793a6586d Remove unnecessary assignment to temporary, ResultReg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150520 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-14 22:29:48 +00:00
Craig Topper
233a64846e Move old movl vector_shuffle patterns. Not needed anymore since vector_shuffles shouldn't reach isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150462 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-14 08:14:53 +00:00
Lang Hames
1a4cb1caf0 Third time's the charm...? 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150447 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-14 00:34:30 +00:00
Lang Hames
6b0e9d97fa Unswap swap operands, partially reducing confusion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150444 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-14 00:17:12 +00:00
Bill Wendling
bdf9db6f49 Don't reserve the R0 and R1 registers here. We don't use these registers, and 
marking them as "live-in" into a BB ruins some invariants that the back-end
tries to maintain.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150437 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-13 23:47:16 +00:00
Lang Hames
2cc494b963 Make operands for VSWP read-modify-write. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150433 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-13 23:37:19 +00:00
Craig Topper
7505626acd Still more vector_shuffle pattern removal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150365 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-13 07:23:41 +00:00
Ahmed Charles
b83a67e1e3 Fix various issues (or do cleanups) found by enabling certain MSVC warnings. 
- Use unsigned literals when the desired result is unsigned. This mostly allows unsigned/signed mismatch warnings to be less noisy even if they aren't on by default.
- Remove misplaced llvm_unreachable.
- Add static to a declaration of a function on MSVC x86 only.
- Change some instances of calling a static function through a variable to simply calling that function while removing the unused variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150364 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-13 06:30:56 +00:00
Craig Topper
4eaca023dc Remove more vector_shuffle patterns for unpack. These should be target specific nodes when they get to isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150363 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-13 05:48:49 +00:00
Craig Topper
3b17bf9a7c Recommit r150328. Previous test failures should be fixed by r150360. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150362 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-13 05:10:10 +00:00
Craig Topper
2dcd718c13 Update CanXFormVExtractWithShuffleIntoLoad to ensure bitcasts of loads only have one use. Matches DAGCombiner and prevents vector_shuffles from reaching isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150360 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-13 04:30:38 +00:00
NAKAMURA Takumi
7f42e9886e Revert r150328, "Remove more vector_shuffle patterns." 
It caused 3 failures on pre-penryn and non-x86(generic) hosts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150357 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-13 00:10:15 +00:00
Pete Cooper
ce3900849a Fixed bug when custom lowering DEC64m on x86. 
If the DEC node had more than one user, it was doing this lowering but
leaving the original DEC node around and so decrementing twice.

Fixes PR11964.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150356 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-13 00:10:03 +00:00
Craig Topper
cc9231a05d Remove more vector_shuffle patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150328 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-12 08:14:35 +00:00
Nick Lewycky
6a7df9aae6 Remove redundant getAnalysis<> calls in GlobalOpt. Add a few Itanium ABI calls 
to TargetLibraryInfo and use one of them in GlobalOpt.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150323 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-12 02:15:20 +00:00
Craig Topper
26f927951b Remove more vector_shuffle patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150321 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-12 01:07:34 +00:00
Craig Topper
1f2fa99b2a Remove more vector_shuffle patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150314 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-11 23:31:01 +00:00
Anton Korobeynikov
d4a19b6a72 Add support for implicit TLS model used with MS VC runtime. 
Patch by Kai Nacke!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150307 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-11 17:26:53 +00:00
Benjamin Kramer
6b30274e27 Don't mix declarations and code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150305 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-11 16:01:02 +00:00
Benjamin Kramer
88b6fc06db Make the EDis tables const. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150304 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-11 14:51:07 +00:00
Benjamin Kramer
953362cdfb Reuse the enum names from X86Desc in the X86Disassembler. 
This requires some gymnastics to make it available for C code. Remove the names
from the disassembler tables, making them relocation free.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150303 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-11 14:50:54 +00:00
Craig Topper
a819c397e7 Remove some patterns for matching vector_shuffle instructions since vector_shuffles should be custom lowered before isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150299 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-11 07:43:35 +00:00
Craig Topper
39a9e485f2 Fix shuffle lowering code to stop creating temporary DAG nodes to do shuffle mask checks on. This seemed to be confusing things such that vector_shuffle ops to got through to iselection. This is another step towards removing the vector_shuffle handling patterns from isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150296 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-11 06:24:48 +00:00
Jim Grosbach
f06dfa7860 Revert r150222, as the clang driver now handles this properly. 
Now that the clang driver passes the CPU and feature information to
the backend when processing assembly files (150273), this isn't necessary.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150274 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-10 20:38:46 +00:00
Jason W Kim
1de886c1fa Make valgrind happy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150251 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-10 16:07:59 +00:00
Andrew Trick
4a5f3cd6ca unnecessary include 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150228 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-10 04:10:44 +00:00
Andrew Trick
1e9bcb3b1f PTX no longer needs to provide its own backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150227 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-10 04:10:40 +00:00
Andrew Trick
8dd26253f5 RegAlloc superpass: includes phi elimination, coalescing, and scheduling. 
Creates a configurable regalloc pipeline.

Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa.

When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>.

CodeGen transformation passes are never "required" as an analysis

ProcessImplicitDefs does not require LiveVariables.

We have a plan to massively simplify some of the early passes within the regalloc superpass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150226 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-10 04:10:36 +00:00
Jim Grosbach
e009860049 ARM on darwin, v6 implies the presence of VFP for the assembler. 
rdar://10838899

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150222 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-10 02:21:49 +00:00
Sirish Pande
b9f69a41fc Test for commit access. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150178 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-09 15:20:33 +00:00
James Molloy
3015dfb7d7 Teach the MC and disassembler about SoftFail, and hook it up to UNPREDICTABLE on ARM. Wire this to tBLX in order to provide test coverage. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150169 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-09 10:56:31 +00:00
Craig Topper
f41ab77847 More tweaks to get the size of the X86 disassembler tables down. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150167 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-09 08:58:07 +00:00
Craig Topper
ce8f4c58d8 Flatten some of the arrays in the X86 disassembler tables to reduce space needed to store pointers on 64-bit hosts and reduce relocations needed at startup. Part of PR11953. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150161 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-09 07:45:30 +00:00
Jakob Stoklund Olesen
450b3850ce Handle register masks when searching for EFLAGS clobbers. 
Calls clobber the flags, but when using register masks there is no
EFLAGS<imp-def> operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150117 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-09 00:17:22 +00:00
Andrew Trick
1dd8c8560d Codegen pass definition cleanup. No functionality. 
Moving toward a uniform style of pass definition to allow easier target configuration.
Globally declare Pass ID.
Globally declare pass initializer.
Use INITIALIZE_PASS consistently.
Add a call to the initializer from CodeGen.cpp.
Remove redundant "createPass" functions and "getPassName" methods.

While cleaning up declarations, cleaned up comments (sorry for large diff).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150100 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-08 21:23:13 +00:00
Andrew Trick
32986572bf Move pass configuration out of pass constructors: StackSlotColoring. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150097 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-08 21:22:57 +00:00
Andrew Trick
c7d081b594 Move pass configuration out of pass constructors: PostRAScheduler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150096 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-08 21:22:53 +00:00
Andrew Trick
61f1e3db43 Move pass configuration out of pass constructors: BranchFolderPass 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150095 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-08 21:22:48 +00:00
Andrew Trick
ffea03f216 Added TargetPassConfig::setOpt 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150093 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-08 21:22:39 +00:00
Andrew Trick
d2a7bedbc9 Move pass configuration out of pass constructors: TailDuplicate::PreRegAlloc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150091 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-08 21:22:30 +00:00
Brendon Cahoon
c635ebdb1a Use TSFlag bit to describe instruction properties. 
Creating the isPredicated TSFlag enables the code
to use the property defined in the instruction format
instead of using a large switch statement.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150078 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-08 18:25:47 +00:00
Elena Demikhovsky
f602040c49 Fixed a bug in printing "cmp" pseudo ops. 
> This IR code
> %res = call <8 x float> @llvm.x86.avx.cmp.ps.256(<8 x float> %a0, <8 x float> %a1, i8 14)
> fails with assertion:
>
> llc: X86ATTInstPrinter.cpp:62: void llvm::X86ATTInstPrinter::printSSECC(const llvm::MCInst*, unsigned int, llvm::raw_ostream&): Assertion `0 && "Invalid ssecc argument!"' failed.
> 0  llc             0x0000000001355803
> 1  llc             0x0000000001355dc9
> 2  libpthread.so.0 0x00007f79a30575d0
> 3  libc.so.6       0x00007f79a23a1945 gsignal + 53
> 4  libc.so.6       0x00007f79a23a2f21 abort + 385
> 5  libc.so.6       0x00007f79a239a810 __assert_fail + 240
> 6  llc             0x00000000011858d5 llvm::X86ATTInstPrinter::printSSECC(llvm::MCInst const*, unsigned int, llvm::raw_ostream&) + 119

I added the full testing for all possible pseudo-ops of cmp.
I extended X86AsmPrinter.cpp and X86IntelInstPrinter.cpp.

You'l also see lines alignments (unrelated to this fix) in X86IselLowering.cpp from my previous check-in.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150068 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-08 08:37:26 +00:00
Craig Topper
bc0e4bf754 Remove a couple unneeded intrinsic patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150067 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-08 08:29:30 +00:00
Craig Topper
5a313bb7e8 Remove GCC builtins for vpermilp* intrinsics as clang no longer needs them. Custom lower the intrinsics to the vpermilp target specific node and remove intrinsic patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150060 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-08 06:36:57 +00:00
Chad Rosier
743e19983e [fast-isel] Add support for SUBs with non-legal types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150047 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-08 02:45:44 +00:00
Chad Rosier
6fde875621 [fast-isel] Add support for ORs with non-legal types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150045 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-08 02:29:21 +00:00
Chad Rosier
60c8fa6bb9 [fast-isel] Add support for indirect branches. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150014 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-07 23:56:08 +00:00
Evan Cheng
de1df103b9 Use LEA to adjust stack ptr for Atom. Patch by Andy Zhang. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150008 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-07 22:50:41 +00:00
Evan Cheng
4ee1c5cf6c Do not fold ADD / SUB into load / store (to form pre-indexed, post-indexed 
load / store) if the ADD / SUB has a live definition of CPSR.

Bug reported by David Meyer. Alas, no test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149970 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-07 07:09:28 +00:00
Craig Topper
dbd98a4b1b Add instruction selection for 256-bit VPSHUFD and 128-bit VPERMILPS/VPERMILPD. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149968 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-07 06:28:42 +00:00
Craig Topper
bc2198133a Convert assert(0) to llvm_unreachable 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149961 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-07 02:50:20 +00:00
Chad Rosier
3901c3e750 [fast-isel] Add support for ADDs with non-legal types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149934 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-06 23:50:07 +00:00
Andrew Trick
6939fde29c Add TargetPassConfig to the PassManager for use inside passes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149926 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-06 22:51:15 +00:00
Derek Schuff
2ea93875b2 Enable streaming of bitcode 
This CL delays reading of function bodies from initial parse until
materialization, allowing overlap of compilation with bitcode download.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149918 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-06 22:30:29 +00:00
Chris Lattner
7302d80490 Remove some dead code and tidy things up now that vectors use ConstantDataVector 
instead of always using ConstantVector.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149912 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-06 21:56:39 +00:00
Bill Wendling
aa5abe88d6 [unwind removal] We no longer have 'unwind' instructions being generated, so 
remove the code that handles them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149901 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-06 21:16:41 +00:00
Benjamin Kramer
699ddcbcb3 X86: Don't call malloc for 4 bits. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149866 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-06 12:06:18 +00:00
Benjamin Kramer
f3fd7ee415 Hexagon: Remove forbidden iostream includes (it introduces static initializers) 
Reorder includes while at it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149863 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-06 10:19:29 +00:00
Craig Topper
d156dc11f9 Add shuffle decoding support for 256-bit pshufd. Merge vpermilp* and pshufd decoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149859 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-06 07:17:51 +00:00