6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-27 13:29:50 +00:00
Code Issues Projects Releases Wiki Activity
74,426 Commits 39 Branches 0 Tags 277 MiB
29e85bc728
Commit Graph

48682 Commits

Author SHA1 Message Date
Bill Wendling
fb4eb165d6 Mark instructions which are part of the frame setup with the MachineInstr::FrameSetup flag. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135645 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 00:44:56 +00:00
Andrew Trick
37eb38d3f8 LSR crashes on an empty IVUsers list. 
rdar://9786536


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135644 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-21 00:40:04 +00:00
Evan Cheng
36c62d3cbe X86 is the only target that uses coff format. This should fixes test failures running on Windows, Cygwin, or MingW hosts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135639 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 23:53:54 +00:00
Evan Cheng
ee04a6d3a4 Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate ARM MC code from target. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135636 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 23:34:39 +00:00
Bill Wendling
7bc3178182 Remove unused function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135635 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 23:07:42 +00:00
Bill Wendling
16da7366d5 Remove the now defunct getCompactUnwindEncoding method from the frame lowering code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135634 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 23:04:09 +00:00
Devang Patel
3737b89098 Refactor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135633 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 23:00:27 +00:00
Devang Patel
40c7e4142e There are two ways to map a variable to its lexical scope. Lexical scope information is embedded in MDNode describing the variable. It is also available as a part of DebugLoc attached with DBG_VALUE instruction. DebugLoc attached with an instruction is less reliable in optimized code so use information embedded in the MDNode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135629 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 22:18:50 +00:00
Eli Friedman
747032522f Clean up includes of llvm/Analysis/ConstantFolding.h so it's included where it's used and not included where it isn't. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135628 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 21:57:23 +00:00
Devang Patel
4ec14b0dee While emitting constant value, look through derived type and use underlying basic type to determine size and signness of the constant value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135627 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 21:57:04 +00:00
Jim Grosbach
dde038af59 ARM PKH shift ammount operand printing tweaks. 
Move the shift operator and special value (32 encoded as 0 for PKHTB) handling
into the instruction printer. This cleans up a bit of the disassembler
special casing for these instructions, more easily handles not printing the
operand at all for "lsl #0" and prepares for correct asm parsing of these
operands.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135626 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 21:40:26 +00:00
Eli Friedman
73bfa4aecf Bring LICM into compliance with the new "Memory Model for Concurrent Operations" in LangRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135625 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 21:37:47 +00:00
Jim Grosbach
1769a3df4a Tidy up a bit. 
Move common definitions for ARM and Thumb2 into ARMInstrFormats.td and rename
them to be a bit more descriptive that they're for the PKH instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135617 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 20:49:03 +00:00
Jim Grosbach
a0472dc420 ARM: Tidy up representation of PKH instruction. 
The shift type is implied by the instruction (PKHBT vs. PKHTB) and so shouldn't
be also encoded as part of the shift value immediate. Otherwise we're able to
represent invalid instructions, plus it needlessly complicates the
representation. Preparatory work for asm parsing of these instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135616 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 20:32:09 +00:00
Benjamin Kramer
aeb7de764a Fix cmake again :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135613 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 20:00:06 +00:00
Evan Cheng
203576aa0c Goodbye TargetAsmInfo. This eliminate last bit of CodeGen and Target in llvm-mc. 
There is still a bit more refactoring left to do in Targets. But we are now very
close to fixing all the layering issues in MC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135611 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 19:50:42 +00:00
Eli Friedman
a4d0bd84f7 Extend the hack for _GLOBAL_OFFSET_TABLE_ slightly; PR10389. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135607 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 19:36:11 +00:00
Jim Grosbach
ab40f4b737 ARM assembly parsing of MUL instruction. 
Correctly handle 's' bit and predication suffices. Add parsing and encoding
tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135596 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 18:20:31 +00:00
Eli Friedman
0381c21d2d PR10421: Fix a straightforward bug in the widening logic for CONCAT_VECTORS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135595 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 18:14:33 +00:00
Benjamin Kramer
9d999f58e3 Initialize the EHFrameSection pointer to zero. 
This should fix the spurious buildbot errors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135594 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 18:13:23 +00:00
Jay Foad
626f52d43d Fix a GCC warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135581 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 08:15:21 +00:00
Evan Cheng
34ad6db8b9 - Move CodeModel from a TargetMachine global option to MCCodeGenInfo. 
- Introduce JITDefault code model. This tells targets to set different default
  code model for JIT. This eliminates the ugly hack in TargetMachine where
  code model is changed after construction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135580 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 07:51:56 +00:00
Evan Cheng
4c8164813c Include MCRegisterInfo to eliminate a compilation warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135575 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 06:54:19 +00:00
Francois Pichet
59458483a5 Fix the CMake build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135573 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 06:35:24 +00:00
Evan Cheng
e76a33b956 Add MCObjectFileInfo and sink the MCSections initialization code from 
TargetLoweringObjectFileImpl down to MCObjectFileInfo.

TargetAsmInfo is done to one last method. It's *almost* gone!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135569 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 05:58:47 +00:00
Andrew Trick
86c98145b2 indvars: Added getInsertPointForUses to find a valid place to truncate the IV. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135568 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 05:32:06 +00:00
Andrew Trick
13bcf2e68a indvars -disable-iv-rewrite: Add NarrowIVDefUse to cache def-use 
info. Holding Use* pointers is bad form even though it happened to
work in this case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135566 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 04:39:24 +00:00
NAKAMURA Takumi
e3345c4e4a X86Subtarget.h: Assume "x86_64-cygwin", though it has not been released yet, to appease test/CodeGen/X86 on cygwin. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135564 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 04:02:20 +00:00
Eric Christopher
cf1e967df2 Extra semi-colon. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135561 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 02:44:39 +00:00
Andrew Trick
f22d95749a indvars -disable-iv-rewrite fix: derived GEP IVs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135558 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 02:08:58 +00:00
Benjamin Kramer
e236dc6553 Don't leak CodeGenInfos. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135555 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 01:27:58 +00:00
Akira Hatanaka
de9416e261 Change name of class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135550 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 00:53:09 +00:00
Akira Hatanaka
32b7ebb163 Define classes for definitions of atomic instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135546 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-20 00:23:01 +00:00
Akira Hatanaka
db54826f20 Lower memory barriers to sync instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135537 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 23:30:50 +00:00
Evan Cheng
70955c2d12 Fix an obvious typo that's preventing x86 (32-bit) from using .literal16. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135535 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 23:14:32 +00:00
Eli Friedman
3610604086 PR10386: Don't try to split an edge from an indirectbr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135534 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 22:59:41 +00:00
Jim Grosbach
b29b4dd988 Tweak ARM assembly parsing and printing of MSR instruction. 
The system register spec should be case insensitive. The preferred form for
output with mask values of 4, 8, and 12 references APSR rather than CPSR.
Update and tidy up tests accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135532 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 22:45:10 +00:00
Devang Patel
c8fcfc9cd9 Distinguish between two copies of one inlined variable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135528 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 22:31:15 +00:00
Jim Grosbach
80d01dd3d1 ARM assembly parsing of MRS instruction. 
Teach the parser to recognize the APSR and SPSR system register names. Add
and update tests accordingly.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135527 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 21:59:29 +00:00
Owen Anderson
f1a0090073 Enhance the FixedLengthDecoder to be able to generate plausible-looking decoders for ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135524 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 21:06:00 +00:00
Akira Hatanaka
bdd83fe382 Change variable name. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135522 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 20:56:53 +00:00
Jim Grosbach
ccfd9313d1 ARM assembly parsing for MRC/MRC2/MRRC/MRRC2. 
Add range checking to the immediate operands. Update tests accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135521 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 20:35:35 +00:00
Akira Hatanaka
cc7ecc7290 Use the correct opcodes: SLLV/SRLV or AND must be used instead of SLL/SRL or 
ANDi, when the instruction does not have any immediate operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135520 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 20:34:00 +00:00
Akira Hatanaka
4061da1403 Use descriptive variable names. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135514 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 20:11:17 +00:00
Jim Grosbach
5f16057d1e ARM assembly parsing for MOV (register). 
Correct the handling of the 's' suffix when parsing ARM mode. It's only a
truly separate opcode in Thumb. Add test cases to make sure we handle
the s and condition suffices correctly, including diagnostics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135513 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 20:10:31 +00:00
Jim Grosbach
558b66d3cd Tidy up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135507 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 19:47:11 +00:00
Jim Grosbach
731f209794 Tighten conditional for 'mov' cc_out. 
Make sure we only clobber the cc_out operand if it is indeed a default
non-setting operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135506 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 19:45:44 +00:00
Devang Patel
23336b449e Reapply r135457. This needs llvm-gcc change, that I forgot to check-in yesterday. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135504 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 19:41:54 +00:00
Jim Grosbach
ffa3225e26 ARM assembly parsing for MOV (immediate). 
Add range checking for the immediate operand and handle the "mov" mnemonic
choosing between encodings based on the value of the immediate. Add tests
for fixups, encoding choice and values, and diagnostic for out of range values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135500 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 19:13:28 +00:00
Jim Grosbach
5a18700470 Remove unused code. 
cc_out and pred operands are added during parsing via custom C++ now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135497 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 18:32:48 +00:00
Akira Hatanaka
29af0918ce Fix comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135496 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 18:19:40 +00:00
Akira Hatanaka
70564a9c19 Remove redundant instructions. 
- In EmitAtomicBinaryPartword, mask incr in loopMBB only if atomic.swap is the
  instruction being expanded, instead of masking it in thisMBB. 
- Remove redundant Or in EmitAtomicCmpSwap. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135495 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 18:14:26 +00:00
Akira Hatanaka
81b441151f Separate code that modifies control flow from code that adds instruction to 
basic blocks.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135490 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 17:09:53 +00:00
Jim Grosbach
6bc1dbc376 ARM range checking for so_imm operands in assembly parsing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135489 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 16:50:30 +00:00
Bob Wilson
f51bb7cef8 Revert "Make a provision to encode inline location in a variable. This will enable dwarf writer to easily distinguish between two instances of a inlined variable in one basic block." 
This reverts commit 9fec5e346e.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135486 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 16:32:50 +00:00
Jay Foad
7fc52e2d95 Convert ConstantFoldGetElementPtr to use ArrayRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135483 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 15:30:30 +00:00
Jay Foad
b9b54ebfed Convert SimplifyGEPInst to use ArrayRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135482 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 15:07:52 +00:00
Jay Foad
ca12a2139e Convert gep_type_begin and gep_type_end to use ArrayRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135481 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 14:42:50 +00:00
Jay Foad
8fbbb39807 Convert TargetData::getIndexedOffset to use ArrayRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135478 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 14:01:37 +00:00
Jay Foad
1d2f569c34 Use ArrayRef in ConstantFoldInstOperands and ConstantFoldCall. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135477 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 13:32:40 +00:00
Richard Osborne
c8007ab582 Add intrinsics for the zext / sext instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135476 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 13:28:50 +00:00
Richard Osborne
829bef1a46 Add intrinsics for the testct, testwct instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135475 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 13:00:40 +00:00
Richard Osborne
dee3dd9129 Add intrinsics for the peek and endin instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135474 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 12:50:25 +00:00
Evan Cheng
439661395f Introduce MCCodeGenInfo, which keeps information that can affect codegen 
(including compilation, assembly). Move relocation model Reloc::Model from
TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135468 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 06:37:02 +00:00
Akira Hatanaka
939ece1b5c Make EmitAtomic functions return the correct MachineBasicBlocks so that 
ExpandISelPseudos::runOnMachineFunction does not visit instructions that have
just been added.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135465 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 03:42:13 +00:00
Akira Hatanaka
a308c670b4 Do not insert instructions in reverse order. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135464 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 03:14:58 +00:00
Devang Patel
9fec5e346e Make a provision to encode inline location in a variable. This will enable dwarf writer to easily distinguish between two instances of a inlined variable in one basic block. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135457 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 01:03:32 +00:00
Devang Patel
497a397f3e Revert r135423. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135454 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 00:28:24 +00:00
Bill Wendling
6c2f7e2398 Micro-opt: Only emit compact unwind if there is a compact unwind encoding to emit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135452 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 00:09:25 +00:00
Bill Wendling
e52e3f2c02 Use the CompactUnwindEncoding from the Frame, if it's defined. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135451 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 00:06:12 +00:00
Bill Wendling
e060a5cd06 Add a frame with the compact unwind encoding if it exists. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135450 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 00:02:51 +00:00
Bill Wendling
d967578a8c Add a method to set compact unwind encoding information in a frame. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135449 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 00:01:42 +00:00
Bill Wendling
7d36534d22 Rename CompactEncoding to CompactUnwindEncoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135448 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 00:00:58 +00:00
Sean Callanan
c872143d6a Fixed a bug where the MC subtarget information 
wasn't being initialized by the enhanced disassembler,
leading to assertion failures. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135447 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 00:00:41 +00:00
Bill Wendling
a67dcea072 Move the compact encoding from the target-specific library to the code-gen 
library.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135443 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 23:38:40 +00:00
Owen Anderson
565a036697 Revamp our handling of tLDMIA[_UPD] and tSTMIA[_UPD] to avoid having multiple instructions with the same encoding. This resolves another conflict when bringing up the new-style disassembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135442 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 23:25:34 +00:00
Evan Cheng
c8c3acfea4 Eliminate TargetAsmInfo::getCompactUnwindEncoding. This get rid of the 
use of TargetFrameLowering in TargetAsmInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135439 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 22:32:12 +00:00
Evan Cheng
2d28617de2 Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for 
better location welcome).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135438 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 22:29:13 +00:00
Owen Anderson
91614aec48 Mark the Darwin assembler workout as isCodeGenOnly, so that it doesn't cause decoding conflicts in the new-style disassembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135434 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 22:14:02 +00:00
Jeffrey Yasskin
3ba292dbc2 Add APInt(numBits, ArrayRef<uint64_t> bigVal) constructor to prevent future ambiguity 
errors like the one corrected by r135261.  Migrate all LLVM callers of the old
constructor to the new one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135431 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 21:45:40 +00:00
Andrew Trick
41e0d4e788 Compiler warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135426 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 21:15:03 +00:00
Evan Cheng
0e6a052331 Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down 
to MCRegisterInfo. Also initialize the mapping at construction time.

This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step
towards fixing the layering violation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135424 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 20:57:22 +00:00
Devang Patel
1360bc8eb0 During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases. 
[take 2]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135423 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 20:55:23 +00:00
Andrew Trick
fc933c073e indvars: LinearFunctionTestReplace for non-canonical IVs. 
For -disable-iv-rewrite, perform LFTR without generating a new
"canonical" induction variable. Instead find the "best" existing
induction variable for use in the loop exit test and compute the final
value of that IV for use in the new loop exit test. In short,
convert to a simple eq/ne exit test as long as it's cheap to do so.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135420 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 20:32:31 +00:00
Akira Hatanaka
a921164f39 Do not treat atomic.load.sub differently than other atomic binary intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135418 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 19:58:59 +00:00
Akira Hatanaka
0d7d0b5cb7 Set mayLoad or mayStore flags for SC and LL in order to prevent LICM from 
moving them out of the loop. Previously, stores and loads to a stack frame
object were inserted to accomplish this. Remove the code that was needed to do
this. Patch by Sasa Stankovic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135415 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 18:52:12 +00:00
Owen Anderson
0af0dc8ac6 Re-apply r135319 with a fix for the constant island pass. 
Original Log: Get rid of the separate opcodes for the Darwin versions of tBL, tBLXi, and tBLXr, using pseudo-instructions to lower to the single final opcode.  Update the ARM disassembler for this change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135414 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 18:50:52 +00:00
Jakob Stoklund Olesen
fc47933db5 Fix a crash when building 177.mesa for armv6. 
When splitting a live range immediately before an LDR_POST instruction
that redefines the address register, make sure to use the correct value
number in leaveIntvBefore.

We need the value number entering the instruction.

<rdar://problem/9793765>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135413 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 18:47:13 +00:00
Andrew Trick
f6a0dbaaf4 indvars: Added verification that LFTR and other indvars goodness does 
not interfere with BackedgeTakenCount computation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135412 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 18:44:20 +00:00
Andrew Trick
5241b79ebc indvars: Added isHighCostExpansion. Avoid generating extra ops in the 
preheader for the sole purpose of LFTR, since LFTR itself is usually not
a clear optimization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135409 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 18:21:35 +00:00
Bruno Cardoso Lopes
3f6a8dd4ce Be more smart with VCVTSS2SD. Also place the patterns close to the 
definitions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135407 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 18:11:25 +00:00
Bruno Cardoso Lopes
3aaa010ece Add AVX 128-bit sqrt versions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135404 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 17:51:40 +00:00
Akira Hatanaka
45473c1b15 Change destination register operands of SC instructions so that unique 
virtual registers are used. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135403 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 17:44:27 +00:00
Frits van Bommel
39b5abf507 Migrate LLVM and Clang to use the new makeArrayRef(...) functions where previously explicit non-default constructors were used. 
Mostly mechanical with some manual reformatting.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135390 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 12:00:32 +00:00
Jakob Stoklund Olesen
7941350101 Fix PR10387. 
When trying to rematerialize a value before an instruction that has an
early-clobber redefine of the virtual register, make sure to look up the
correct value number.

Early-clobber defs are moved one slot back, so getBaseIndex is needed to
find the used value number.

Bugpoint was unable to reduce the test case for this, see PR10388.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135378 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 05:31:59 +00:00
Chris Lattner
db125cfaf5 land David Blaikie's patch to de-constify Type, with a few tweaks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135375 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 04:54:35 +00:00
Chris Lattner
840635741f fix a warning in TinyPtrVector, adopt it in SSAUpdater, saving some 
mallocs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135366 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 01:43:58 +00:00
Benjamin Kramer
8d4dd79526 Simplify & microoptimize code. No intended functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135364 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-18 00:00:20 +00:00
Nadav Rotem
811ad8690b Minor code cleanups 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135362 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-17 19:05:00 +00:00
Chris Lattner
3e19473af3 tidy up 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135360 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-17 06:01:30 +00:00
Benjamin Kramer
93a896e2e3 Silence compiler warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135358 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-16 22:26:27 +00:00
Jakub Staszak
975eb99cf3 Remove unused LoopRanges from RegAllocGreedy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135354 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-16 20:43:00 +00:00
Jakub Staszak
12af93ae86 Remove "LoopInfo.h" include from BranchProbabilityInfo.h. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135353 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-16 20:31:15 +00:00
Jakub Staszak
59a9dab4d8 Add MachineBlockFrequency analysis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135352 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-16 20:23:20 +00:00
Owen Anderson
91ddfc4723 Revert r135319 in an attempt to get to unbreak testers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135343 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-16 09:17:43 +00:00
Matt Beaumont-Gay
f9d7fb6b3c Silence unused variable warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135339 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-16 04:18:47 +00:00
Andrew Trick
5614769d55 indvars: fix a pass-sensitivity issue that would hit the SCEVExpander 
assertion I added in r135333. Check for the existence of a preheader
before expanding a recurrence.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135335 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-16 01:18:53 +00:00
Andrew Trick
6f684b0bec indvars: remove ExprToIVMap because it won't be needed by LFTR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135334 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-16 01:06:48 +00:00
Andrew Trick
d152d03a47 Fix SCEVEXpander to handle arbitrary phi expansion. Includes two 
related bug fixes and corresponding assertions for uninitialized data
and missing NULL check. Test cases will be included with the new LFTR.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135333 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-16 00:59:39 +00:00
Bruno Cardoso Lopes
4201ecae92 Add AVX 128-bit patterns for sint_to_fp 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135332 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-16 00:50:20 +00:00
Jakob Stoklund Olesen
af4e40c2f4 He said *before* the last split point. 
This should unbreak the build-self-4-mingw32 tester. I have a very
complicated test case that I will try to clean up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135329 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-16 00:13:30 +00:00
Chris Lattner
7305c55a80 fix rdar://9776316 - type remapping needed for inline asm blobs, 
fixing some objc llvm-test crashes with LTO.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135324 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 23:18:40 +00:00
Chris Lattner
c1d414ad71 deconstify getType()'s. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135323 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 23:15:45 +00:00
Dan Gohman
e63e5ab50a LegalizeDAG doesn't need its own copy of this enum. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135320 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 22:51:43 +00:00
Owen Anderson
49e163b6c7 Get rid of the separate opcodes for the Darwin versions of tBL, tBLXi, and tBLXr, using pseudo-instructions to lower to the single final opcode. Update the ARM disassembler for this change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135319 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 22:49:31 +00:00
Dan Gohman
75b10047fc Delete LegalizeDAG's own version of isTypeLegal and getTypeAction 
and just use the ones from TargetLowering directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135318 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 22:39:09 +00:00
Bruno Cardoso Lopes
5bc37dd131 Fix a couple of things: 
1) Make non-legal 256-bit loads to be promoted to v4i64. This lets us
canonize the loads and handle things the same way we use to handle
for 128-bit registers. Despite of what one of the removed comments
explained, the load promotion would not mess with VPERM, it's only a
matter of doing the appropriate bitcasts when this instructions comes
to be introduced. Also make LOAD v8i32 legal.

2) Doing 1) exposed two bugs:
- v4i64 was being promoted to itself for several opcodes (introduced
in r124447 by David Greene) causing endless recursion and the stack to
explode.
- there was no support for allOnes BUILD_VECTORs and ANDNP would fail to
match because it was generating early target constant pools during
lowering.

3) The testcases are already checked-in, doing 1) exposed the
bugs in the current testcases.

4) Tidy up code to be more clear and explicit about AVX.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135313 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 22:24:33 +00:00
Bruno Cardoso Lopes
983d19dd10 Add a few patterns for 256-bit bitcasts. No testcases now, they are 
comming together with other tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135312 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 22:24:17 +00:00
Dan Gohman
ea0270298d Delete an unused variable and a redundant assert. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135311 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 22:19:02 +00:00
Jakob Stoklund Olesen
b4ddedce59 Extract parts of RAGreedy::splitAroundRegion as SplitKit methods. 
This gets rid of some of the gory splitting details in RAGreedy and
makes them available to future SplitKit clients.

Slightly generalize the functionality to support multi-way splitting.
Specifically, SplitEditor::splitLiveThroughBlock() supports switching
between different register intervals in a block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135307 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 21:47:57 +00:00
Dan Gohman
6a109f9d70 Modernize comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135305 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 21:42:20 +00:00
Eli Friedman
5232cc675c PR10370: Make sure we know how to relax push correctly on x86-64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135303 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 21:28:39 +00:00
Devang Patel
133b09953c Use DebugLoc directly to map inlined functions' instructions to respective lexical scope. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135302 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 21:25:44 +00:00
Jakub Staszak
d7932ca962 Fix pointer heuristic. Check whether predicator is ICMP_NE instead of if it is 
not isEquality().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135296 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 20:51:06 +00:00
Owen Anderson
43967a97cf Remove VMOVDneon and VMOVQ, which are just aliases for VORR. This continues to simplify the path towards an auto-generated disassembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135290 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 18:46:47 +00:00
Benjamin Kramer
07ea23aa2d ObjectFile: Add a method to check whether a section contains a symbol. 
- No ELF or COFF implementation yet, I don't have a way to test that.
  Should be straightforward to add though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135288 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 18:39:21 +00:00
Chad Rosier
71400b6afa Disable loop idiom recognition of memset/memcpy if the function being compiled 
is named after a common idiom (i.e., memset/memcpy).  Otherwise, we can run into 
infinite recursion.  Ideally, the user should use the correct -fno-builtin flag,
but in case they don't we should play nicely.
rdar://9763412

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135286 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 18:25:04 +00:00
Owen Anderson
167eb1f903 Remove unnecessary duplicate instruction definitions that simply overloaded the type of VEXT. This can be achieved with a Pat definition, and is much more disassembler friendly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135283 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 17:48:05 +00:00
Benjamin Kramer
32fb2af679 MachOObjectFile: Get symbol functions ready for 64 bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135282 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 17:32:45 +00:00
Frits van Bommel
037a60f909 No need to explicitly invoke the ArrayRef constructor here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135281 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 17:13:23 +00:00
Devang Patel
1e479fb5c1 Eliminate redundant map. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135278 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 16:38:42 +00:00
NAKAMURA Takumi
20722b6cda Eliminate "const" from extern const to fix breakeage since r135184 on msvc. 
MSVC decorates (and distinguishes) "const" in mangler. It brought linkage error between "extern const" declarations and definitions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135269 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 12:50:21 +00:00
Frits van Bommel
331dbca73d In Twine::str(), if the Twine stores only a std::string, just return a direct copy of that instead of first copying to a SmallString and converting that to a std::string. Also fix some indentation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135267 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 11:05:37 +00:00
Jay Foad
a3efbb15dd Convert CallInst and InvokeInst APIs to use ArrayRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135265 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 08:37:34 +00:00
Chandler Carruth
e083805724 Explicitly cast the second argument to unsigned in order to select the 
desired overload.

This is a bit of a hackish workaround to fix the compile after r135259.
Let me know if there is a better approach.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135261 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 07:31:10 +00:00
Jeffrey Yasskin
3d42bfbbdd Add an APFloat::convertToInt(APSInt) function that automatically manages the 
memory for the result.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135259 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 07:04:56 +00:00
Evan Cheng
a83bba46b3 Reverting r135232. It's causing infinite looping in DbgScope::openInsnRange. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135254 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 06:26:35 +00:00
Chris Lattner
678f9e05c9 remove the old and dangerous uncheckedReplaceAllUsesWith method, 
which was just replaceAllUsesWith without some assertions.  It was
needed back when type refinement was alive.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135253 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 06:18:52 +00:00
Chris Lattner
032c6eb1c4 devirtualize Constant::isNullValue: 
4 files changed, 15 insertions(+), 60 deletions(-)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135252 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 06:14:08 +00:00
Chris Lattner
c73b24db5f start using the new helper methods a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135251 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 06:08:15 +00:00
Chris Lattner
b447387726 add CFP::isNegative() and ConstnatInt::isNegative() methods. 
Devirtualize the isNegativeZeroValue method.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135249 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 05:58:04 +00:00
Chris Lattner
ba3ddf391f bump pointer allocate LLVM IR types, since they are never deallocated. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135248 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 05:49:15 +00:00
Chris Lattner
ef58218b8d remove the InvalidateStructLayoutInfo API, which is dead and unnecessary now 
that type refinement is toast.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135245 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 05:21:59 +00:00
Chandler Carruth
ed0e021643 Remove an unnecessary header from this file. I don't think this header 
was really intended, and it may have been required prior to some of the
recent refactors. Including it however causes LLVMX86Desc to need
symbols from LLVMX86CodeGen, forming a dependency cycle. This was masked
in almost all builds: Clang, and GCC w/ optimizations didn't actually
emit the symbols!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135242 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 04:16:38 +00:00
Evan Cheng
1be0e271a0 Move some parts of TargetAsmInfo down to MCAsmInfo. This is not the greatest 
solution but it is a small step towards removing the horror that is
TargetAsmInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135237 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 02:09:41 +00:00
Bill Wendling
833ce06c8f Remove setting the bit for personality function. It should be set by the linker. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135236 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 01:42:32 +00:00
Chandler Carruth
4afa2b842b Major update to CMake build to reflect changes in r135219 in the 
backend. Moved some MCAsmInfo files down into the MCTargetDesc
sublibraries, removed some (i suspect long) dead files from other parts
of the CMake build, etc. Also copied the include directory hack from the
Makefile.

Finally, updated the lib deps. I spot checked this, and think its
correct, but review appreciated there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135234 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 00:40:52 +00:00
Devang Patel
0bf164605d Do not get confused by multiple empty lexical scopes inlined at one location. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135232 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 00:30:39 +00:00
Benjamin Kramer
291e767dcf Output MachO section names in the form SEGMENT,section. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135231 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 00:29:02 +00:00
Benjamin Kramer
7d145789c0 Add support for 64 bit objects to MachOObjectFile. 
- I don't see a better way than duplicating all the code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135229 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 00:14:48 +00:00
Benjamin Kramer
82ba5b7c40 MachOObjectFile: Change isSectionText to return true for sections named text, not for load commands name __TEXT (which isn't the case in actual object files) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135228 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 00:14:46 +00:00
Bill Wendling
79a6a48851 Encode that we have a personality function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135227 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-15 00:07:31 +00:00
Evan Cheng
1abf2cb59b Rename createAsmInfo to createMCAsmInfo and move registration code to MCTargetDesc to prepare for next round of changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135219 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 23:50:31 +00:00
Bill Wendling
4bb5b03712 * If we have an LSDA, we need to mark it in the encoding. 
* The personality function should be encoded as an absolute pointer to the function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135215 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 23:34:45 +00:00
Devang Patel
9b4a172ac0 Refactor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135212 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 23:17:49 +00:00
Devang Patel
4f455d6f25 Eliminate redundant LLVMContext argument. 
Improve DbgScope->dump() output.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135207 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 22:30:56 +00:00
Devang Patel
af29322bb3 Undo r135191 (i.e. reapply Chris's patch. Now linker maps NamedMDNodes first, so there is not any need to map DebugLoc). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135205 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 22:14:06 +00:00
Devang Patel
2959ebd14d Link NamedMDNode before linking function bodies. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135204 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 22:13:07 +00:00
Jim Grosbach
33c16a2737 ARM diagnostic when 's' suffix on mnemonic that can't set flags. 
For example, "mlss r0, r1, r2, r3".

The MLS instruction does not have a flag-setting variant.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135203 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 22:04:21 +00:00
Bill Wendling
13123d9463 * Redo the permutation encoding for frameless stacks to be more like what the 
unwind library expects.
* Comment the permutation encoding for frameless stacks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135202 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 22:01:34 +00:00
Devang Patel
3dcb4ef757 Add dump() 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135200 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 21:50:04 +00:00
Benjamin Kramer
151bd17a8f Add OperandTypes for Thumb branch targets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135199 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 21:47:24 +00:00
Benjamin Kramer
3be41b748e Port operand types for ARM and X86 over from EDIS to the .td files. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135198 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 21:47:22 +00:00
Jim Grosbach
c8ae39e746 ARM MCRR/MCRR2 immediate operand range checking. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135192 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 21:26:42 +00:00
Chris Lattner
f546453466 revert r135172 until Devang and I figure out the right answer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135191 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 21:25:42 +00:00
Jim Grosbach
e540c7422c ARM MCR/MCR2 assembly parsing operand constraints. 
The immediate operands are restricted to 0-7. Enforce that when parsing
assembly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135189 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 21:19:17 +00:00
Nicolas Geoffray
5cf9fcdad1 After type-system-rewrite branch update the Cpp backend to not use OpaqueType. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135186 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 21:04:35 +00:00
Evan Cheng
c60f9b7523 Next round of MC refactoring. This patch factor MC table instantiations, MC 
registeration and creation code into XXXMCDesc libraries.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135184 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 20:59:42 +00:00
Chris Lattner
f84c59d110 simplify this logic now that GlobalAlias::isDeclaration is fixed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135183 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 20:23:05 +00:00
Chris Lattner
0063225bd7 Fix GlobalValue::isDeclaration() to always consider aliases to be definitions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135182 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 20:22:18 +00:00
Eric Christopher
5427edeb68 Check register class matching instead of width of type matching 
when determining validity of matching constraint. Allow i1
types access to the GR8 reg class for x86.

Fixes PR10352 and rdar://9777108

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135180 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 20:13:52 +00:00
Jim Grosbach
c83d504085 Reorganize ARM assembler aliases. 
Consolidate the individual declarations together for ease of reference. This
mirrors the organization in X86, as well, so is good for consistency. No
functional change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135179 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 19:47:47 +00:00
Rafael Espindola
64090bd2d4 Add LLVMConstNamedStruct to the C api to let its users create constants 
of named struct types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135178 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 19:09:08 +00:00
Chris Lattner
939f616e63 DebugLoc's don't hide any interesting types for TypeFinder to find. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135174 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 18:58:40 +00:00
Chris Lattner
4baa510f48 manually copy debugloc over to a new instruction in clone() instead 
of calling getAllMetadata().  This is semantically identical, but doing
it this way avoids unpacking the DebugLoc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135173 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 18:57:51 +00:00
Chris Lattner
4692be11a9 Stop the ValueMapper from calling getAllMetadata, which unpacks DebugLoc into 
an MDNode.  This saves a bunch of time and memory in the IR linker, e.g. when 
doing LTO of files with debug info.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135172 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 18:53:50 +00:00
Bruno Cardoso Lopes
62f67f86fe Add 256-bit load/store recognition and matching in several places. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135171 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 18:50:58 +00:00
Benjamin Kramer
eac0796542 Don't leak operands when putting them into a shift. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135169 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 18:41:22 +00:00
Jim Grosbach
3b14a5c546 Update ARM Assembly of LDM/STM. 
ldm/stm are the cannonical spellings for ldmia/stmia, so use them as such.
Update the parsing/encoding tests accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135168 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 18:35:38 +00:00
Chris Lattner
97d9730a59 add comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135164 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 18:12:44 +00:00
Chris Lattner
6c48244973 consolidate GlobalValue::isDeclaration into one 
non-virtual function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135163 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 18:10:41 +00:00
Chris Lattner
9854e1bebe code cleanup 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135157 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 18:01:49 +00:00
Jim Grosbach
9dec507ecb ARM ISB instruction assembly parsing. 
The ISB instruction takes an optional operand, just like DMB/DSB. Typically
only 'sy' is meaningful.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135156 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 18:00:31 +00:00
Benjamin Kramer
eb9a85f09e Change Intrinsic::getDeclaration and friends to take an ArrayRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135154 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 17:45:39 +00:00
Chris Lattner
61afc8820f add a couple more missing C api, patch by Vitaly Lugovskiy! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135151 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 16:20:28 +00:00
Richard Osborne
c7e33965f0 Update XCoreRegisterInfo::eliminateFrameIndex() to handle DBG_VALUE 
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135146 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 14:03:48 +00:00
Frits van Bommel
d155945f15 Simplify some functions in the C API by using an ArrayRef to directly reference the array passed to them instead of copying it to a std::vector. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135145 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 11:44:09 +00:00
Nadav Rotem
d0f3ef807e [VECTOR-SELECT] 
During type legalization we often use the SIGN_EXTEND_INREG SDNode.
When this SDNode is legalized during the LegalizeVector phase, it is
scalarized because non-simple types are automatically marked to be expanded.
In this patch we add support for lowering SIGN_EXTEND_INREG manually.
This fixes CodeGen/X86/vec_sext.ll when running with the '-promote-elements'
flag.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135144 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 11:11:14 +00:00
Nadav Rotem
aeb86fab3e Add assertion for the chain value type 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135143 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 10:37:54 +00:00
Chris Lattner
d91aa14075 add C api for hte new type system rewrite API. Patch by Vitaly Lugovskiy! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135132 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 05:53:17 +00:00
Evan Cheng
672b93a332 Unfortunately several files in MC are badly violating layering rule by using 
TargetAsmInfo, which in turn pulls in TargetRegisterInfo, etc. :-( There are
other cases of violations, but this is probably the worst.

This patch is but one small step towards fixing this. 500 more steps to go. :-(


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135131 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 05:43:07 +00:00
Jakob Stoklund Olesen
f1c709837b Reapply r135121 with a fixed copy constructor. 
Original commit message:

Count references to interference cache entries.

Each InterferenceCache::Cursor instance references a cache entry. A
non-zero reference count guarantees that the entry won't be reused for a
new register.

This makes it possible to have multiple live cursors examining
interference for different physregs.

The total number of live cursors into a cache must be kept below
InterferenceCache::getMaxCursors().

Code generation should be unaffected by this change, and it doesn't seem
to affect the cache replacement strategy either.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135130 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 05:35:11 +00:00
Devang Patel
49c19f778b Simplify. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135127 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 01:52:45 +00:00
Benjamin Kramer
3ff25514ce Don't emit a bit test if there is only one case the test can yield false. A simple SETNE is sufficient. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135126 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 01:38:42 +00:00
Devang Patel
d77ec6208c Simplify and delay extracting DebugLoc elements, scope and InlinedAt, as much as possible. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135124 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 01:14:57 +00:00
Eric Christopher
7332e6ee25 Add a dag combine pattern for folding C2-(A+C1) -> (C2-C1)-A 
Fixes rdar://9761830

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135123 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 01:12:15 +00:00
Jakob Stoklund Olesen
4fcfcf4984 Revert r135121 which broke a gcc-4.2 builder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135122 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 00:58:38 +00:00
Jakob Stoklund Olesen
6a9feaac93 Count references to interference cache entries. 
Each InterferenceCache::Cursor instance references a cache entry. A
non-zero reference count guarantees that the entry won't be reused for a
new register.

This makes it possible to have multiple live cursors examining
interference for different physregs.

The total number of live cursors into a cache must be kept below
InterferenceCache::getMaxCursors().

Code generation should be unaffected by this change, and it doesn't seem
to affect the cache replacement strategy either.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135121 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 00:31:14 +00:00
Eli Friedman
7e94501071 Fix up assertion in r135018 so it doesn't trigger on 32-bit; when we're in 32-bit, it doesn't matter whether the operation overflows because the computed address is not wider than the immediate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135120 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 00:22:31 +00:00
Devang Patel
0cd0c248cc Simplify. Compile unit check inside hasValidLocation() did not add any value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135118 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 00:20:24 +00:00
Jim Grosbach
e77494e3e3 ARM Assembler support for DSB instruction. 
Add instalias for default 'sy' option. Add tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135116 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 00:18:13 +00:00
Jakob Stoklund Olesen
c66a37df73 Reapply r135074 and r135080 with a fix. 
The cache entry referenced by the best split candidate could become
clobbered by an unsuccessful candidate.

The correct fix here is to use reference counts on the cache entries.
Coming up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135113 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 00:17:10 +00:00
Jim Grosbach
77f379e2a1 DMB instalias needs the same predicate as the instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135112 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 00:10:26 +00:00
Devang Patel
0f16a4eecc Fix typo in DEBUG message. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135111 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 00:04:53 +00:00
Devang Patel
5fc0d886da Add DEBUG messages. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135110 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-14 00:03:58 +00:00
Jim Grosbach
032434d622 ARM Assembler support for DMB instruction. 
Flesh out the options supported for the instruction. Shuffle tests a bit and
add entries for the rest of the options. Add an alias to handle the default
operand of "sy".



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135109 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 23:40:38 +00:00
Jim Grosbach
20fcaffaf7 Update comments. These are for assembler, too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135107 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 23:33:10 +00:00
Owen Anderson
16884415db Add a target-indepedent entry to MCInstrDesc to describe the encoded size of an opcode. Switch ARM over to using that rather than its own special MCInstrDesc bits. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135106 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 23:22:26 +00:00
Bill Wendling
efe2a6557d Add code to handle a "frameless" unwind stack. 
The frameless unwind stack has a special encoding, the algorithm for which is in
"permuteEncode".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135103 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 23:03:31 +00:00
Jim Grosbach
6f9f884502 ARM Assembler support for DBG instruction. 
Add range checking and testing for parsing and encoding of DBG instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135102 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 22:59:38 +00:00
Jakob Stoklund Olesen
54c74e906a Revert r135074 and r135080. They broke clamscan. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135096 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 22:20:09 +00:00
Jim Grosbach
1cbb0c16a1 Revert 135093. Think-o. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135094 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 22:06:11 +00:00
Jim Grosbach
91eb0aa5de Correct range for thumb co-processor immediate 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135093 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 22:03:11 +00:00
Jim Grosbach
83ab070fc1 Range checking for CDP[2] immediates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135092 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 22:01:08 +00:00
Bruno Cardoso Lopes
466b022c99 Make X86ISD::ANDNP more general and Codegen 256-bit VANDNP. A more 
general version of X86ISD::ANDNP also opened the room for a little bit
of refactoring.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135088 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 21:36:51 +00:00
Bruno Cardoso Lopes
c1af4772f1 The target specific node PANDN name is misleading. That happens because 
it's later selected to a ANDNPD/ANDNPS instruction instead of the PANDN
instruction. Rename it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135087 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 21:36:47 +00:00
Jim Grosbach
e35c5e06fe Cleanup Thumb co-processor instructions a bit. 
Combine redundant base classes and such. No indended functional change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135085 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 21:35:10 +00:00
Eli Friedman
2a01946de4 Make sure we don't combine a large displacement and a frame index in the same addressing mode on x86-64. It can overflow, leading to a crash/miscompile. 
<rdar://problem/9763308>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135084 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 21:29:53 +00:00
Jim Grosbach
0d8dae292a Parameterize away the ARM T1Cop class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135082 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 21:17:59 +00:00
Jim Grosbach
9bb098ad3a Fix predicates for Thumb co-processor instructions. 
They're all Thumb2 only, not just some of them. More refactoring cleanup
coming.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135081 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 21:14:23 +00:00
Jakob Stoklund Olesen
3bae1bf62e Only keep the global split candidates that work out. 
Some pysical registers create split solutions that would spill anywhere.
They should not even be considered in future multi-way global splits.

This does not affect code generation (yet).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135080 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 20:49:46 +00:00
Eli Friedman
4977eb5eb5 Refactor out checking for displacements on x86-64 addressing modes. No functionality change. Refactoring in preparation for an additional safety check in FoldOffsetIntoAddress. 
Part of <rdar://problem/9763308>.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135079 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 20:44:23 +00:00
Jim Grosbach
898e7e26a5 Fix encoding for ARM BXJ instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135077 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 20:25:01 +00:00
Jim Grosbach
d447ac6c8c Fix encoding of predicate bits on ARM BX_pred. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135076 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 20:21:31 +00:00
Jakob Stoklund Olesen
1337e2b75a Move the InterferenceCache cursor into the GlobalSplitCand struct. 
This is in preparation of supporting multiple global split candidates in
a single live range split operation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135074 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 20:14:52 +00:00
Jim Grosbach
fff76ee7ef Range checking for 16-bit immediates in ARM assembly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135071 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 20:10:10 +00:00
Jay Foad
d1863560cb Revert r135042. As Chris pointed out, it had no effect, and was based on 
a complete misunderstanding of the code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135070 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 20:05:31 +00:00
Evan Cheng
9bc402c8d4 Fix up TargetLoweringObjectFile ctors to properly initialize fields. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135068 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 19:54:59 +00:00
Jim Grosbach
619e0d6d95 Give the ARM BKPT instruction the right operand type. 
The immediate is of limited range and the operand type should reflect that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135066 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 19:24:09 +00:00
Jim Grosbach
21101d60ce Add tests for ARM parsing of 'BKPT' instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135063 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 19:17:36 +00:00
Evan Cheng
93a635c82c It's not safe to fold (fptrunc (sqrt (fpext x))) to (sqrtf x) if there is another use of sqrt. rdar://9763193 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135058 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 19:08:16 +00:00
Jim Grosbach
19906729a4 Improve ARM assembly parsing diagnostics a bit. 
Catch potential cascading errors on a malformed so_reg operand and bail after
the first error.

Add some tests for the diagnostics we do want.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135055 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 18:49:30 +00:00
Jim Grosbach
37ee464ea9 Destination register operand is optional for ADC and SBC ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135052 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 17:57:17 +00:00
Jim Grosbach
e8606dc7c8 Flesh out ARM Parser support for shifted-register operands. 
Now works for parsing register shifted register and register shifted
immediate arithmetic instructions, including the 'rrx' rotate with extend.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135049 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 17:50:29 +00:00
Jim Grosbach
aa4cc1a6d7 80 columns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135047 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 17:25:55 +00:00
Jim Grosbach
b7f689bab9 Update MCParsedAsmOperand debug methods. 
Update the debug output interface for MCParsedAsmOperand to have a print()
method which takes an output stream argument, an << operator which invokes
the print method using the given stream, and a dump() method which prints
the operand to the dbgs() stream. This makes the interface more consistent
with the rest of LLVM, and more convenient to use at the debugger command
line.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135043 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 15:34:57 +00:00
Jay Foad
75f67e0d8d Really cache function types and anonymous struct types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135042 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 10:39:49 +00:00
Jay Foad
fc6d3a4986 Convert InsertValueInst and ExtractValueInst APIs to use ArrayRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135040 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 10:26:04 +00:00
Danil Malyshev
cf852dc49b Add to RuntimeDyld support different object formats 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135037 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 07:57:58 +00:00
Chris Lattner
c09ef37171 stop leaking all named struct types with an empty name. Thanks 
to Benjamin Kramer for steering me in the right direction here.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135031 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 04:22:39 +00:00
Evan Cheng
3b737081e4 Add an entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135024 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 01:33:00 +00:00
Bruno Cardoso Lopes
61905f0139 AVX Codegen support for 256-bit versions of vandps, vandpd, vorps, vorpd, vxorps, vxorpd 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135023 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 01:15:33 +00:00
Bill Wendling
8440fe2166 Don't emit the FDE end label if the last thing emitted was a compact unwind and 
not the FDE


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135020 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 00:49:09 +00:00
Eli Friedman
5cf2ee1f80 Add an assert (which should never trigger) that triggers on a testcase I'm looking at. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135018 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 00:44:29 +00:00
Evan Cheng
e721f5c8d3 Improve codegen for select's: 
if (x != 0) x = 1
if (x == 1) x = 1

Previous codegen looks like this:
        mov     r1, r0
        cmp     r1, #1
        mov     r0, #0
        moveq   r0, #1

The naive lowering select between two different values. It should recognize the
test is equality test so it's more a conditional move rather than a select:
        cmp     r0, #1
        movne   r0, #0

rdar://9758317


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135017 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 00:42:17 +00:00
Bill Wendling
3641e81172 Assign variable before we test it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135015 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 00:23:39 +00:00
Bill Wendling
f4f53f08f5 Fix obvious think-o. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135014 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 00:20:09 +00:00
Bill Wendling
595d745f5f Clean up the handling of an EBP/RBP unwind frame pointer. In particular, don't 
assert when the frame pointer is -1 (i.e., the function is "frameless").

Still to do: "frameless" unwind information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135013 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 00:16:14 +00:00
Bill Wendling
d5efb1eee6 There is a cyclic dependency between MC and Target if this method is out-of-line. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135006 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-12 22:35:01 +00:00
Jay Foad
5fdd6c8793 Second attempt at de-constifying LLVM Types in FunctionType::get(), 
StructType::get() and TargetData::getIntPtrType().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134982 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-12 14:06:48 +00:00