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1498 Commits

Author SHA1 Message Date
Reid Spencer
7b06bd532d Replace CastInst::createInferredCast calls with more accurate cast 
creation calls.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32521 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-13 00:50:17 +00:00
Evan Cheng
279101eb1a Expand FP constant to integers if FP types are not legal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32497 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-12 22:19:28 +00:00
Evan Cheng
5c9ce1893a Soft fp FNEG, SINT_TO_FP, UINT_TO_FP libcall expansion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32495 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-12 21:51:17 +00:00
Evan Cheng
004952140f Expand ConstantFP to load from CP if float types are being expanded. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32494 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-12 21:32:44 +00:00
Evan Cheng
0ca67332fa Expand i32/i64 CopyToReg f32/f64 to BIT_CONVERT + CopyToReg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32493 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-12 21:21:32 +00:00
Evan Cheng
7b2b5c846c - When expanding a bit_convert whose src operand is also to be expanded and 
its expansion result type is equal to the result type of the bit_convert,
e.g. (i64 bit_convert (f64 op)) if FP is not legal
returns the result of the expanded source operand.
- Store f32 / f64 may be expanded to a single store i32/i64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32490 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-12 19:53:13 +00:00
Evan Cheng
b15974a65c Expand formal arguments and call arguments recursively: e.g. f64 -> i64 -> 2 x i32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32476 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-12 07:27:38 +00:00
Chris Lattner
f0094839f0 fit in 80 cols 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32474 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-12 05:22:21 +00:00
Chris Lattner
d9e06a5d03 this can only be fptrunc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32473 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-12 05:21:51 +00:00
Chris Lattner
d93d46ee7e Revert Nate's patch to fix X86/store-fp-constant.ll. With the dag combiner 
and legalizer separated like they currently are, I don't see a way to handle
this xform.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32466 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-12 04:18:56 +00:00
Chris Lattner
62be1a71f4 make this code more aggressive about turning store fpimm into store int imm. 
This is not sufficient to fix X86/store-fp-constant.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32465 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-12 04:16:14 +00:00
Reid Spencer
15f46d6c28 Change inferred cast creation calls to more specific cast creations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32460 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-12 01:17:41 +00:00
Evan Cheng
13acce3ef0 Re-apply changes that were backed out and fix a naughty typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32442 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-11 19:27:14 +00:00
John Criswell
2381f6f6c6 It seems the llvm::OStream class does not handle stream manipulators. 
For now, just grab the stream and perform the output on it directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32441 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-11 19:15:36 +00:00
Chris Lattner
70a24b3141 Revert changes that broke oggenc on ppc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32440 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-11 18:53:38 +00:00
Evan Cheng
25ece66ff3 Don't convert store double C, Ptr to store long C, Ptr if i64 is not a legal type. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32434 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-11 17:25:19 +00:00
Evan Cheng
bbf1e5e2e9 f32 / f64 node is expanded to one i32 / i64 node. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32433 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-11 06:50:04 +00:00
Evan Cheng
b618230231 Clean up some bad code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32432 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-11 06:25:26 +00:00
Nate Begeman
2cbba89347 Move something that should be in the dag combiner from the legalizer to the 
dag combiner.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32431 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-11 02:23:46 +00:00
Anton Korobeynikov
d27a258d2d Cleaned setjmp/longjmp lowering interfaces. Now we're producing right 
code (both asm & cbe) for Mingw32 target.
Removed autoconf checks for underscored versions of setjmp/longjmp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32415 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-10 23:12:42 +00:00
Evan Cheng
1a8f1fe676 Preliminary soft float support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32394 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-09 02:42:38 +00:00
Chris Lattner
555d8d6f4b Fix CodeGen/PowerPC/2006-12-07-SelectCrash.ll on PPC64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32336 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-07 22:36:47 +00:00
Bill Wendling
bcd2498f4f Removed more <iostream> includes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32321 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-07 20:28:15 +00:00
Bill Wendling
832171cb97 Removing even more <iostream> includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32320 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-07 20:04:42 +00:00
Chris Lattner
ac0b6ae358 Detemplatize the Statistic class. The only type it is instantiated with 
is 'unsigned'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32279 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-06 17:46:33 +00:00
Jeff Cohen
97af751deb Unbreak VC++ build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32113 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-02 02:22:01 +00:00
Evan Cheng
ba59a1e453 Match TargetInstrInfo changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32098 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-01 21:52:58 +00:00
Evan Cheng
6a16c5ab2d Avoid inifinite looping if READCYCLECOUNTER isn't custom lowered. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32022 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-29 19:13:47 +00:00
Evan Cheng
f0b3ba6752 Allow target to custom lower READCYCLECOUNTER (when it doesn't have to be expanded). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32016 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-29 08:26:18 +00:00
Evan Cheng
f3e486e069 Fix for PR1023 by Dan Gohman. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32003 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-29 01:58:12 +00:00
Evan Cheng
a5a57d66f5 Fix for PR1022 (folding loads of static initializers) by Dan Gohman. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32000 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-29 01:38:07 +00:00
Chris Lattner
3f7927c84c add a hook to allow targets to hack on inline asms to lower them to llvm 
when they want to.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31997 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-29 01:12:32 +00:00
Chris Lattner
b6c806045b Fix PR1016 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31950 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-28 01:03:30 +00:00
Evan Cheng
c0f64ffab9 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead 
of opcode and number of operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 23:37:22 +00:00
Chris Lattner
3687c1a4d3 Fix the dag combiner bug corresponding to PR1014. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31943 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 21:50:02 +00:00
Chris Lattner
bc4cf8d5b1 For better or worse, load from i1 is assumed to be zero extended. Do not 
form a load from i1 from larger loads that may not be zext'd.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31933 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 04:40:53 +00:00
Chris Lattner
f9908172e9 If a brcond condition is promoted, make sure to zero extend it, even if not 
expanded into BR_CC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31932 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 04:39:56 +00:00
Reid Spencer
3da59db637 For PR950: 
The long awaited CAST patch. This introduces 12 new instructions into LLVM
to replace the cast instruction. Corresponding changes throughout LLVM are
provided. This passes llvm-test, llvm/test, and SPEC CPUINT2000 with the
exception of 175.vpr which fails only on a slight floating point output
difference.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31931 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 01:05:10 +00:00
Chris Lattner
32ba1aa204 Fix PR1011 and CodeGen/Generic/2006-11-20-DAGCombineCrash.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31878 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-20 18:05:46 +00:00
Reid Spencer
45fb3f3cb2 For PR950: 
First in a series of patches to convert SetCondInst into ICmpInst and
FCmpInst using only two opcodes and having the instructions contain their
predicate value. Nothing uses these classes yet. More patches to follow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31867 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-20 01:22:35 +00:00
Jim Laskey
5f64a16869 Fixing the ENABLE_OPTIMIZED=1 DISABLE_ASSERTIONS=1 build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31822 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-17 13:07:55 +00:00
Evan Cheng
cc47021f49 Fix an incorrectly inverted condition. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31773 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 00:08:20 +00:00
Chris Lattner
43193d60e9 remove dead #include 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31753 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 17:51:15 +00:00
Evan Cheng
7ce4578353 Matches MachineInstr changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31712 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-13 23:36:35 +00:00
Reid Spencer
a07d5b9164 Make an assert comment match the tested assertion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31686 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 20:07:59 +00:00
Evan Cheng
3ba433a7e8 Add methods to add implicit def use operands to a MI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31675 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 10:20:02 +00:00
Chris Lattner
41e53fd39b disallow preinc of a frameindex. This is not profitable and causes 2-addr 
pass to explode.  This fixes a bunch of llc-beta failures on ppc last night.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31661 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 01:00:15 +00:00
Chris Lattner
9f1794ea58 reduce indentation by using early exits. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31660 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 00:56:29 +00:00
Chris Lattner
448f219fed move big chunks of code out-of-line, no functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31658 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 00:39:41 +00:00
Chris Lattner
734c91d250 Fix a dag combiner bug exposed by my recent instcombine patch. This fixes 
CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll and PPC gsm/toast


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31644 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 21:37:15 +00:00
Evan Cheng
438f7bc67c Add implicit def / use operands to MachineInstr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31633 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 08:43:01 +00:00
Evan Cheng
a7ff64d608 When forming a pre-indexed store, make sure ptr isn't the same or is a pred of value being stored. It would cause a cycle. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31631 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 08:28:11 +00:00
Chris Lattner
1e7aa5c209 commentate 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31627 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 04:41:34 +00:00
Evan Cheng
8dc5cad8a2 Don't attempt expensive pre-/post- indexed dag combine if target does not support them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31598 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 19:10:46 +00:00
Evan Cheng
5ff839fbab Add a mechanism to specify whether a target supports a particular indexed load / store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31597 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 18:56:43 +00:00
Evan Cheng
0030582239 Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31596 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 18:44:21 +00:00
Evan Cheng
144d8f09e1 Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31595 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 17:55:04 +00:00
Evan Cheng
d258efaf6e getPostIndexedAddressParts change: passes in load/store instead of its loaded / stored VT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31584 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 04:29:46 +00:00
Evan Cheng
b00dddd164 Match more post-indexed ops. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31569 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 20:27:27 +00:00
Jim Laskey
d6c3422e31 Remove redundant <cmath>. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31561 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 19:16:44 +00:00
Evan Cheng
03fa6ea402 - When performing pre-/post- indexed load/store transformation, do not worry 
about whether the new base ptr would be live below the load/store. Let two
  address pass split it back to non-indexed ops.
- Minor tweaks / fixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31544 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 08:30:28 +00:00
Evan Cheng
a4f53ef527 Fixed a minor bug preventing some pre-indexed load / store transformation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31543 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 06:56:05 +00:00
Reid Spencer
3822ff5c71 For PR950: 
This patch converts the old SHR instruction into two instructions,
AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not
dependent on the sign of their operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31542 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 06:47:33 +00:00
Evan Cheng
6c1491dd06 Fix a obscure post-indexed load / store dag combine bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31537 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 02:38:55 +00:00
Evan Cheng
bbd6f6ec1a Add post-indexed load / store transformations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31498 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-07 09:03:05 +00:00
Chris Lattner
fa9aa2b424 Fix PR988 and CodeGen/Generic/2006-11-06-MemIntrinsicExpand.ll. 
The low part goes in the first operand of expandop, not the second one.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31487 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-07 04:11:44 +00:00
Evan Cheng
d5ad440f43 Remove dead code; added a missing null ptr check. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31478 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-06 21:33:46 +00:00
Evan Cheng
3ef554d2b1 Add comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31473 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-06 08:14:30 +00:00
Jeff Cohen
d41b30def3 Unbreak VC++ build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31464 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-05 19:31:28 +00:00
Evan Cheng
33dbedcdcb Added pre-indexed store support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31459 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-05 09:31:14 +00:00
Evan Cheng
9109fb1eb7 Added getIndexedStore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31458 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-05 09:30:09 +00:00
Evan Cheng
95f6edeff5 Changes to use operand constraints to process two-address instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31453 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-04 09:44:31 +00:00
Evan Cheng
e6e97e66a3 Fix comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31414 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-03 07:31:32 +00:00
Evan Cheng
1a854be352 Rename 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31413 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-03 07:21:16 +00:00
Reid Spencer
b8f4e0aa17 Remove dead variable. Fix 80 column violations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31412 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-03 03:30:34 +00:00
Evan Cheng
7fc033a24d Added DAG combiner transformation to generate pre-indexed loads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31410 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-03 03:06:21 +00:00
Evan Cheng
c5fc57dcae Added isPredecessor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31409 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-03 03:05:24 +00:00
Chris Lattner
02cb49ee67 silence warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31397 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-03 01:28:29 +00:00
Reid Spencer
3ed469ccd7 For PR786: 
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31380 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-02 20:25:50 +00:00
Reid Spencer
0a783f783c For PR950: 
Replace the REM instruction with UREM, SREM and FREM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31369 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-02 01:53:59 +00:00
Chris Lattner
2a821601f1 Allow the getRegForInlineAsmConstraint method to return a register class with 
no fixes physreg.  Treat this as permission to use any register in the register
class.  When this happens and it is safe, allow the llvm register allcoator to
allocate the register instead of doing it at isel time.  This eliminates a ton
of copies around common inline asms.  For example:

int test2(int Y, int X) {
  asm("foo %0, %1" : "=r"(X): "r"(X));
  return X;
}

now compiles to:

_test2:
        foo r3, r4
        blr

instead of:

_test2:
        mr r2, r4
        foo r2, r2
        mr r3, r2
        blr

GCC produces:

_test2:
        foo r4, r4
        mr r3,r4
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31366 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-02 01:41:49 +00:00
Evan Cheng
1dabb68ab4 Clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31359 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-01 22:39:30 +00:00
Evan Cheng
93467e7fe3 CopyFromReg starts a live range so its use should not be considered a floater. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31356 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-01 22:17:06 +00:00
Evan Cheng
6cc31ae4da Print jumptable index. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31340 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-01 04:48:30 +00:00
Chris Lattner
0ccb500fa7 Compile CodeGen/PowerPC/fp-branch.ll to: 
_intcoord_cond_next55:
LBB1_3: ;cond_next55
        lis r2, ha16(LCPI1_0)
        lfs f0, lo16(LCPI1_0)(r2)
        fcmpu cr0, f1, f0
        blt cr0, LBB1_2 ;cond_next62.exitStub
LBB1_1: ;bb72.exitStub
        li r3, 1
        blr
LBB1_2: ;cond_next62.exitStub
        li r3, 0
        blr

instead of:

_intcoord_cond_next55:
LBB1_3: ;cond_next55
        lis r2, ha16(LCPI1_0)
        lfs f0, lo16(LCPI1_0)(r2)
        fcmpu cr0, f1, f0
        bge cr0, LBB1_1 ;bb72.exitStub
LBB1_4: ;cond_next55
        lis r2, ha16(LCPI1_0)
        lfs f0, lo16(LCPI1_0)(r2)
        fcmpu cr0, f1, f0
        bnu cr0, LBB1_2 ;cond_next62.exitStub
LBB1_1: ;bb72.exitStub
        li r3, 1
        blr
LBB1_2: ;cond_next62.exitStub
        li r3, 0
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31330 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-31 23:06:00 +00:00
Chris Lattner
df19f27d03 look through isunordered to inline it into branch blocks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31328 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-31 22:37:42 +00:00
Chris Lattner
efa46ce87b handle global address constant sdnodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31323 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-31 20:01:56 +00:00
Chris Lattner
53069fbbae TargetLowering::isOperandValidForConstraint 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31319 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-31 19:41:18 +00:00
Chris Lattner
dba1aeedd8 Change the prototype for TargetLowering::isOperandValidForConstraint 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31318 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-31 19:40:43 +00:00
Chris Lattner
d03f1581c8 Turn an assert into an error message. This is commonly triggered when 
we don't support a specific constraint yet.  When this happens, print the
unsupported constraint.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31310 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-31 07:33:13 +00:00
Evan Cheng
d063189c09 Fix a typo which can break jumptables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31305 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-31 02:31:00 +00:00
Evan Cheng
3d4ce11085 Lower jumptable to BR_JT. The legalizer can lower it to a BRIND or let the target custom lower it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31293 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-30 08:00:44 +00:00
Evan Cheng
c41cd9c391 Added a new SDNode type: BR_JT for jumptable branch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31292 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-30 07:59:36 +00:00
Chris Lattner
6a586c8d9a fix Generic/2006-10-29-Crash.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31281 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-29 21:01:20 +00:00
Chris Lattner
5a145f0094 Fix a load folding issue that Evan noticed: there is no need to export values 
used by comparisons in the main block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31279 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-29 18:23:37 +00:00
Evan Cheng
ba726ab3ec VLOAD is not the LoadSDNode opcode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31276 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-29 06:14:47 +00:00
Nick Lewycky
f6aaaaa39e Remove spurious case. EXTLOAD is not one of the node opcodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31275 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-29 02:26:30 +00:00
Chris Lattner
bad7f48c70 split critical edges more carefully and intelligently. In particular, critical 
edges whose destinations are not phi nodes don't bother us.  Also, share
split edges, since the split edge can't have a phi.  This significantly
reduces the complexity of generated code in some cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31274 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-28 19:22:10 +00:00
Jim Laskey
1c6f01aaa5 Load and stores have not been uniqued properly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31261 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-28 17:25:28 +00:00
Chris Lattner
47e32e6b83 Split *all* critical edges before isel. This resolves issues with spill code 
being inserted on unsplit critical edges, which introduces (sometimes large
amounts of) partially dead spill code.

This also fixes PR925 + CodeGen/Generic/switch-crit-edge-constant.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31260 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-28 17:04:37 +00:00