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14269 Commits

Author SHA1 Message Date
Chris Lattner
d6f7fe76a6 Add some more simple sign bit propagation cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28149 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 22:39:59 +00:00
Jeff Cohen
d43b18d9e4 Fix some loose ends in MASM support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28148 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 21:27:14 +00:00
Chris Lattner
ee4ea92358 Use the new TargetLowering::ComputeNumSignBits method to eliminate 
sign_extend_inreg operations.  Though ComputeNumSignBits is still rudimentary,
this is enough to compile this:

short test(short X, short x) {
  int Y = X+x;
  return (Y >> 1);
}
short test2(short X, short x) {
  int Y = (short)(X+x);
  return Y >> 1;
}

into:

_test:
        add r2, r3, r4
        srawi r3, r2, 1
        blr
_test2:
        add r2, r3, r4
        extsh r2, r2
        srawi r3, r2, 1
        blr

instead of:

_test:
        add r2, r3, r4
        srawi r2, r2, 1
        extsh r3, r2
        blr
_test2:
        add r2, r3, r4
        extsh r2, r2
        srawi r2, r2, 1
        extsh r3, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28146 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 09:30:03 +00:00
Chris Lattner
5c3e21d687 Add some really really simple code for computing sign-bit propagation. 
This will certainly be enhanced in the future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28145 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 09:27:13 +00:00
Chris Lattner
f0df8824eb When inserting casts, be careful of where we put them. We cannot insert 
a cast immediately before a PHI node.

This fixes Regression/CodeGen/Generic/2006-05-06-GEP-Cast-Sink-Crash.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28143 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 09:10:37 +00:00
Chris Lattner
33a6113995 Move some code around. 
Make the "fold (and (cast A), (cast B)) -> (cast (and A, B))" transformation
only apply when both casts really will cause code to be generated.  If one or
both doesn't, then this xform doesn't remove a cast.

This fixes Transforms/InstCombine/2006-05-06-Infloop.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28141 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 09:00:16 +00:00
Chris Lattner
80a7ecc923 Teach the X86 backend about non-i32 inline asm register classes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28139 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 00:29:37 +00:00
Chris Lattner
c93dfda905 Fold (trunc (srl x, c)) -> (srl (trunc x), c) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28138 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 00:11:52 +00:00
Chris Lattner
b72773bb88 Fold trunc(any_ext). This gives stuff like: 
27,28c27
<       movzwl %di, %edi
<       movl %edi, %ebx
---
>       movw %di, %bx


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28137 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 22:56:26 +00:00
Chris Lattner
06afe07037 Shrink shifts when possible. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28136 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 22:53:17 +00:00
Chris Lattner
fe8babf689 Implement ComputeMaskedBits/SimplifyDemandedBits for ISD::TRUNCATE 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28135 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 22:32:12 +00:00
Chris Lattner
35c3913328 Print a grouping around inline asm blocks so that we can tell when we are 
using them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28134 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 21:50:04 +00:00
Chris Lattner
7660ebc90a Print *some* grouping around inline asm blocks so we know where they are. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28133 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 21:48:50 +00:00
Chris Lattner
1c05997bd8 Indent multiline asm strings more nicely 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28132 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 21:47:05 +00:00
Chris Lattner
bd04aa5796 Teach the code generator to use cvtss2sd as extload f32 -> f64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28131 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 21:35:18 +00:00
Chris Lattner
e564dbb51c Fold (fpext (load x)) -> (extload x) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28130 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 21:34:35 +00:00
Chris Lattner
903236468c More aggressively sink GEP offsets into loops. For example, before we 
generated:

        movl 8(%esp), %eax
        movl %eax, %edx
        addl $4316, %edx
        cmpb $1, %cl
        ja LBB1_2       #cond_false
LBB1_1: #cond_true
        movl L_QuantizationTables720$non_lazy_ptr, %ecx
        movl %ecx, (%edx)
        movl L_QNOtoQuantTableShift720$non_lazy_ptr, %edx
        movl %edx, 4460(%eax)
        ret
...

Now we generate:

        movl 8(%esp), %eax
        cmpb $1, %cl
        ja LBB1_2       #cond_false
LBB1_1: #cond_true
        movl L_QuantizationTables720$non_lazy_ptr, %ecx
        movl %ecx, 4316(%eax)
        movl L_QNOtoQuantTableShift720$non_lazy_ptr, %ecx
        movl %ecx, 4460(%eax)
        ret

... which uses one fewer register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28129 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 21:17:49 +00:00
Chris Lattner
581a7ad7c9 Fix an infinite loop compiling oggenc last night. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28128 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 20:51:30 +00:00
Evan Cheng
4713724eda Need extload patterns after Chris' DAG combiner changes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28127 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 08:23:07 +00:00
Chris Lattner
6fc205fc44 Implement InstCombine/cast.ll:test29 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28126 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 06:39:07 +00:00
Chris Lattner
0d8dae749c Fold some common code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28124 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 06:32:04 +00:00
Chris Lattner
540121f1ec Implement: 
// fold (and (sext x), (sext y)) -> (sext (and x, y))
  // fold (or  (sext x), (sext y)) -> (sext (or  x, y))
  // fold (xor (sext x), (sext y)) -> (sext (xor x, y))
  // fold (and (aext x), (aext y)) -> (aext (and x, y))
  // fold (or  (aext x), (aext y)) -> (aext (or  x, y))
  // fold (xor (aext x), (aext y)) -> (aext (xor x, y))


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28123 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 06:31:05 +00:00
Chris Lattner
a3dc3f692c Pull and through and/or/xor. This compiles some bitfield code to: 
mov EAX, DWORD PTR [ESP + 4]
        mov ECX, DWORD PTR [EAX]
        mov EDX, ECX
        add EDX, EDX
        or EDX, ECX
        and EDX, -2147483648
        and ECX, 2147483647
        or EDX, ECX
        mov DWORD PTR [EAX], EDX
        ret

instead of:

        sub ESP, 4
        mov DWORD PTR [ESP], ESI
        mov EAX, DWORD PTR [ESP + 8]
        mov ECX, DWORD PTR [EAX]
        mov EDX, ECX
        add EDX, EDX
        mov ESI, ECX
        and ESI, -2147483648
        and EDX, -2147483648
        or EDX, ESI
        and ECX, 2147483647
        or EDX, ECX
        mov DWORD PTR [EAX], EDX
        mov ESI, DWORD PTR [ESP]
        add ESP, 4
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28122 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 06:10:43 +00:00
Chris Lattner
5ffc066912 Implement a variety of simplifications for ANY_EXTEND. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28121 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 05:58:59 +00:00
Chris Lattner
35e5c14b80 Factor some code, add these transformations: 
// fold (and (trunc x), (trunc y)) -> (trunc (and x, y))
  // fold (or  (trunc x), (trunc y)) -> (trunc (or  x, y))
  // fold (xor (trunc x), (trunc y)) -> (trunc (xor x, y))


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28120 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 05:51:50 +00:00
Evan Cheng
8f7f7125e9 Better implementation of truncate. ISel matches it to a pseudo instruction 
that gets emitted as movl (for r32 to i16, i8) or a movw (for r16 to i8). And
if the destination gets allocated a subregister of the source operand, then
the instruction will not be emitted at all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28119 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 05:40:20 +00:00
Chris Lattner
55c63257f3 New note, Nate, please check to see if I'm full of it :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28118 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 05:36:15 +00:00
Jeff Cohen
4b75e73791 Fix VC++ compilation error. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28117 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 01:47:05 +00:00
Chris Lattner
7e598096ea Sink noop copies into the basic block that uses them. This reduces the number 
of cross-block live ranges, and allows the bb-at-a-time selector to always
coallesce these away, at isel time.

This reduces the load on the coallescer and register allocator.  For example
on a codec on X86, we went from:

   1643 asm-printer           - Number of machine instrs printed
    419 liveintervals         - Number of loads/stores folded into instructions
   1144 liveintervals         - Number of identity moves eliminated after coalescing
   1022 liveintervals         - Number of interval joins performed
    282 liveintervals         - Number of intervals after coalescing
   1304 liveintervals         - Number of original intervals
     86 regalloc              - Number of times we had to backtrack
1.90232 regalloc              - Ratio of intervals processed over total intervals
     40 spiller               - Number of values reused
    182 spiller               - Number of loads added
    121 spiller               - Number of stores added
    132 spiller               - Number of register spills
      6 twoaddressinstruction - Number of instructions commuted to coalesce
    360 twoaddressinstruction - Number of two-address instructions

to:

   1636 asm-printer           - Number of machine instrs printed
    403 liveintervals         - Number of loads/stores folded into instructions
   1155 liveintervals         - Number of identity moves eliminated after coalescing
   1033 liveintervals         - Number of interval joins performed
    279 liveintervals         - Number of intervals after coalescing
   1312 liveintervals         - Number of original intervals
     76 regalloc              - Number of times we had to backtrack
1.88998 regalloc              - Ratio of intervals processed over total intervals
      1 spiller               - Number of copies elided
     41 spiller               - Number of values reused
    191 spiller               - Number of loads added
    114 spiller               - Number of stores added
    128 spiller               - Number of register spills
      4 twoaddressinstruction - Number of instructions commuted to coalesce
    356 twoaddressinstruction - Number of two-address instructions

On this testcase, this change provides a modest reduction in spill code,
regalloc iterations, and total instructions emitted.  It increases the number
of register coallesces.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28115 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 01:04:50 +00:00
Chris Lattner
b93b0347d8 Adjust to use proper TargetData copy ctor 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28112 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 21:18:40 +00:00
Chris Lattner
6e994b7492 Final pass of minor cleanups for MachineInstr 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28110 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 19:36:09 +00:00
Evan Cheng
14a6db8bd9 Initial support for register pressure aware scheduling. The register reduction 
scheduler can go into a "vertical mode" (i.e. traversing up the two-address
chain, etc.) when the register pressure is low.
This does seem to reduce the number of spills in the cases I've looked at. But
with x86, it's no guarantee the performance of the code improves.
It can be turned on with -sched-vertically option.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28108 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 19:16:39 +00:00
Chris Lattner
943b5e117f Remove redundancy and a level of indirection when creating machine operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28107 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 19:14:44 +00:00
Chris Lattner
8b915b4ed2 Remove and simplify some more machineinstr/machineoperand stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28105 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 18:16:01 +00:00
Chris Lattner
2d90ac7ca6 Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28104 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 18:05:43 +00:00
Chris Lattner
e53f4a055f Move some methods out of MachineInstr into MachineOperand 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28102 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 17:52:23 +00:00
Chris Lattner
e3158308e0 Fix Transforms/InstCombine/2006-05-04-DemandedBitCrash.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28101 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 17:33:35 +00:00
Chris Lattner
63b3d7113d There shalt be only one "immediate" operand type! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28099 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 17:21:20 +00:00
Chris Lattner
ceb408f6a2 Change "value" in MachineOperand to be a GlobalValue, as that is the only 
thing that can be in it.  Remove a dead method.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28098 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 17:02:51 +00:00
Chris Lattner
e45aa737ba Revert Nate's CR patch from last night, which caused many regressions (e.g. fhourstones). 
Loading and storing off R0 isn't what we wanted.  Also, taking some CR's out of
CRRC seems to cause failures as well.  Further investigation is required.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28097 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 16:56:45 +00:00
Jeff Cohen
10efcfabf1 Make external globals public; other minor cleanup. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28096 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 16:20:22 +00:00
Jeff Cohen
a6e24d8caf Make Intel syntax the default when LLVM is built with VC++. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28095 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 16:19:27 +00:00
Chris Lattner
4efeab208c Remove a bunch more dead V9 specific stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28094 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 01:26:39 +00:00
Chris Lattner
ea50fabfd4 Remove a bunch more SparcV9 specific stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28093 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 01:15:02 +00:00
Chris Lattner
34fb2cad46 Remove some more V9-specific stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28092 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 00:49:59 +00:00
Chris Lattner
10f3597c4e Remove some more unused stuff from MachineInstr that was leftover from V9. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28091 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 00:44:25 +00:00
Chris Lattner
0e57629a93 Simplify handling of relocations 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28090 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 00:42:08 +00:00
Evan Cheng
9e062ed516 Use movsd to shuffle in the lowest two elements of a v4f32 / v4i32 vector when 
movlps cannot be used (e.g. when load from m64 has multiple uses).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28089 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-03 20:32:03 +00:00
Chris Lattner
5a032de387 Change from using MachineRelocation ctors to using static methods 
in MachineRelocation to create Relocations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28088 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-03 20:30:20 +00:00
Chris Lattner
d2d5c76753 minor cleanups, no functionality change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28087 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-03 18:55:56 +00:00
Chris Lattner
93e5c284d7 inline a simple method 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28083 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-03 17:21:32 +00:00
Chris Lattner
b4432f3d47 Suck block address tracking out of targets into the JIT Emitter. This 
simplifies the MachineCodeEmitter interface just a little bit and makes
BasicBlocks work like constant pools and jump tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28082 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-03 17:10:41 +00:00
Chris Lattner
5c488182da Fix a bug in Owen's checkin that broke the CBE on all non sparc v9 platforms. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28081 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-03 05:48:41 +00:00
Nate Begeman
67977ad19c Teach the x86 jit how to handle jump tables not directly used by a jump 
instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28080 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-03 04:52:47 +00:00
Nate Begeman
f4360a4789 Finish up the initial jump table implementation by allowing jump tables to 
not be 100% dense.  Increase the minimum threshold for the number of cases
in a switch statement from 4 to 6 in order to create a jump table.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28079 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-03 03:48:02 +00:00
Evan Cheng
c9a83a45ba Bottom up register pressure reduction work: clean up some hacks and enhanced 
the heuristic to further reduce spills for several test cases. (Note, it may
not necessarily translate to runtime win!)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28076 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-03 02:10:45 +00:00
Owen Anderson
a69571c799 Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference. 
This fixes PR 759.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28074 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-03 01:29:57 +00:00
Chris Lattner
0eb4d6b52e Align function bodies correctly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28073 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-03 01:03:20 +00:00
Chris Lattner
e6fdcbfc47 Simplify some code. Don't add memory blocks to the Blocks list twice. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28071 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-03 00:54:49 +00:00
Chris Lattner
9b4c96d45d Add assertions that verify that the actual arguments to a call or invoke match 
the prototype of the called function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28070 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-03 00:48:22 +00:00
Chris Lattner
af1563fb62 Change the BasicBlockAddrs map to be a vector, indexed by MBB number. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28069 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-03 00:32:55 +00:00
Chris Lattner
23118b649e Keep the alpha JIT similar to the PPC/X86 jits 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28068 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-03 00:31:21 +00:00
Chris Lattner
32ca55f3bc Simplify some code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28066 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-03 00:13:06 +00:00
Chris Lattner
f75f9be3fb Several related changes: 
1. Change several methods in the MachineCodeEmitter class to be pure virtual.
2. Suck emitConstantPool/initJumpTableInfo into startFunction, removing them
   from the MachineCodeEmitter interface, and reducing the amount of target-
   specific code.
3. Change the JITEmitter so that it allocates constantpools and jump tables
   *right* next to the functions that they belong to, instead of in a separate
   pool of memory.  This makes all memory for a function be contiguous, and
   means the JITEmitter only tracks one block of memory now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28065 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-02 23:22:24 +00:00
Nate Begeman
a11a92976a Remove some stuff from the README 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28063 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-02 22:43:31 +00:00
Chris Lattner
f5d438c1f0 Do not make the JIT memory manager manage the memory for globals. Instead 
just have the JIT malloc them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28062 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-02 21:57:51 +00:00
Chris Lattner
a726c7f1fd Minor cleanups, no functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28061 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-02 21:44:14 +00:00
Chris Lattner
d3f0aefc33 Fix a purely hypothetical problem (for now): emitWord emits in the host 
byte format.  This doesn't work when using the code emitter in a cross target
environment.  Since the code emitter is only really used by the JIT, this
isn't a current problem, but if we ever start emitting .o files, it would be.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28060 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-02 19:14:47 +00:00
Chris Lattner
43b429b059 Refactor the machine code emitter interface to pull the pointers for the current 
code emission location into the base class, instead of being in the derived classes.

This change means that low-level methods like emitByte/emitWord now are no longer
virtual (yaay for speed), and we now have a framework to support growable code
segments.  This implements feature request #1 of PR469.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28059 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-02 18:27:26 +00:00
Nate Begeman
426cd7c25f Since we don't handle callee-save CRs right yet, don't allocate them. Also 
don't step on R11 in the middle of a function when saving and restoring CRs


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28058 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-02 17:37:31 +00:00
Nate Begeman
9d51eeb8bc Print function number instead of name 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28057 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-02 17:36:46 +00:00
Nate Begeman
6e0f386896 Hooray, everyone now uses the same printBasicBlockLabel implementation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28056 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-02 17:34:51 +00:00
Chris Lattner
b0cc79d45b Remove dead method 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28055 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-02 17:20:28 +00:00
Chris Lattner
608c189534 There is no reason to use a virtual method to store this word. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28053 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-02 17:16:20 +00:00
Chris Lattner
3a9cfbaf86 Remove the debug machine code emitter. The "FilePrinterEmitter" is more 
useful for debugging.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28051 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-02 16:59:24 +00:00
Nate Begeman
cdf38c4edb Extend printBasicBlockLabel a bit so that it can be used to print all 
basic block labels, consolidating the code to do so in one place for each
target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28050 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-02 05:37:32 +00:00
Nate Begeman
5425267e84 Update the PPC compilation callback code to not need weird abi-violating 
prologs and epilogs, keep all the asm in one place, and remove use of
compiler builtin functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28049 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-02 04:50:05 +00:00
Chris Lattner
b3674e4753 Add pass ID's for various passes, so they can be AddRequiredID. Patch by 
Domagoj Babic!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28048 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-02 04:24:36 +00:00
Jeff Cohen
51b776d259 De-virtualize SwitchSection. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28047 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-02 03:58:45 +00:00
Jeff Cohen
c6a057b04d De-virtualize EmitZeroes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28046 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-02 03:46:13 +00:00
Jeff Cohen
4f1ea1e9d9 Finish support for Microsoft ML/MASM. May still be a few rough edges. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28045 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-02 03:11:50 +00:00
Jeff Cohen
c884db47f1 Make Intel syntax mode friendlier to Microsoft ML assembler (still needs more work). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28044 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-02 01:16:28 +00:00
Chris Lattner
229924a79f Fix a latent bug that my spiller patch last week exposed: we were leaving 
instructions in the virtregfolded map that were deleted.  Because they
were deleted, newly allocated instructions could end up at the same address,
magically finding themselves in the map.  The solution is to remove entries
from the map when we delete the instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28041 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-01 22:03:24 +00:00
Chris Lattner
8a18c13fa5 When promoting a load to a reg-reg copy, where the load was a previous 
instruction folded with spill code, make sure the remove the load from
the virt reg folded map.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28040 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-01 21:17:10 +00:00
Chris Lattner
35f2705e3d Remove previous patch, which wasn't quite right. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28039 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-01 21:16:03 +00:00
Chris Lattner
de321a8014 Put PHI/INLINEASM into the correct namespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28037 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-01 17:00:49 +00:00
Evan Cheng
22608c2d1f Dis-favor stores more 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28035 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-01 09:20:44 +00:00
Evan Cheng
f229a5d4be Bottom up register-pressure reduction scheduler now pushes store operations 
up the schedule. This helps code that looks like this:

loads ...
computations (first set) ...
stores (first set) ...
loads
computations (seccond set) ...
stores (seccond set) ...

Without this change, the stores and computations are more likely to
interleave:

loads ...
loads ...
computations (first set) ...
computations (second set) ...
computations (first set) ...
stores (first set) ...
computations (second set) ...
stores (stores set) ...

This can increase the number of spills if we are unlucky.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28033 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-01 09:14:40 +00:00
Evan Cheng
3766d66b91 Didn't mean ScheduleDAGList.cpp to make the last checkin. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28030 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-01 08:56:34 +00:00
Evan Cheng
10dbd3ead8 Remove temp. option -spiller-check-liveout, it didn't cause any failure nor performance regressions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28029 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-01 08:54:57 +00:00
Chris Lattner
99f2632b4b Remove %'s from register names when in intel mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28027 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-01 05:53:50 +00:00
Chris Lattner
c80c43eee0 Format #APP lines a bit nicer 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28026 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-01 04:11:03 +00:00
Evan Cheng
200370fb56 Local spiller kills a store if the folded restore is turned into a copy. 
But this is incorrect if the spilled value live range extends beyond the
current BB.
It is currently controlled by a temporary option -spiller-check-liveout.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28024 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-30 08:41:47 +00:00
Jeff Cohen
10a59ce701 Mingw32 patches supplied by Anton Korobeynikov. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28023 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-29 18:41:44 +00:00
Chris Lattner
25c344a758 Remove a bogus transformation. This fixes SingleSource/UnitTests/2006-01-23-InitializedBitField.c 
with some changes I have to the new CFE.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28022 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 23:33:20 +00:00
Evan Cheng
55c25f2a2f I can't spell: Register, not Regsiter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28021 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 23:19:39 +00:00
Evan Cheng
62f2700bcf Implemented x86 inline asm b, h, w, k modifiers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28020 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 23:11:40 +00:00
Chris Lattner
94046b4d10 Fix InstCombine/2006-04-28-ShiftShiftLongLong.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28019 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 22:21:41 +00:00
Chris Lattner
25b8b8cb2c Fix CodeGen/Generic/2006-04-28-Sign-extend-bool.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28017 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 21:56:10 +00:00
Evan Cheng
347d5f789a Initial caller side support (for CCC only, not FastCC) of 128-bit vector 
passing by value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28015 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 21:29:37 +00:00
Evan Cheng
3d48a90fbd Bare-bone X86 inline asm printer support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28014 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 21:19:05 +00:00
Evan Cheng
55d0fa1bfa Remove the temporary option: -no-isel-fold-inflight 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28012 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 18:54:11 +00:00
Evan Cheng
43f3bd310b Implement four-wide shuffle with 2 shufps if no more than two elements come 
from each vector. e.g.
        shuffle(G1, G2, 7, 1, 5, 2)
==>
        movaps _G2, %xmm0
        shufps $151, _G1, %xmm0
        shufps $216, %xmm0, %xmm0


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28011 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 07:03:38 +00:00
Chris Lattner
a0de843535 Fix PR743: emit -help output of a tool to cout, not cerr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28010 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 05:36:25 +00:00
Evan Cheng
020c41f21e TargetLowering::LowerArguments should return a VBIT_CONVERT of 
FORMAL_ARGUMENTS SDOperand in the return result vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28009 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 05:25:15 +00:00
Chris Lattner
ba1fc3daf7 Mapping of physregs can make it so that the designated and input physregs are 
the same.  In this case, don't emit a noop copy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28008 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 04:43:18 +00:00
Chris Lattner
ae74f55552 Fix Transforms/Reassociate/2006-04-27-ReassociateVector.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28007 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 04:14:49 +00:00
Evan Cheng
ed1492eaf5 Use movaps instead of movapd for spill / restore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28005 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 02:23:35 +00:00
Evan Cheng
552c4a8494 Added a temporary option -no-isel-fold-inflight to control whether a "inflight" 
node can be folded.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28003 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 02:09:19 +00:00
Chris Lattner
addc55af6c When we have a two-address instruction where the input cannot be clobbered 
and is already available, instead of falling back to emitting a load, fall
back to emitting a reg-reg copy.  This generates significantly better code
for some SSE testcases, as SSE has lots of two-address instructions and
none of them are read/modify/write.  As one example, this change does:

        pshufd %XMM5, XMMWORD PTR [%ESP + 84], 255
        xorps %XMM2, %XMM5
        cmpltps %XMM1, %XMM0
-       movaps XMMWORD PTR [%ESP + 52], %XMM0
-       movapd %XMM6, XMMWORD PTR [%ESP + 52]
+       movaps %XMM6, %XMM0
        cmpltps %XMM6, XMMWORD PTR [%ESP + 68]
        movapd XMMWORD PTR [%ESP + 52], %XMM6
        movaps %XMM6, %XMM0
        cmpltps %XMM6, XMMWORD PTR [%ESP + 36]
        cmpltps %XMM3, %XMM0
-       movaps XMMWORD PTR [%ESP + 20], %XMM0
-       movapd %XMM7, XMMWORD PTR [%ESP + 20]
+       movaps %XMM7, %XMM0
        cmpltps %XMM7, XMMWORD PTR [%ESP + 4]
        movapd XMMWORD PTR [%ESP + 20], %XMM7
        cmpltps %XMM4, %XMM0

... which is far better than a store followed by a load!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28001 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 01:46:50 +00:00
Chris Lattner
e481e8bc8f Add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27999 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 00:04:05 +00:00
Chris Lattner
217fde5255 Add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27998 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-27 21:40:57 +00:00
Chris Lattner
d929f06f4d Add support for inserting undef into a vector. This implements 
Transforms/InstCombine/vec_insert_to_shuffle.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27997 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-27 21:14:21 +00:00
Evan Cheng
fea89c14ec Make x86 isel lowering produce tailcall nodes. They are match to normal calls 
for now.

Patch contributed by Alexander Friedman.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27994 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-27 08:40:39 +00:00
Evan Cheng
43824e8216 A couple of new entries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27993 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-27 08:31:33 +00:00
Evan Cheng
2fdd95eee7 Support for passing 128-bit vector arguments via XMM registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27992 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-27 08:31:10 +00:00
Evan Cheng
f7179bb56e Insert a VBIT_CONVERT between a FORMAL_ARGUMENT node and its vector uses 
(VAND, VADD, etc.). Legalizer will assert otherwise.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27991 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-27 08:29:42 +00:00
Evan Cheng
5fb03ce905 Oops 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27989 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-27 05:44:50 +00:00
Evan Cheng
85e3800e42 Bug fix: not updating NumIntRegs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27988 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-27 05:35:28 +00:00
Chris Lattner
a83385fb7b Fix Regression/CodeGen/Generic/2006-04-26-SetCCAnd.ll and 
PR748.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27987 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-27 05:01:07 +00:00
Evan Cheng
eda65fa20b - Clean up formal argument lowering code. Prepare for vector pass by value work. 
- Fixed vararg support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27985 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-27 01:32:22 +00:00
Chris Lattner
634c76c08c Fix some nondeterminstic behavior in the mem2reg pass that (in addition to 
nondeterminism being bad) could cause some trivial missed optimizations (dead
phi nodes being left around for later passes to clean up).

With this, llvm-gcc4 now bootstraps and correctly compares.  I don't know
why I never tried to do it before... :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27984 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-27 01:14:43 +00:00
Chris Lattner
97156e7984 Implement Transforms/IndVarsSimplify/complex-scev.ll, a case where we didn't 
recognize some simple affine IV's.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27982 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-26 18:34:07 +00:00
Evan Cheng
9191dbba8e Fix fastcc failures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27980 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-26 18:21:31 +00:00
Evan Cheng
1bc7804e4c Switching over FORMAL_ARGUMENTS mechanism to lower call arguments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27975 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-26 01:20:17 +00:00
Evan Cheng
3b0d286d00 Don't forget return void. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27974 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-25 23:03:35 +00:00
Nate Begeman
add19dc20a Keep the stack from on darwin 16-byte aligned. This fixes many JIT 
failres.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27973 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-25 20:54:26 +00:00
Evan Cheng
0db9fe6775 Separate LowerOperation() into multiple functions, one per opcode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27972 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-25 20:13:52 +00:00
Andrew Lenharth
94a8d7785c slightly more useful error message 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27971 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-25 19:33:41 +00:00
Andrew Lenharth
ceeb17d8d8 better c99 struct handling 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27970 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-25 19:33:23 +00:00
Evan Cheng
3d1be07141 Fix a typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27968 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-25 17:48:41 +00:00
Nate Begeman
c34b22716b Fix a warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27967 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-25 17:46:32 +00:00
Nate Begeman
b3f70d7d55 No functionality changes, but cleaner code with correct comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27966 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-25 04:45:59 +00:00
Evan Cheng
a2137b592e Explicitly specify result type for def : Pat<> patterns (if it produces a vector 
result). Otherwise tblgen will pick the default (v16i8 for 128-bit vector).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27965 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-25 00:50:01 +00:00
Evan Cheng
a7fc64222a Added X86 SSE2 intrinsics which can be represented as vector_shuffles. This is 
a temporary workaround for the 2-wide vector_shuffle problem (i.e. its mask
would have type v2i32 which is not legal).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27964 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-24 23:34:56 +00:00
Evan Cheng
d7ec518927 Add a new entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27963 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-24 23:30:10 +00:00
Evan Cheng
37d1d9bc66 Special case handling two wide build_vector(0, x). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27961 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-24 22:58:52 +00:00
Evan Cheng
64e9769339 Some missing movlps, movhps, movlpd, and movhpd patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27960 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-24 21:58:20 +00:00
Evan Cheng
c78d3b43f5 A little bit more build_vector enhancement for v8i16 cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27959 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-24 18:01:45 +00:00
Evan Cheng
86661f4879 Remove a completed entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27958 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-24 17:38:16 +00:00
Evan Cheng
49bca8536c MakeMIInst() should handle jump table index operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27955 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-24 05:37:35 +00:00
Chris Lattner
57a6c135f2 Add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27954 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-23 19:47:09 +00:00
Evan Cheng
9293451e3f MOVL shuffle (i.e. movd or movss / movsd from memory) of undef, V2 == V2 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27953 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-23 06:35:19 +00:00
Nate Begeman
9453eea49b Fix the updating of the machine CFG when a PHI node was in a successor of 
the jump table's range check block.  This re-enables 100% dense jump tables
by default on PPC & x86


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27952 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-23 06:26:20 +00:00
Nate Begeman
3700a4d3a2 Code cleanup associated with jump tables, thanks to Chris for noticing 
these.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27950 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-22 23:52:35 +00:00
Nate Begeman
05f9466cf0 Turn of jump tables for a bit, there are still some issues to work out with 
updating the machine CFG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27949 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-22 23:51:56 +00:00
Nate Begeman
a766765358 Optimized stores to the constant pool, while cool, are unnecessary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27948 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-22 22:31:45 +00:00
Nate Begeman
37efe67645 JumpTable support! What this represents is working asm and jit support for 
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27947 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-22 18:53:45 +00:00
Evan Cheng
1900c012f5 Don't do all the lowering stuff for 2-wide build_vector's. Also, minor optimization for shuffle of undef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27946 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-22 08:34:05 +00:00
Evan Cheng
a083af14c8 Fix a performance regression. Use {p}shuf* when there are only two distinct elements in a build_vector. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27945 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-22 06:21:46 +00:00
Chris Lattner
ea4a9c575f Teach the JIT how to relocate LI, this fixes the JIT on Prolangs-C/TimberWolfMC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27943 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-22 06:17:56 +00:00
Chris Lattner
b003d76cb3 Fix JIT support for static ctors, which was apparently completely broken! 
This allows Prolangs-C++/city and probably a bunch of other stuff to work
well with the new front-end


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27941 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-22 05:02:46 +00:00
Evan Cheng
ba05f728b5 Revamp build_vector lowering to take advantage of movss and movd instructions. 
movd always clear the top 96 bits and movss does so when it's loading the
value from memory.
The net result is codegen for 4-wide shuffles is much improved. It is near
optimal if one or more elements is a zero. e.g.

__m128i test(int a, int b) {
  return _mm_set_epi32(0, 0, b, a);
}

compiles to

_test:
	movd 8(%esp), %xmm1
	movd 4(%esp), %xmm0
	punpckldq %xmm1, %xmm0
	ret

compare to gcc:

_test:
	subl	$12, %esp
	movd	20(%esp), %xmm0
	movd	16(%esp), %xmm1
	punpckldq	%xmm0, %xmm1
	movq	%xmm1, %xmm0
	movhps	LC0, %xmm0
	addl	$12, %esp
	ret

or icc:

_test:
        movd      4(%esp), %xmm0                                #5.10
        movd      8(%esp), %xmm3                                #5.10
        xorl      %eax, %eax                                    #5.10
        movd      %eax, %xmm1                                   #5.10
        punpckldq %xmm1, %xmm0                                  #5.10
        movd      %eax, %xmm2                                   #5.10
        punpckldq %xmm2, %xmm3                                  #5.10
        punpckldq %xmm3, %xmm0                                  #5.10
        ret                                                     #5.10

There are still room for improvement, for example the FP variant of the above example:

__m128 test(float a, float b) {
  return _mm_set_ps(0.0, 0.0, b, a);
}

_test:
	movss 8(%esp), %xmm1
	movss 4(%esp), %xmm0
	unpcklps %xmm1, %xmm0
	xorps %xmm1, %xmm1
	movlhps %xmm1, %xmm0
	ret

The xorps and movlhps are unnecessary. This will require post legalizer optimization to handle.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27939 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-21 23:03:30 +00:00
Nate Begeman
d9993b0b2d Fix the comment 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27938 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-21 22:11:27 +00:00
Nate Begeman
6fcbd6961d Change the PPC JIT to use a Static relocation model 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27937 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-21 22:04:15 +00:00
Chris Lattner
6e68a7752b fix thinko 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27935 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-21 21:05:22 +00:00
Chris Lattner
3e663a6c16 add some low-prio notes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27934 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-21 21:03:21 +00:00
Chris Lattner
4a1cd9c61e The BFS scheduler is apparently nondeterminstic (causes many llvmgcc bootstrap 
miscompares).  Switch RISC targets to use the list-td scheduler, which isn't.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27933 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-21 17:16:16 +00:00
Chris Lattner
a5d824e90c Remove a hack required by V9. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27931 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-21 15:33:35 +00:00
Chris Lattner
ef027f940c Fix a couple more memory issues 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27930 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-21 15:32:26 +00:00
Evan Cheng
017dcc6e55 Now generating perfect (I think) code for "vector set" with a single non-zero 
scalar value.

e.g.
        _mm_set_epi32(0, a, 0, 0);
==>
	movd 4(%esp), %xmm0
	pshufd $69, %xmm0, %xmm0

        _mm_set_epi8(0, 0, 0, 0, 0, a, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
==>
	movzbw 4(%esp), %ax
	movzwl %ax, %eax
	pxor %xmm0, %xmm0
	pinsrw $5, %eax, %xmm0


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27923 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-21 01:05:10 +00:00
Chris Lattner
fedced7bc3 Fix a really subtle and obnoxious memory bug that caused issues with an 
llvm-gcc4 boostrap.  Whenever a node is deleted by the dag combiner, it
*must* be returned by the visit function, or the dag combiner will not
know that the node has been processed (and will, e.g., send it to the
target dag combine xforms).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27922 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-20 23:55:59 +00:00
Chris Lattner
df4f226cdc Fix Transforms/ScalarRepl/2006-04-20-PromoteCrash.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27912 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-20 20:48:50 +00:00
Chris Lattner
ba2194ae84 Fix the CodeGen/PowerPC/buildvec_canonicalize.ll regression last night. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27908 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-20 19:01:30 +00:00
Chris Lattner
879acefed5 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27907 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-20 18:49:28 +00:00
Chris Lattner
a29526275b remove some v9 specific code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27900 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-20 18:33:11 +00:00
Chris Lattner
1b87c42c82 This field no longer exists 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27899 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-20 18:32:41 +00:00
Chris Lattner
060054b9d9 Remove this obsolete file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27895 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-20 18:16:45 +00:00
Chris Lattner
02e5f8dcda Remove some of the obvious V9-specific cruft 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27893 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-20 18:08:53 +00:00
Chris Lattner
2706983c48 This target is no longer built. The ,v files now live in the reoptimizer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27885 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-20 17:15:44 +00:00
Andrew Lenharth
7a31b975fb Make code match cvs commit message :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27881 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-20 15:41:37 +00:00
Andrew Lenharth
8117f9a40e If we can convert the return pointer type into an integer that IntPtrType 
can be converted to losslessly, we can continue the conversion to a direct call.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27880 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-20 14:56:47 +00:00
Evan Cheng
39623daef6 - Added support to turn "vector clear elements", e.g. pand V, <-1, -1, 0, -1> 
to a vector shuffle.
- VECTOR_SHUFFLE lowering change in preparation for more efficient codegen
of vector shuffle with zero (or any splat) vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27875 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-20 08:58:49 +00:00
Evan Cheng
44f1f09b4e Turn a VAND into a VECTOR_SHUFFLE is applicable. 
DAG combiner can turn a VAND V, <-1, 0, -1, -1>, i.e. vector clear elements,
into a vector shuffle with a zero vector. It only does so when TLI tells it
the xform is profitable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27874 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-20 08:56:16 +00:00
Chris Lattner
0231007269 Make sure that the new instructions selected have the right type. This fixes 
CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27868 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-20 05:58:10 +00:00
Chris Lattner
62b5772959 Implement folding of a bunch of binops with undef 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27863 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-20 05:39:12 +00:00
Evan Cheng
72cd9a9439 Handle v2i64 BUILD_VECTOR custom lowering correctly. v2i64 is a legal type, 
but i64 is not. If possible, change a i64 op to a f64 (e.g. load, constant)
and then cast it back.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27849 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-20 00:11:39 +00:00
Evan Cheng
94fe5eb14a isSplatMask() bug: first element can be an undef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27847 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-19 23:28:59 +00:00
Chris Lattner
89a1b380a4 Simplify some code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27846 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-19 23:17:50 +00:00
Evan Cheng
80d428c370 - Added support to do aribitrary 4 wide shuffle with no more than three 
instructions.
- Fixed a commute vector_shuff bug.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27845 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-19 22:48:17 +00:00
Evan Cheng
fd111b5be5 Prefer {p}unpack* and mov*dup over {p}shuf* as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27844 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-19 21:15:24 +00:00
Evan Cheng
f5e1dc278b Renamed AddedCost to AddedComplexity. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27843 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-19 20:38:28 +00:00
Evan Cheng
2dadaea5d2 - Renamed AddedCost to AddedComplexity. 
- Added more movhlps and movlhps patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27842 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-19 20:37:34 +00:00
Evan Cheng
533a0aa9ba Commute vector_shuffle to match more movlhps, movlp{s|d} cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27840 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-19 20:35:22 +00:00
Evan Cheng
f66a094cac More mov{h|l}p{d|s} patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27836 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-19 18:20:17 +00:00
Evan Cheng
cc0e98c8ed - More mov{h|l}ps patterns. 
- Increase cost (complexity) of patterns which match mov{h|l}ps ops. These
  are preferred over shufps in most cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27835 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-19 18:11:52 +00:00
Evan Cheng
5941320c0d Allow "let AddedCost = n in" to increase pattern complexity. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27834 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-19 18:07:24 +00:00
Chris Lattner
8cc5ffb27f add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27832 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-19 16:22:38 +00:00
Andrew Lenharth
9df47b5928 Another simple case type merge case to try 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27831 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-19 15:34:34 +00:00
Andrew Lenharth
613926904f deal with memchr 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27830 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-19 15:34:02 +00:00
Andrew Lenharth
5e091f3e32 friendlier error message 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27829 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-19 15:33:35 +00:00
Chris Lattner
bf9b3716ed add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27828 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-19 05:55:06 +00:00
Chris Lattner
ff5cdc2ccd Add a note. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27827 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-19 05:53:27 +00:00
Andrew Lenharth
92e2196f0b stupid stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27821 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-19 03:45:25 +00:00
Andrew Lenharth
1c212dec24 I understand now. Shoot. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27819 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 22:36:11 +00:00
Evan Cheng
f0d4e3d7c0 - PEXTRW cannot take a memory location as its first source operand. 
- PINSRWrmi encoding bug.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27818 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 21:59:43 +00:00
Evan Cheng
f463f51161 SHUFP{S|D}, PSHUF* encoding bugs. Left out the mask immediate operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27817 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 21:56:36 +00:00
Evan Cheng
b7a5c527ae Name change for clarity sake 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27816 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 21:55:35 +00:00
Evan Cheng
a52b214f56 Encoding bug: CMPPSrmi, CMPPDrmi dropped operand 2 (condtion immediate). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27815 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 21:31:08 +00:00
Evan Cheng
7b7bd57abd Name change for clarity sake 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27814 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 21:29:50 +00:00
Evan Cheng
fb2a3b2964 Left a pattern out 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27813 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 21:29:08 +00:00
Andrew Lenharth
a544266db7 llvm.memc* improvements. helps PA a lot in some specmarks 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27812 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 20:59:52 +00:00
Andrew Lenharth
2dbf23afb4 llvm.memc* improvements. helps PA a lot in some specmarks 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27811 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 19:54:11 +00:00
Chris Lattner
80f362a48f These are correctly encoded by the JIT. I checked :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27810 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 19:03:38 +00:00
Chris Lattner
87140126e8 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27809 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 18:30:19 +00:00
Chris Lattner
0090120c2b Fix a crash on: 
void foo2(vector float *A, vector float *B) {
  vector float C = (vector float)vec_cmpeq(*A, *B);
  if (!vec_any_eq(*A, *B))
    *B = (vector float){0,0,0,0};
  *A = C;
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27808 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 18:28:22 +00:00
Evan Cheng
df2a1908b2 Fixed an encoding bug: movd from XMM to R32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27807 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 18:19:00 +00:00
Chris Lattner
f70f8d91a7 pretty print node name 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27806 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 18:05:58 +00:00
Chris Lattner
90564f26d1 Implement an important entry from README_ALTIVEC: 
If an altivec predicate compare is used immediately by a branch, don't
use a (serializing) MFCR instruction to read the CR6 register, which requires
a compare to get it back to CR's.  Instead, just branch on CR6 directly. :)

For example, for:
void foo2(vector float *A, vector float *B) {
  if (!vec_any_eq(*A, *B))
    *B = (vector float){0,0,0,0};
}

We now generate:

_foo2:
        mfspr r2, 256
        oris r5, r2, 12288
        mtspr 256, r5
        lvx v2, 0, r4
        lvx v3, 0, r3
        vcmpeqfp. v2, v3, v2
        bne cr6, LBB1_2 ; UnifiedReturnBlock
LBB1_1: ; cond_true
        vxor v2, v2, v2
        stvx v2, 0, r4
        mtspr 256, r2
        blr
LBB1_2: ; UnifiedReturnBlock
        mtspr 256, r2
        blr

instead of:

_foo2:
        mfspr r2, 256
        oris r5, r2, 12288
        mtspr 256, r5
        lvx v2, 0, r4
        lvx v3, 0, r3
        vcmpeqfp. v2, v3, v2
        mfcr r3, 2
        rlwinm r3, r3, 27, 31, 31
        cmpwi cr0, r3, 0
        beq cr0, LBB1_2 ; UnifiedReturnBlock
LBB1_1: ; cond_true
        vxor v2, v2, v2
        stvx v2, 0, r4
        mtspr 256, r2
        blr
LBB1_2: ; UnifiedReturnBlock
        mtspr 256, r2
        blr

This implements CodeGen/PowerPC/vec_br_cmp.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27804 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 17:59:36 +00:00
Chris Lattner
3be29059ab move some stuff around, clean things up 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27802 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 17:52:36 +00:00
Chris Lattner
993c897390 Teach the codegen about instructions used for SSE spill code, allowing it 
to optimize cases where it has to spill a lot


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27801 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 16:44:51 +00:00
Chris Lattner
cea2aa77eb Use vmladduhm to do v8i16 multiplies which is faster and simpler than doing 
even/odd halves.  Thanks to Nate telling me what's what.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27793 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 04:28:57 +00:00
Chris Lattner
19a815238e Implement v16i8 multiply with this code: 
vmuloub v5, v3, v2
        vmuleub v2, v3, v2
        vperm v2, v2, v5, v4

This implements CodeGen/PowerPC/vec_mul.ll.  With this, v16i8 multiplies are
6.79x faster than before.

Overall, UnitTests/Vector/multiplies.c is now 2.45x faster with LLVM than with
GCC.

Remove the 'integer multiplies' todo from the README file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27792 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 03:57:35 +00:00
Evan Cheng
4980467476 Correct comments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27790 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 03:45:01 +00:00
Chris Lattner
72dd9bdcc5 Lower v8i16 multiply into this code: 
li r5, lo16(LCPI1_0)
        lis r6, ha16(LCPI1_0)
        lvx v4, r6, r5
        vmulouh v5, v3, v2
        vmuleuh v2, v3, v2
        vperm v2, v2, v5, v4

where v4 is:
LCPI1_0:                                        ;  <16 x ubyte>
        .byte   2
        .byte   3
        .byte   18
        .byte   19
        .byte   6
        .byte   7
        .byte   22
        .byte   23
        .byte   10
        .byte   11
        .byte   26
        .byte   27
        .byte   14
        .byte   15
        .byte   30
        .byte   31

This is 5.07x faster on the G5 (measured) than lowering to scalar code +
loads/stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27789 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 03:43:48 +00:00
Chris Lattner
e7c768ea24 Custom lower v4i32 multiplies into a cute sequence, instead of having legalize 
scalarize the sequence into 4 mullw's and a bunch of load/store traffic.

This speeds up v4i32 multiplies 4.1x (measured) on a G5.  This implements
PowerPC/vec_mul.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27788 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 03:24:30 +00:00
Evan Cheng
74e955d931 Another entry 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27786 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 01:22:57 +00:00
Evan Cheng
7fa094a261 Another entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27784 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 00:21:01 +00:00
Evan Cheng
cdfc3c82a7 Use movss to insert_vector_elt(v, s, 0). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27782 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 22:45:49 +00:00
Chris Lattner
fd6bdf0b0f Turn x86 unaligned load/store intrinsics into aligned load/store instructions 
if the pointer is known aligned.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27781 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 22:26:56 +00:00
Chris Lattner
80edfb3af5 Fix handling of calls in functions that use vectors. This fixes a crash on 
the code in GCC PR26546.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27780 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 22:10:08 +00:00
Evan Cheng
5edb8d270c Use two pinsrw to insert an element into v4i32 / v4f32 vector. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27779 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 22:04:06 +00:00
Chris Lattner
22fcbb1320 remove done item 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27778 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 21:52:03 +00:00
Chris Lattner
f9568d8700 Don't diddle VRSAVE if no registers need to be added/removed from it. This 
allows us to codegen functions as:

_test_rol:
        vspltisw v2, -12
        vrlw v2, v2, v2
        blr

instead of:

_test_rol:
        mfvrsave r2, 256
        mr r3, r2
        mtvrsave r3
        vspltisw v2, -12
        vrlw v2, v2, v2
        mtvrsave r2
        blr

Testcase here: CodeGen/PowerPC/vec_vrsave.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27777 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 21:48:13 +00:00
Chris Lattner
48d7c069c7 Add a MachineInstr::eraseFromParent convenience method. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27775 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 21:35:41 +00:00
Evan Cheng
23b72005fa Encoding bug 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27773 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 21:33:57 +00:00
Chris Lattner
402504b1ba Vectors that are known live-in and live-out are clearly already marked in 
the vrsave register for the caller.  This allows us to codegen a function as:

_test_rol:
        mfspr r2, 256
        mr r3, r2
        mtspr 256, r3
        vspltisw v2, -12
        vrlw v2, v2, v2
        mtspr 256, r2
        blr

instead of:

_test_rol:
        mfspr r2, 256
        oris r3, r2, 40960
        mtspr 256, r3
        vspltisw v0, -12
        vrlw v2, v0, v0
        mtspr 256, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27772 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 21:22:06 +00:00
Chris Lattner
939274fcfd Prefer to allocate V2-V5 before V0,V1. This lets us generate code like this: 
vspltisw v2, -12
        vrlw v2, v2, v2

instead of:

        vspltisw v0, -12
        vrlw v2, v0, v0

when a function is returning a value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27771 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 21:19:12 +00:00
Chris Lattner
369503f841 Move some knowledge about registers out of the code emitter into the register info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27770 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 21:07:20 +00:00
Chris Lattner
f7d2372b74 Use a small table instead of macros to do this conversion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27769 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 20:59:25 +00:00
Evan Cheng
c575ca22ea Implement v8i16, v16i8 splat using unpckl + pshufd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27768 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 20:43:08 +00:00
Chris Lattner
b2be4032c5 implement returns of a vector, testcase here: CodeGen/X86/vec_return.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27767 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 20:32:50 +00:00
Chris Lattner
8d5a894501 Codegen insertelement with constant insertion points as scalar_to_vector 
and a shuffle.  For this:

void %test2(<4 x float>* %F, float %f) {
        %tmp = load <4 x float>* %F             ; <<4 x float>> [#uses=2]
        %tmp3 = add <4 x float> %tmp, %tmp              ; <<4 x float>> [#uses=1]
        %tmp2 = insertelement <4 x float> %tmp3, float %f, uint 2               ; <<4 x float>> [#uses=2]
        %tmp6 = add <4 x float> %tmp2, %tmp2            ; <<4 x float>> [#uses=1]
        store <4 x float> %tmp6, <4 x float>* %F
        ret void
}

we now get this on X86 (which will get better):

_test2:
        movl 4(%esp), %eax
        movaps (%eax), %xmm0
        addps %xmm0, %xmm0
        movaps %xmm0, %xmm1
        shufps $3, %xmm1, %xmm1
        movaps %xmm0, %xmm2
        shufps $1, %xmm2, %xmm2
        unpcklps %xmm1, %xmm2
        movss 8(%esp), %xmm1
        unpcklps %xmm1, %xmm0
        unpcklps %xmm2, %xmm0
        addps %xmm0, %xmm0
        movaps %xmm0, (%eax)
        ret

instead of:

_test2:
        subl $28, %esp
        movl 32(%esp), %eax
        movaps (%eax), %xmm0
        addps %xmm0, %xmm0
        movaps %xmm0, (%esp)
        movss 36(%esp), %xmm0
        movss %xmm0, 8(%esp)
        movaps (%esp), %xmm0
        addps %xmm0, %xmm0
        movaps %xmm0, (%eax)
        addl $28, %esp
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27765 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 19:21:01 +00:00
Chris Lattner
dbce85dedf Make sure to check splats of every constant we can, handle splat(31) by 
being a bit more clever, add support for odd splats from -31 to -17.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27764 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 18:09:22 +00:00
Evan Cheng
51c9c43656 Incorrect foldMemoryOperand entries 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27763 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 18:06:12 +00:00
Evan Cheng
083248e143 Errors in patterns preventing load folding 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27762 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 18:05:01 +00:00
Jeff Cohen
3c280bf4d1 Add checks for __OpenBSD__. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27761 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 17:55:41 +00:00
Chris Lattner
bdd558cd94 Teach the ppc backend to use rol and vsldoi to generate splatted constants. 
This implements vec_constants.ll:test_vsldoi and test_rol


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27760 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 17:55:10 +00:00
Chris Lattner
966083fd1a add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27758 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 17:29:41 +00:00
Evan Cheng
5001ea1078 FP SETOLT, SETOLT, SETUGE, SETUGT conditions were implemented incorrectly 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27755 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 07:24:10 +00:00
Chris Lattner
6876e66e5d Make some code more general, adding support for constant formation of several 
new patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27754 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 06:58:41 +00:00
Chris Lattner
c408382eca Learn how to make odd splatted constants in range [17,29]. This implements 
PowerPC/vec_constants.ll:test_29.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27752 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 06:07:44 +00:00
Chris Lattner
4a998b9ca8 Pull some code out into a helper function. 
Effeciently codegen even splats in the range [-32,30].

This allows us to codegen <30,30,30,30> as:

        vspltisw v0, 15
        vadduwm v2, v0, v0

instead of as a cp load.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27750 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 06:00:21 +00:00
Chris Lattner
5913810b82 Implement a TODO: for any shuffle that can be viewed as a v4[if]32 shuffle, 
if it can be implemented in 3 or fewer discrete altivec instructions, codegen
it as such.  This implements Regression/CodeGen/PowerPC/vec_perf_shuffle.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27748 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 05:28:54 +00:00
Chris Lattner
cffeb86169 Regenerate with adjusted costs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27746 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 05:26:20 +00:00
Chris Lattner
586d6a808d Regenerate with correct offset 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27744 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 05:08:46 +00:00
Chris Lattner
c74e710000 Increase the opcodes by one each to disambiguate COPY from VMRGHW. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27742 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 00:47:48 +00:00
Chris Lattner
6703461f04 Check in a table, generated by llvm-PerfectShuffle, of optimal shuffles 
of various 4-element vectors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27739 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 00:37:02 +00:00
Evan Cheng
06aef15843 movduprm, movshduprm bugs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27734 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-16 18:11:28 +00:00
Evan Cheng
d8e8223ea1 Encoding bugs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27733 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-16 07:02:22 +00:00