Chris Lattner
a247685b30
fix the encoding of the "jump on *cx" family of instructions,
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rdar://8061602
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113343 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 04:30:51 +00:00
Jim Grosbach
4725ca746a
remove trailing whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113338 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 03:54:02 +00:00
Jim Grosbach
707fb648d2
remove obsolete comment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113337 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 03:51:44 +00:00
Jim Grosbach
e1e6d18786
disable for the moment while tracking down a few Thumb2-O0 failure that look
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related. (attempt deux, complete w/ test update this time)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113333 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 02:00:34 +00:00
Jim Grosbach
8b95dfe2b6
woops. need to update a test along with this.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113332 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 01:49:09 +00:00
Jim Grosbach
8a076eb79d
disable temporarily while sorting out a few test failures in Thumb2-O0 tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113331 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 01:47:49 +00:00
Jim Grosbach
0cfcf93c95
correct spill code to properly determine if dynamic stack realignment is
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present in the function and thus whether aligned load/store instructions can
be used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113323 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 00:26:59 +00:00
Jim Grosbach
72db182438
VFP/NEON load/store multiple instructions are addrmode4, not 5.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113322 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 00:25:50 +00:00
Jim Grosbach
447e7ac913
To shrink a t2LDM instruction to the 16-bit wide tLDM instruction, the base
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register must be one of the destination registers for the load. Otherwise,
the tLDM instruction will write-back to the base register, which isn't what's
desired (otherwise, we'd have a t2LDM_UPD instead).
rdar://8394087
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113297 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 22:30:53 +00:00
Jim Grosbach
e2f70d1724
grammar tweak
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113289 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 21:30:25 +00:00
Bruno Cardoso Lopes
90462b4ae1
Factor out some x86 vector shuffle rewriting and add comments about the direction the shuffle lowering is heading to
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113286 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 21:03:14 +00:00
Bruno Cardoso Lopes
0d1340b181
Move code around to prepare for moving some of the logic together to another function
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113267 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 20:20:27 +00:00
Bill Wendling
d8dd5757e0
Add an MVT::x86mmx type. It will take the place of all current MMX vector types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113261 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 20:03:56 +00:00
Evan Cheng
dc0b06c815
Remove a dead comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113259 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 20:01:10 +00:00
Chris Lattner
6cd5db41f7
hopefully fix a problem building on cygwin-1.5
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113255 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 19:50:53 +00:00
Bruno Cardoso Lopes
58277b17c3
decouple MMX check from regular splat checks. Some refactoring is coming, and MMX should be left alone to be easily removed after moving to intrinsics
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113247 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 18:41:45 +00:00
Bruno Cardoso Lopes
673bf78bb5
Remove now useless check, because the code can be matched below, no need to leave it for isel
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113242 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 18:29:03 +00:00
Bruno Cardoso Lopes
67fc1e76d4
Minor change. Since the checks are equivalent, use isMMX
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113239 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 18:24:00 +00:00
Nick Lewycky
f7a3c50183
Create PTX backend. Patch by Che-Liang Chiou!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113235 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 18:14:24 +00:00
Dale Johannesen
86097c384f
Add patterns for MMX that use the new intrinsics.
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Enable palignr intrinsic.
These may need adjustment for a new VT in due course.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113233 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 18:10:56 +00:00
Bruno Cardoso Lopes
70e81f1517
Remove unused target specific node
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113224 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 17:38:55 +00:00
Benjamin Kramer
aceeb3a4e2
Don't leak the old operand when transforming "sldt" into "sldtw".
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113200 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 14:40:58 +00:00
Chris Lattner
e9e0fc5eed
add missing cmov aliases, this resolves rdar://8208499
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113189 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 00:05:45 +00:00
Chris Lattner
7d284de955
remove duplicated entry
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113188 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 23:57:24 +00:00
Chris Lattner
c5cebeb3cb
"sldt <mem>" is ambiguous in 64-bit mode, but should
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always be disambiguated as sldtw. sldtw and sldtq with
a mem operands have the same effect, but sldtw is more
compact. Force it to sldtw, resolving rdar://8017530
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113186 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 23:51:44 +00:00
Chris Lattner
d68c474ec5
fix rdar://8017621 - llvm-mc can't guess encoding for "push $(1000)"
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113184 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 23:40:56 +00:00
Chris Lattner
9389b60a03
fix the operand constraints of the immediate form of in/out,
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allowing unsigned 8-bit operands. This fixes rdar://8208481
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113182 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 23:29:05 +00:00
Chris Lattner
ce4a3355d9
in the case where an instruction only has one implementation
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of a mneumonic, report operand errors with better location
info. For example, we now report:
t.s:6:14: error: invalid operand for instruction
cwtl $1
^
but we fail for common cases like:
t.s:11:4: error: invalid operand for instruction
addl $1, $1
^
because we don't know if this is supposed to be the reg/imm or imm/reg
form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113178 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 22:11:18 +00:00
Chris Lattner
a008e8ac73
Now that we know if we had a total fail on the instruction mnemonic,
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give a more detailed error. Before:
t.s:11:4: error: unrecognized instruction
addl $1, $1
^
t.s:12:4: error: unrecognized instruction
f2efqefa $1
^
After:
t.s:11:4: error: invalid operand for instruction
addl $1, $1
^
t.s:12:4: error: invalid instruction mnemonic 'f2efqefa'
f2efqefa $1
^
This fixes rdar://8017912 - llvm-mc says "unrecognized instruction" when it means "invalid operands"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113176 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 21:54:15 +00:00
Chris Lattner
69c7249a6f
simplify the hacks around jrcxz.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113167 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 20:10:12 +00:00
Chris Lattner
ec6789f4f9
have tblgen detect when an instruction would have matched, but
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failed because a subtarget feature was not enabled. Use this to
remove a bunch of hacks from the X86AsmParser for rejecting things
like popfl in 64-bit mode. Previously these hacks weren't needed,
but were important to get a message better than "invalid instruction"
when used in the wrong mode.
This also fixes bugs where pushal would not be rejected correctly in
32-bit mode (just pusha).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113166 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 20:08:02 +00:00
Chris Lattner
79ed3f77e8
change MatchInstructionImpl to return an enum instead of bool.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113165 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 19:22:17 +00:00
Chris Lattner
0692ee676f
have AsmMatcherEmitter.cpp produce the hunk of code that gets included
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into the middle of the class, and rework how the different sections of
the generated file are conditionally included for simplicity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113163 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 19:11:01 +00:00
Roman Divacky
436c54a186
Redefine LOOP* instructions from I to Ii8PCRel as they take an i8 argument.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113158 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 18:43:14 +00:00
Chris Lattner
47ab90bfa8
random cleanups
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113157 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 18:32:06 +00:00
Chris Lattner
979b061819
remove some dead code. t2addrmode_imm8s4 is never used in a
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pattern, so there is no need to define a matching function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113122 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-05 22:51:11 +00:00
Chris Lattner
252b491875
cleanups.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113119 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-05 21:18:45 +00:00
Chris Lattner
f0f5780b39
update this.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113116 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-05 20:22:09 +00:00
Chris Lattner
beac75da37
implement rdar://6653118 - fastisel should fold loads where possible.
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Since mem2reg isn't run at -O0, we get a ton of reloads from the stack,
for example, before, this code:
int foo(int x, int y, int z) {
return x+y+z;
}
used to compile into:
_foo: ## @foo
subq $12, %rsp
movl %edi, 8(%rsp)
movl %esi, 4(%rsp)
movl %edx, (%rsp)
movl 8(%rsp), %edx
movl 4(%rsp), %esi
addl %edx, %esi
movl (%rsp), %edx
addl %esi, %edx
movl %edx, %eax
addq $12, %rsp
ret
Now we produce:
_foo: ## @foo
subq $12, %rsp
movl %edi, 8(%rsp)
movl %esi, 4(%rsp)
movl %edx, (%rsp)
movl 8(%rsp), %edx
addl 4(%rsp), %edx ## Folded load
addl (%rsp), %edx ## Folded load
movl %edx, %eax
addq $12, %rsp
ret
Fewer instructions and less register use = faster compiles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113102 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-05 02:18:34 +00:00
Chris Lattner
17aa68055b
zap dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113073 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 18:12:00 +00:00
Chris Lattner
89f87e8f5a
remove dead code, mblaze uses SelectAddrRegImm/SelectAddrRegReg,
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not SelectAddr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113072 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 18:02:47 +00:00
Bruno Cardoso Lopes
2eb63dfa0a
Remove the last bit of isShuffleMaskLegal checks and improve the comment regarding mmx shuffles
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113059 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 02:58:56 +00:00
Bruno Cardoso Lopes
828f6ae03c
make explicit that we not handle several mmx shuffles
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113058 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 02:50:13 +00:00
Bruno Cardoso Lopes
aace0f295b
Emit target specific nodes to handle palignr. Do not touch it for MMX versions yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113056 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 02:36:07 +00:00
Bruno Cardoso Lopes
c800c0d25f
Emit target specific nodes to handle splats starting at zero indicies
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113055 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 02:02:14 +00:00
Bruno Cardoso Lopes
bbfc31012b
Emit target specific nodes for isPSHUFHWMask and isPSHUFLWMask
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113050 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 01:36:45 +00:00
Bruno Cardoso Lopes
4c827f5ae1
Emit target specific nodes for isSHUFPMask
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113048 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 01:22:57 +00:00
Bruno Cardoso Lopes
d344f28b9d
Previous isMOVLMask matching already emits targets nodes, remove check
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113047 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 00:50:08 +00:00
Bruno Cardoso Lopes
e09abcd3c4
One more check from the original isShuffleMaskLegal goes away
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113045 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 00:46:16 +00:00
Bruno Cardoso Lopes
b733996110
Remove a duplicated but useless check that i've inserted in the previous commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113044 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 00:43:12 +00:00
Bruno Cardoso Lopes
a22c84571a
Refactor some code and remove the extra checks for unpckl_undef and unpckh_undef
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113043 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 00:39:43 +00:00
Bruno Cardoso Lopes
43c05744b5
Remove check for unpckh mask
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113035 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 23:32:47 +00:00
Bruno Cardoso Lopes
ef3adb3243
Remove check for unpckl mask
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113034 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 23:31:50 +00:00
Bruno Cardoso Lopes
7256e22f77
Inline isShuffleMaskLegal into LowerVECTOR_SHUFFLE, so we can start
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checking each standalone condition and decide whether emit target
specific nodes or remove the condition if it's already matched before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113031 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 23:24:06 +00:00
Bruno Cardoso Lopes
e8f279cbd4
Reapply considered harmfull part of rr112934 and r112942.
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"Use target specific nodes instead of relying in unpckl and
unpckh pattern fragments during isel time. Also place a
depth limit in getShuffleScalarElt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113020 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 22:09:41 +00:00
Dale Johannesen
caa9ba228d
Remove the rest of the nonexistent 64-bit AVX instructions.
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Bruno, please review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113014 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 21:23:00 +00:00
Bruno Cardoso Lopes
190d0a54c1
Reapply last harmless part of r112934, the pattern fragment to match X86Unpcklpd
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113009 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 20:44:26 +00:00
Bruno Cardoso Lopes
2a4460606e
Reintroduce a simple function refactoring done in r112934, also without any functionality changes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113008 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 20:20:02 +00:00
Bruno Cardoso Lopes
be8b084d8a
Reapply piecies of r112942 and r112934 which don't do
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functional changes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113007 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 20:10:35 +00:00
Bruno Cardoso Lopes
b3e0669b8e
Reapply Fix comment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113006 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 19:55:05 +00:00
Daniel Dunbar
3139422058
Revert r112934, "- Use specific nodes to match unpckl masks.", which introduced
...
some infinite loop and select failures.
- Apologies for eager reverting, but its branch day.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113000 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 19:38:11 +00:00
Daniel Dunbar
78541f258c
Revert r112938 "Fix comment", which depends on r112934, which introduced some
...
infinite loop and select failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112999 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 19:38:08 +00:00
Daniel Dunbar
a87ccce95b
Revert r112942, "Use punpckh and unpckh family of nodes instead of using unpckh
...
mask pattern fragment", which depends on r112934, which introduced some infinite
loop and select failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112998 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 19:38:05 +00:00
Jim Grosbach
65482b1bb8
Re-apply r112883:
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"For ARM stack frames that utilize variable sized objects and have either
large local stack areas or require dynamic stack realignment, allocate a
base register via which to access the local frame. This allows efficient
access to frame indices not accessible via the FP (either due to being out
of range or due to dynamic realignment) or the SP (due to variable sized
object allocation). In particular, this greatly improves efficiency of access
to spill slots in Thumb functions which contain VLAs."
r112986 fixed a latent bug exposed by the above.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112989 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 18:37:12 +00:00
Jim Grosbach
fc63300233
Check the local frame alignment for determining whether dynamic stack
...
alignment should be performed. Otherwise dynamic realignment may trigger
when the register allocator has already used the frame pointer as a general
purpose register. That is, we need to make sure that the list of reserved
registers doesn't change after register allocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112986 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 18:28:19 +00:00
Bob Wilson
f572191fe4
Finish converting the rest of the NEON VLD instructions to use pseudo-
...
instructions prior to regalloc. Since it's getting a little close to
the 2.8 branch deadline, I'll have to leave the rest of the instructions
handled by the NEONPreAllocPass for now, but I didn't want to leave half
of the VLD instructions converted and the other half not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112983 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 18:16:02 +00:00
Daniel Dunbar
6a8700301c
Revert "For ARM stack frames that utilize variable sized objects and have either", it is breaking oggenc with Clang for ARMv6.
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This reverts commit 8d6e29cfda270be483abf638850311670829ee65.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112962 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 15:26:42 +00:00
Benjamin Kramer
df3f25656d
Zap dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112955 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 12:13:18 +00:00
Bruno Cardoso Lopes
95f1e2d6b5
AVX doesn't support mm operations neither its instrinsics.
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The AVX versions of PALIGN and PABS* should only exist for
128-bit. Remove the unnecessary stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112944 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 02:08:45 +00:00
Bruno Cardoso Lopes
4b0c9f3e73
Use punpckh and unpckh family of nodes instead of using unpckh mask pattern fragment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112942 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 01:39:08 +00:00
Bob Wilson
eb0c3d3729
Replace NEON vabdl, vaba, and vabal intrinsics with combinations of the
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vabd intrinsic and add and/or zext operations. In the case of vaba, this
also avoids the need for a DAG combine pattern to combine vabd with add.
Update tests. Auto-upgrade the old intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112941 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 01:35:08 +00:00
Bruno Cardoso Lopes
01f0847ce8
Fix comment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112938 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 01:28:51 +00:00
Bruno Cardoso Lopes
5e5342b0a8
- Use specific nodes to match unpckl masks.
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- Teach getShuffleScalarElt how to handle more target
specific nodes, so the DAGCombine can make use of it.
- Add another hack to avoid the node update problem
during legalization. More description on the comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112934 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 01:24:00 +00:00
Eric Christopher
e5734105da
Simple branch instruction support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112923 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 00:35:47 +00:00
Jakob Stoklund Olesen
3061c4442e
Don't call Predicate_* from X86 target.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112921 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 00:35:18 +00:00
Jakob Stoklund Olesen
7853cd0bea
Remove Predicate_* calls from MBlaze and XCore
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112920 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 00:35:16 +00:00
Jakob Stoklund Olesen
7fa846f7d9
Remove Predicate_* calls from Mips
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112919 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 00:35:13 +00:00
Eric Christopher
56d2b72884
Add basic support for materializing constants (including fp) and
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stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112912 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 23:43:26 +00:00
Anton Korobeynikov
ace53f2fbc
Properly emit __chkstk call instead of __alloca on non-mingw windows targets.
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Patch by Cameron Esfahani!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112902 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 23:03:46 +00:00
Bruno Cardoso Lopes
ed5c711a6e
Move insertps mask decoding to header file
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112896 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 22:43:39 +00:00
Anton Korobeynikov
c7c62bb3ca
Revert win64 changes. They seem to be incomplete
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112885 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 22:31:32 +00:00
Jim Grosbach
1755b3964f
For ARM stack frames that utilize variable sized objects and have either
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large local stack areas or require dynamic stack realignment, allocate a
base register via which to access the local frame. This allows efficient
access to frame indices not accessible via the FP (either due to being out
of range or due to dynamic realignment) or the SP (due to variable sized
object allocation). In particular, this greatly improves efficiency of access
to spill slots in Thumb functions which contain VLAs.
rdar://7352504
rdar://8374540
rdar://8355680
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112883 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 22:29:01 +00:00
Anton Korobeynikov
2f4fad99ea
Properly allocate win64 shadow reg area.
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Patch by Jan Sjodin!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112875 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 22:16:28 +00:00
Bruno Cardoso Lopes
5594560766
Move decoding of insertps back to avoid unused warnings in x86 isel lowering, and fix movlhps/movhlps to decode 4 elements shuffles
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112869 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 21:51:11 +00:00
Dan Gohman
24bde5bce1
Don't narrow the load and store in a load+twiddle+store sequence unless
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there are clearly no stores between the load and the store. This fixes
this miscompile reported as PR7833.
This breaks the test/CodeGen/X86/narrow_op-2.ll optimization, which is
safe, but awkward to prove safe. Move it to X86's README.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112861 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 21:18:42 +00:00
Jim Grosbach
5c33f5bf67
trailing whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112852 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 19:52:39 +00:00
Jim Grosbach
3e234e7579
remove trailing whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112847 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 18:44:51 +00:00
Bruno Cardoso Lopes
6b1d0a3b36
Move x86 specific shuffle mask decoding to its own header, it's also going to be used elsewhere. Also trim trailing whitespaces
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112846 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 18:40:13 +00:00
Jim Grosbach
bb5a039b76
handle case where a register class is specified
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112842 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 18:18:52 +00:00
Jim Grosbach
e7c1416263
Now that register allocation properly considers reserved regs, simplify the
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ARM register class allocation order functions to take advantage of that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112841 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 18:14:29 +00:00
Jim Grosbach
5a0fabae5a
Mask out reserved registers when constructing the set of allocatable regs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112828 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 16:31:21 +00:00
Bob Wilson
82a9c8480e
Fill in a missing comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112826 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 16:17:29 +00:00
Bob Wilson
ffde080ae6
Convert VLD1 and VLD2 instructions to use pseudo-instructions until
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after regalloc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112825 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 16:00:54 +00:00
Bruno Cardoso Lopes
3722f007b6
Replace unpckl_undef and unpckh_undef matching with target specific opcodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112806 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 05:23:12 +00:00
Bruno Cardoso Lopes
dd69db858c
Move condition out to prepare for more matching
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112805 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 04:20:26 +00:00
Bruno Cardoso Lopes
ad10fb2b56
Remove checking for isUNPCKL_v_undef_Mask, the specific node is already emitted for it
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112804 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 03:57:58 +00:00
Bruno Cardoso Lopes
d00bfe1f8d
become more strict about when it's safe to use X86ISD::MOVLPS
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112799 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 02:35:51 +00:00
Eric Christopher
1f58741aab
Clang's -ccc-host-triple was ignoring the arch specifier on my triple,
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I don't need to implement this quite yet - and not for ConstantInt anyhow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112798 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 02:30:46 +00:00
Eric Christopher
1b61ef4b22
This should be TargetMaterializeConstant instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112795 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 01:48:11 +00:00
Eric Christopher
eaa204b2f8
One definition of isThumb is plenty, thanks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112793 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 01:39:14 +00:00