Commit Graph

29748 Commits

Author SHA1 Message Date
Ahmed Bougacha
6b96a388ed [AArch64] Don't force MVT::Untyped when selecting LD1LANEpost.
The result is either an Untyped reg sequence, on ldN with N > 1, or
just the type of the input vector, on ld1.  Don't force Untyped.
Instead, just use the type of the reg sequence.

This mirrors the behavior of createTuple, which feeds the LD1*_POST.

The narrow code path wasn't actually covered by tests, because V64
insert_vector_elt are widened to V128 before the LD1LANEpost combine
has the chance to run, usually.

The only case where it does run on V64 vectors is if the vector ops
legalizer ran.  So, tickle the code with a ctpop.

Fixes PR23265.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235243 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 23:43:33 +00:00
Ahmed Bougacha
ab017cbc27 Fix another typo in r235224 testcase. NFC.
Third time's the charm!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235242 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 23:38:46 +00:00
Andrew Kaylor
166679ef06 [WinEH] Fixes for a few cppeh failures.
Differential Review: http://reviews.llvm.org/D9065



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235239 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 23:05:43 +00:00
Ahmed Bougacha
7349765ddb [MemCpyOpt] Optimize double-storing by memset+memcpy.
A common idiom in some code is to do the following:

  memset(dst, 0, dst_size);
  memcpy(dst, src, src_size);

Some of the memset is redundant; instead, we can do:

  memcpy(dst, src, src_size);
  memset(dst + src_size, 0,
         dst_size <= src_size ? 0 : dst_size - src_size);

Original patch by: Joel Jones
Differential Revision: http://reviews.llvm.org/D498


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235232 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 22:20:57 +00:00
Pete Cooper
12a57fe1d3 AArch64: Add test for returning [2 x i64] in registers. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235228 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 21:31:25 +00:00
Rafael Espindola
fb118bd226 Compute A-B when A or B is weak.
Similar to r235222, but for the weak symbol case.

In an "ideal" assembler/object format an expression would always refer to the
final value and A-B would only be computed from a section in the same
comdat as A and B with A and B strong.

Unfortunately that is not the case with debug info on ELF, so we need an
heuristic.  Since we need an heuristic, we may as well use the same one as
gas:

* call weak_sym : produces a relocation, even if in the same section.
* A - weak_sym and weak_sym -A: don't produce a relocation if we can
  compute it.

This fixes pr23272 and changes the fix of pr22815 to match what gas does.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235227 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 21:15:17 +00:00
Ahmed Bougacha
b24498671a Fix typo in r235224 testcase. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235226 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 21:11:58 +00:00
Ahmed Bougacha
7ce2cb4b62 [AArch64] Avoid vector->load dependency cycles when creating LD1*post.
They would break the SelectionDAG.
Note that the opposite load->vector dependency is already obvious in:
  (LD1*post vec, ..)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235224 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 21:02:30 +00:00
Rafael Espindola
560d73a4cc Compute A-B if both A and B are in the same comdat section.
Part of pr23272.

A small annoyance with the assembly syntax we implement is that given an
expression there is no way to know if what is desired is the value of that
expression for the symbols in this file or for the final values of those
symbols in a link.

The first case is useful for use in sections that get discarded or ignored
if the section they are describing is discarded.

For axample, consider A-B where A and B are in the same comdat section.

We can compute the value of the difference in the section that is present in
the current .o and if that section survives to the final DSO the value will
still will be correct.

But the section is in a comdat. Another section from another object file
might be used istead. We know that that section will define A and B, but
we have no idea what the value of A-B might be.

In practice we have to assume that the intention is to compute the value
in the current section since otherwise the is no way to create something like
the debug aranges section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235222 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 20:05:17 +00:00
Pirama Arumuga Nainar
5c1c08cd1f Add support to promote f16 to f32
Summary:
This patch adds legalization support to operate on FP16 as a load/store type
and do operations on it as floats.

Tests for ARM are added to test/CodeGen/ARM/fp16-promote.ll

Reviewers: srhines, t.p.northover

Differential Revision: http://reviews.llvm.org/D8755

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235215 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 18:36:25 +00:00
Vasileios Kalintiris
5a77e65d39 [mips][FastISel] Implement FastMaterializeAlloca in Mips fast-isel.
Summary: Implement the method FastMaterializeAlloca in Mips fast-isel

Based on a patch by Reed Kotler.

Test Plan:
Passes test-suite at O0/O2 for mips32 r1/r2
fastalloca.ll

Reviewers: dsanders, rkotler

Subscribers: rfuhler, llvm-commits

Differential Revision: http://reviews.llvm.org/D6742

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235213 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 17:29:58 +00:00
Sanjay Patel
c7b16819e8 [X86, AVX] add an exedepfix entry for vmovq == vmovlps == vmovlpd
This is the AVX extension of r235014:
http://llvm.org/viewvc/llvm-project?view=revision&revision=235014

Review:
http://reviews.llvm.org/D8691



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235210 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 17:02:37 +00:00
Kit Barton
1e3da044d8 Add support for v1i128 type.
The v1i128 type is needed for the quadword add/substract instructions introduced
in POWER8. Futhermore, the PowerPC ABI specifies that parameters of type v1i128
are to be passed in a single vector register, while parameters of type i128 are
passed in pairs of GPRs. Thus, it is necessary to be able to differentiate
between v1i128 and i128 in LLVM.

http://reviews.llvm.org/D8564


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235198 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 16:11:05 +00:00
Vasileios Kalintiris
44bde654f5 [mips][FastISel] Implement shift ops for Mips fast-isel.
Summary:
Add shift operators implementation to fast-isel for Mips.  These are shift ops
for non legal forms, i.e. i8 and i16.

Based on a patch by Reed Kotler.

Test Plan:

Reviewers: dsanders

Subscribers: echristo, rfuhler, llvm-commits

Differential Revision: http://reviews.llvm.org/D6726

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235194 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 14:29:21 +00:00
James Molloy
10331c7400 Fix TRUNCATE splitting helper logic.
This is a followon to r233681 - I'd misunderstood the semantics of FTRUNC,
and had confused it with (FP_ROUND ..., 0).

Thanks for Ahmed Bougacha for his post-commit review!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235191 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 13:51:40 +00:00
Vasileios Kalintiris
187afcd548 [mips] Teach the delay slot filler to remove needless KILL instructions.
Summary:
Previously, the presence of KILL instructions would block valid candidates
from filling a specific delay slot. With the elimination of the KILL
instructions, in the appropriate range, we are able to fill more slots and
keep the information from future def/use analysis consistent.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: hfinkel, llvm-commits

Differential Revision: http://reviews.llvm.org/D7724

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235183 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 12:01:02 +00:00
Rafael Espindola
c59decb902 Add a proper fix for pr23025.
Instead of avoiding looking past every global symbol, only do so
if the symbol is in a comdat.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235181 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 11:27:13 +00:00
Nico Weber
5e708e26db Revert r235154-r235156, they cause asserts when building win64 code (http://crbug.com/477988)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235170 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 09:10:43 +00:00
Rafael Espindola
e95f704ed9 Add a reduced testcase from pr23025.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235168 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 09:05:25 +00:00
Rafael Espindola
2298ce3d6a Don't walk aliases from global to local symbols in comdats.
This fixes pr23196.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235167 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 08:46:11 +00:00
Rafael Espindola
b4b0b34181 Write relocation sections contiguously.
Linkers normally read all the relocations upfront to compute the references
between sections. Putting them together is a bit more cache friendly.

I benchmarked linking a Release+Asserts clang with gold on a vm. I tried all
4 combinations of --gc-sections/no --gc-section hot and cold cache.

I cleared the cache with

echo 3 > /proc/sys/vm/drop_caches

and warmed it up by running the link once before timing the subsequent ones.

With cold cache and --gc-sections the time goes from

1.86130781665 +- 0.01713126697463843 seconds
to
1.82370735105 +- 0.014127522318814516 seconds

With cold cache and no --gc-sections the time goes from

1.6087245435500002 +- 0.012999066825178644 seconds
to
1.5687122041500001 +- 0.013145850126026619 seconds

With hot cache and no --gc-sections the time goes from

0.926200939 ( +-  0.33% ) seconds
to
0.907200079 ( +-  0.31% ) seconds

With hot cache and gc sections the time goes from

1.183038049 ( +-  0.34% ) seconds
to
1.147355862 ( +-  0.39% ) seconds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235165 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 08:11:38 +00:00
David Blaikie
5023f151a7 [opaque pointer type] Explicit pointee type for call instruction
Use an extra bit in the CCInfo to flag the newer version of the
instructiont hat includes the type explicitly.

Tested the newer error cases I added, but didn't add tests for the finer
granularity improvements to existing error paths.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235160 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 06:40:14 +00:00
Reid Kleckner
4a10888e07 Fix test failure due to racing commits
It looks like r235145 changed the .ll syntax for variadic calls. Update
tests to use the new syntax.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235156 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 01:09:53 +00:00
Reid Kleckner
9dea1d0d01 [SEH] Reimplement x64 SEH using WinEHPrepare
This now emits simple, unoptimized xdata tables for __C_specific_handler
based on the handlers listed in @llvm.eh.actions calls produced by
WinEHPrepare.

This adds support for running __finally blocks when exceptions are
thrown, and removes the old landingpad fan-in codepath.

I ran some manual execution tests on small basic test cases with and
without optimization, as well as on Chrome base_unittests, which uses a
small amount of SEH.  I'm sure there are bugs, and we may need to
revert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235154 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 01:01:27 +00:00
Duncan P. N. Exon Smith
02916381eb DebugInfo: Fixup r235149 after IR change in r235145
This shouldn't have used varargs anyway; change the functions to be
`void`.  Also remove my accidentally-committed directory path.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235152 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 00:37:53 +00:00
Jingyue Wu
f182c81444 [NaryReassociate] run NaryReassociate iteratively
Summary:
An alternative is to use a worklist approach. However, that approach
would break the traversing order so that we couldn't lookup SeenExprs
efficiently. I don't see a clear winner here, so I picked the easier approach.

Along with two minor improvements:
1. preserves ScalarEvolution by forgetting instructions replaced
2. removes dead code locally avoiding the need of running DCE afterwards

Test Plan: add to slsr-add.ll a test that requires multiple iterations

Reviewers: broune, dberlin, atrick, meheff

Reviewed By: atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9058

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235151 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 00:25:10 +00:00
Duncan P. N. Exon Smith
f5c3abad67 DebugInfo: Simplify testcase from LiveDebugVariables fix in r235140
This testcase is less brittle and exactly tests for the misbehaviour.
Thanks to David Blaikie for the suggestion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235149 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-17 00:18:46 +00:00
Ahmed Bougacha
7e3c3ae7c1 [AArch64] Don't assert on f16 in DUP PerfectShuffle generator.
Found by code inspection, but breaking i16 at least breaks other tests.
They aren't checking this in particular though, so also add some
explicit tests for the already working types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235148 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 23:57:07 +00:00
David Blaikie
32b845d223 [opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
See r230786 and r230794 for similar changes to gep and load
respectively.

Call is a bit different because it often doesn't have a single explicit
type - usually the type is deduced from the arguments, and just the
return type is explicit. In those cases there's no need to change the
IR.

When that's not the case, the IR usually contains the pointer type of
the first operand - but since typed pointers are going away, that
representation is insufficient so I'm just stripping the "pointerness"
of the explicit type away.

This does make the IR a bit weird - it /sort of/ reads like the type of
the first operand: "call void () %x(" but %x is actually of type "void
()*" and will eventually be just of type "ptr". But this seems not too
bad and I don't think it would benefit from repeating the type
("void (), void () * %x(" and then eventually "void (), ptr %x(") as has
been done with gep and load.

This also has a side benefit: since the explicit type is no longer a
pointer, there's no ambiguity between an explicit type and a function
that returns a function pointer. Previously this case needed an explicit
type (eg: a function returning a void() function was written as
"call void () () * @x(" rather than "call void () * @x(" because of the
ambiguity between a function returning a pointer to a void() function
and a function returning void).

No ambiguity means even function pointer return types can just be
written alone, without writing the whole function's type.

This leaves /only/ the varargs case where the explicit type is required.

Given the special type syntax in call instructions, the regex-fu used
for migration was a bit more involved in its own unique way (as every
one of these is) so here it is. Use it in conjunction with the apply.sh
script and associated find/xargs commands I've provided in rr230786 to
migrate your out of tree tests. Do let me know if any of this doesn't
cover your cases & we can iterate on a more general script/regexes to
help others with out of tree tests.

About 9 test cases couldn't be automatically migrated - half of those
were functions returning function pointers, where I just had to manually
delete the function argument types now that we didn't need an explicit
function type there. The other half were typedefs of function types used
in calls - just had to manually drop the * from those.

import fileinput
import sys
import re

pat = re.compile(r'((?:=|:|^|\s)call\s(?:[^@]*?))(\s*$|\s*(?:(?:\[\[[a-zA-Z0-9_]+\]\]|[@%](?:(")?[\\\?@a-zA-Z0-9_.]*?(?(3)"|)|{{.*}}))(?:\(|$)|undef|inttoptr|bitcast|null|asm).*$)')
addrspace_end = re.compile(r"addrspace\(\d+\)\s*\*$")
func_end = re.compile("(?:void.*|\)\s*)\*$")

def conv(match, line):
  if not match or re.search(addrspace_end, match.group(1)) or not re.search(func_end, match.group(1)):
    return line
  return line[:match.start()] + match.group(1)[:match.group(1).rfind('*')].rstrip() + match.group(2) + line[match.end():]

for line in sys.stdin:
  sys.stdout.write(conv(re.search(pat, line), line))

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235145 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 23:24:18 +00:00
Kevin Enderby
4906c57876 For llvm-objdump, dump the (__OBJC,__protocol) section for Objc1 32-bit Mach-O files
with the -section option as objc_protocol_t structs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235141 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 22:33:20 +00:00
Duncan P. N. Exon Smith
1d30e3faf2 DebugInfo: Fix UserValue::match() in LiveDebugVariables after r235050
r235050 dropped the inlined-at field from `MDLocalVariable`, deferring
to the `!dbg` attachments.  Fix `UserValue` to take the `!dbg` into
account when differentiating between variables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235140 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 22:27:54 +00:00
Pete Cooper
8dd904ce60 Disable AArch64 fast-isel on big-endian call vector returns.
A big-endian vector return needs a byte-swap which we aren't doing right now.

For now just bail on these cases to get correctness back.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235133 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 21:19:36 +00:00
Sanjoy Das
5ff5907996 [IR] Introduce a dereferenceable_or_null(N) attribute.
Summary:
If a pointer is marked as dereferenceable_or_null(N), LLVM assumes it
is either `null` or `dereferenceable(N)` or both.  This change only
introduces the attribute and adds a token test case for the `llvm-as`
/ `llvm-dis`.  It does not hook up other parts of the optimizer to
actually exploit the attribute -- those changes will come later.

For pointers in address space 0, `dereferenceable(N)` is now exactly
equivalent to `dereferenceable_or_null(N)` && `nonnull`.  For other
address spaces, `dereferenceable(N)` is potentially weaker than
`dereferenceable_or_null(N)` && `nonnull` (since we could have a null
`dereferenceable(N)` pointer).

The motivating case for this change is Java (and other managed
languages), where pointers are either `null` or dereferenceable up to
some usually known-at-compile-time constant offset.

Reviewers: rafael, hfinkel

Reviewed By: hfinkel

Subscribers: nicholas, llvm-commits

Differential Revision: http://reviews.llvm.org/D8650

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235132 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 20:29:50 +00:00
Jingyue Wu
feecc904c4 [NaryReassociate] speeds up candidate searching
Summary:
This fixes a left-over efficiency issue in D8950.

As Andrew and Daniel suggested, we can store the candidates in a stack
and pop the top element when it does not dominate the current
instruction. This reduces the worst-case time complexity to O(n).

Test Plan: a new test in nary-add.ll that exercises this optimization.

Reviewers: broune, dberlin, meheff, atrick

Reviewed By: atrick

Subscribers: llvm-commits, sanjoy

Differential Revision: http://reviews.llvm.org/D9055

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235129 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 18:42:31 +00:00
Sanjay Patel
81b61c0e50 [X86, SSE] instcombine common cases of insertps intrinsics into shuffles
This is very similar to D8486 / r232852 (vperm2). If we treat insertps intrinsics
as shufflevectors, we can optimize them better.

I've left all but the full zero case of the zero mask variants out of this patch. 
I don't think those can be converted into a single shuffle in all cases, but I'd
be happy to be proven wrong as I was for vperm2f128.

Either way, we'd need to support whatever sequence we come up with for those cases
in the backend before converting them here.

Differential Revision: http://reviews.llvm.org/D8833



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235124 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 17:52:13 +00:00
Kevin Enderby
6c14999401 For llvm-objdump added support for printing Objc1 32-bit runtime meta data
with the existing -objc-meta-data and -macho options for Mach-O files.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235119 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 17:19:59 +00:00
Reid Kleckner
c4e7ecff42 [WinEH] Handle a landingpad, resume, and cleanup all rolled into a BB
This happens a lot with simple cleanups after SimplifyCFG.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235117 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 17:02:23 +00:00
Hans Wennborg
e2711530de Revert the switch lowering change (r235101, r235103, r235106)
Looks like it broke the sanitizer-ppc64-linux1 build. Reverting for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235108 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 15:43:26 +00:00
Vladimir Sukharev
cf9593b050 [AArch64] Add v8.1a "Virtualization Host Extensions"
Reviewers: t.p.northover

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8500

Patch by: Tom Coxon


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235107 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 15:38:58 +00:00
Hans Wennborg
a84c095616 Add a triple to test/DebugInfo/unconditional-branch.ll (PR23252)
This started failing on Windows after my switch lowering change in r235101.

I suspect the error is unrelated, so adding a triple to pacify it
until it can be fixed. See the PR for details.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235106 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 15:35:44 +00:00
Vladimir Sukharev
39c4ba63f2 [AArch64] Add v8.1a "Limited Ordering Regions" extension
Reviewers: 	t.p.northover

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8499

Patch by: Tom Coxon


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235105 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 15:30:43 +00:00
Vladimir Sukharev
798efb5b3a [AArch64] Add v8.1a "Privileged Access Never" extension
Reviewers: jmolloy

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8498


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235104 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 15:20:51 +00:00
Hans Wennborg
90c9a16dbf Add a triple to switch.ll test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235103 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 15:09:33 +00:00
Hans Wennborg
cc987d98bb Switch lowering: extract jump tables and bit tests before building binary tree (PR22262)
This is a major rewrite of the SelectionDAG switch lowering. The previous code
would lower switches as a binary tre, discovering clusters of cases
suitable for lowering by jump tables or bit tests as it went along. To increase
the likelihood of finding jump tables, the binary tree pivot was selected to
maximize case density on both sides of the pivot.

By not selecting the pivot in the middle, the binary trees would not always
be balanced, leading to performance problems in the generated code.

This patch rewrites the lowering to search for clusters of cases
suitable for jump tables or bit tests first, and then builds the binary
tree around those clusters. This way, the binary tree will always be balanced.

This has the added benefit of decoupling the different aspects of the lowering:
tree building and jump table or bit tests finding are now easier to tweak
separately.

For example, this will enable us to balance the tree based on profile info
in the future.

The algorithm for finding jump tables is O(n^2), whereas the previous algorithm
was O(n log n) for common cases, and quadratic only in the worst-case. This
doesn't seem to be major problem in practice, e.g. compiling a file consisting
of a 10k-case switch was only 30% slower, and such large switches should be rare
in practice. Compiling e.g. gcc.c showed no compile-time difference.  If this
does turn out to be a problem, we could limit the search space of the algorithm.

This commit also disables all optimizations during switch lowering in -O0.

Differential Revision: http://reviews.llvm.org/D8649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235101 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 14:49:23 +00:00
Toma Tabacu
9f8549a4a0 [mips] [IAS] Preserve microMIPS label marking for objects when assigning.
Summary: Previously, this was only happening for functions, but because of .insn, objects can also be marked now.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8007

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235095 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 13:37:32 +00:00
Rafael Espindola
05da50f87b Don't depend on the order relocations are written to a .o file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235092 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 12:59:30 +00:00
Vladimir Sukharev
5ade5fcee4 [ARM] Add v8.1a "Privileged Access Never" extension
Reviewers: jmolloy

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8504


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235087 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 11:34:25 +00:00
Toma Tabacu
e7d84301cc [mips] [IAS] Add support for the .insn directive.
Summary:
This assembler directive marks the current label as an instruction label in microMIPS and MIPS16.

This initial implementation works only for microMIPS.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8006

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235084 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 09:53:47 +00:00
Simon Pilgrim
c7bcb37fd3 TRUNCATE constant folding - minor fix for rL233224
Fix for test case found by James Molloy - TRUNCATE of constant build vectors can be more simply achieved by simply replacing with a new build vector node with the truncated value type - no need to touch the scalar operands at all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235079 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 08:21:09 +00:00
Ahmed Bougacha
363a2799ff [CodeGen] Re-apply r234809 (concat of scalars), with an x86_mmx fix.
The only type that isn't an integer, isn't floating point, and isn't
a vector; ladies and gentlemen, the gift that keeps on giving: x86_mmx!

Fixes PR23246.

Original message (reverted in r235062):
[CodeGen] Combine concat_vectors of scalars into build_vector.

Combine something like:
  (v8i8 concat_vectors (v2i8 bitcast (i16)) x4)
into:
  (v8i8 (bitcast (v4i16 BUILD_VECTOR (i16) x4)))

If any of the scalars are floating point, use that throughout.

Differential Revision: http://reviews.llvm.org/D8948


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235072 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 02:39:14 +00:00
Nick Lewycky
782028b4bc Revert r234809 because it caused PR23246.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235062 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 00:56:20 +00:00
Reid Kleckner
f96076ed80 [SEH] Deal with users of the old lpad for SEH catch-all blocks
The way we split SEH catch-all blocks can leave some dead EH values
behind at -O0. Try to remove them, and if we fail, replace them all with
undef.

Fixes a crash when removing the old unreachable landingpad which is
still used by extractvalue instructions in the catch-all block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235061 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-16 00:02:04 +00:00
Duncan P. N. Exon Smith
88e419d66e DebugInfo: Remove 'inlinedAt:' field from MDLocalVariable
Remove 'inlinedAt:' from MDLocalVariable.  Besides saving some memory
(variables with it seem to be single largest `Metadata` contributer to
memory usage right now in -g -flto builds), this stops optimization and
backend passes from having to change local variables.

The 'inlinedAt:' field was used by the backend in two ways:

 1. To tell the backend whether and into what a variable was inlined.
 2. To create a unique id for each inlined variable.

Instead, rely on the 'inlinedAt:' field of the intrinsic's `!dbg`
attachment, and change the DWARF backend to use a typedef called
`InlinedVariable` which is `std::pair<MDLocalVariable*, MDLocation*>`.
This `DebugLoc` is already passed reliably through the backend (as
verified by r234021).

This commit removes the check from r234021, but I added a new check
(that will survive) in r235048, and changed the `DIBuilder` API in
r235041 to require a `!dbg` attachment whose 'scope:` is in the same
`MDSubprogram` as the variable's.

If this breaks your out-of-tree testcases, perhaps the script I used
(mdlocalvariable-drop-inlinedat.sh) will help; I'll attach it to PR22778
in a moment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235050 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-15 22:29:27 +00:00
Duncan P. N. Exon Smith
94255c8eb0 Verifier: Check that @llvm.dbg.* intrinsics have a !dbg attachment
Before we start to rely on valid `!dbg` attachments, add a check to the
verifier that `@llvm.dbg.*` intrinsics always have one.  Also check that
the `scope:` fields point at the same `MDSubprogram`.

This is in the context of PR22778.  The check that the `inlinedAt:`
fields agree has baked for a while (since r234021), so I'll kill [1] the
`MDLocalVariable::getInlinedAt()` field soon.

[1]: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20150330/269387.html

Unfortunately, that means it's impossible to keep the current `Verifier`
checks, which rely on comparing `inlinedAt:` fields.  We'll be able to
keep the checks I'm adding here.

If this breaks your out-of-tree testcases, the upgrade script
(add-dbg-to-intrinsics.sh) attached to PR22778 that I used for r235040
might fix them for you.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235048 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-15 22:15:46 +00:00
Duncan P. N. Exon Smith
666ef776b3 DebugInfo: Add missing !dbg attachments to intrinsics
Add missing `!dbg` attachments to `@llvm.dbg.*` intrinsics.  I updated
these using a script (add-dbg-to-intrinsics.sh) that I'll attach to
PR22778 for posterity.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235040 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-15 21:04:10 +00:00
Reid Kleckner
192537c4f3 [WinEH] Try to make the MachineFunction CFG more accurate
This avoids emitting code for unreachable landingpad blocks that contain
calls to llvm.eh.actions and indirectbr.

It's also a first step towards unifying the SEH and WinEH lowering
codepaths. I'm keeping the old fan-in lowering of SEH around until the
preparation version works well enough that we can switch over without
breaking existing users.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235037 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-15 18:48:15 +00:00
Reid Kleckner
9051b7fc69 Reland "[WinEH] Use the parent function when computing frameescape labels"
Fixed the test by removing extraneous quotes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235028 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-15 17:47:26 +00:00
Reid Kleckner
034fa881a9 Revert "[WinEH] Use the parent function when computing frameescape labels"
This reverts commit r235025. The test isn't passing yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235027 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-15 17:43:54 +00:00
Reid Kleckner
7f5438e2ca [WinEH] Use the parent function when computing frameescape labels
Fixes assertions in MC when a local label wasn't defined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235025 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-15 17:32:01 +00:00
Charlie Turner
fdb3720f58 Fix BXJ is undefined in AArch32.
BXJ was incorrectly said to be unsupported in ARMv8-A. It is not
supported in the A64 instruction set, but it is supported in the T32
and A32 instruction sets, because it's listed as an instruction in the
ARM ARM section F7.1.28.

Using SP as an operand to BXJ changed from UNPREDICTABLE to
PREDICTABLE in v8-A. This patch reflects that update as well.

This was found by MCHammer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235024 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-15 17:28:23 +00:00
Rafael Espindola
11df480f67 Make it explicit which sections these relocations are in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235022 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-15 17:24:06 +00:00
Jingyue Wu
9b8a9f1a9c [NFC] [SLSR] clean up some tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235021 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-15 17:14:03 +00:00
Rafael Espindola
70a987303a Make it clear in which sections these relocations are.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235020 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-15 16:59:47 +00:00
Jingyue Wu
d4ceea3837 [SLSR] handle candidate form (B + i * S)
Summary:
With this patch, SLSR may rewrite

S1: X = B + i * S
S2: Y = B + i' * S

to

S2: Y = X + (i' - i) * S

A secondary improvement: if (i' - i) is a power of 2, emit Y as X + (S << log(i' - i)). (S << log(i' -i)) is in a canonical form and thus more likely GVN'ed than (i' - i) * S.

Test Plan: slsr-add.ll

Reviewers: hfinkel, sanjoy, meheff, broune, eliben

Reviewed By: eliben

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8983

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235019 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-15 16:46:13 +00:00
Rafael Espindola
6d9fd9bc70 Make it clear where the relocations we are CHECKING are from.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235018 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-15 16:45:03 +00:00
Rafael Espindola
f194367792 Update tests to not be as dependent on section numbers.
Many of these predate llvm-readobj. With elf-dump we had to match
a relocation to symbol number and symbol number to symbol name or
section number.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235015 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-15 15:59:37 +00:00
Sanjay Patel
e3e5fcab94 [X86] add an exedepfix entry for movq == movlps == movlpd
This is a 1-line patch (with a TODO for AVX because that will affect
even more regression tests) that lets us substitute the appropriate
64-bit store for the float/double/int domains.

It's not clear to me exactly what the difference is between the 0xD6 (MOVPQI2QImr) and 
0x7E (MOVSDto64mr) opcodes, but this is apparently the right choice.

Differential Revision: http://reviews.llvm.org/D8691



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235014 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-15 15:47:51 +00:00
Sanjay Patel
0332323ab6 [x86] Implement combineRepeatedFPDivisors
Set the transform bar at 2 divisions because the fastest current
x86 FP divider circuit is in SandyBridge / Haswell at 10 cycle
latency (best case) relative to a 5 cycle multiplier. 
So that's the worst case for this transform (no latency win), 
but multiplies are obviously pipelined while divisions are not,
so there's still a big throughput win which we would expect to
show up in typical FP code.

These are the sequences I'm comparing:

  divss   %xmm2, %xmm0
  mulss   %xmm1, %xmm0
  divss   %xmm2, %xmm0

Becomes:

  movss   LCPI0_0(%rip), %xmm3    ## xmm3 = mem[0],zero,zero,zero
  divss   %xmm2, %xmm3
  mulss   %xmm3, %xmm0
  mulss   %xmm1, %xmm0
  mulss   %xmm3, %xmm0

[Ignore for the moment that we don't optimize the chain of 3 multiplies
into 2 independent fmuls followed by 1 dependent fmul...this is the DAG
version of: https://llvm.org/bugs/show_bug.cgi?id=21768 ...if we fix that,
then the transform becomes even more profitable on all targets.]

Differential Revision: http://reviews.llvm.org/D8941



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235012 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-15 15:22:55 +00:00
Rafael Espindola
50b935707f Write section and section table entries in the same order.
We had two different orders, which has no value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235004 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-15 13:07:47 +00:00
Filipe Cabecinhas
f72ee4c275 Revert "Verify sizes when trying to read a VBR"
This reverts r234984 since it seems to break some bots (most of them
seemed arm*-selfhost).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234998 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-15 11:10:17 +00:00
Filipe Cabecinhas
4c0055402f Verify sizes when trying to read a VBR
Also added an assert to ReadVBR64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234984 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-15 08:48:08 +00:00
Daniel Jasper
058309ba87 Re-apply r234898 and fix tests.
This commit makes LLVM not estimate branch probabilities when doing a
single bit bitmask tests.

The code that originally made me discover this is:

  if ((a & 0x1) == 0x1) {
    ..
  }

In this case we don't actually have any branch probability information
and should not assume to have any. LLVM transforms this into:

  %and = and i32 %a, 1
  %tobool = icmp eq i32 %and, 0

So, in this case, the result of a bitwise and is compared against 0,
but nevertheless, we should not assume to have probability
information.

CodeGen/ARM/2013-10-11-select-stalls.ll started failing because the
changed probabilities changed the results of
ARMBaseInstrInfo::isProfitableToIfCvt() and led to an Ifcvt of the
diamond in the test. AFAICT, the test was never meant to test this and
thus changing the test input slightly to not change the probabilities
seems like the best way to preserve the meaning of the test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234979 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-15 06:24:07 +00:00
Lang Hames
a01f355245 [RuntimeDyld] Make sure we emit MachO __eh_frame and __gcc_except_tab sections,
even if there are no references to them in the code.

This allows exceptions thrown from JIT'd code to be caught by the JIT itself.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234975 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-15 03:39:22 +00:00
Reid Kleckner
f49f1560d2 [WinEH] Avoid emitting xdata tables twice for cleanups
Since adding invokes of llvm.donothing to cleanups, we come here now,
and trivial EH cleanup usage from clang fails to compile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234948 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-14 21:42:36 +00:00
Reid Kleckner
ecc4595ce4 [Inliner] Don't inline functions with frameescape calls
Inlining such intrinsics is very difficult, since you need to
simultaneously transform many calls to llvm.framerecover and potentially
duplicate the functions containing them.  Normally this intrinsic isn't
added until EH preparation, which is part of the backend pass pipeline
after inlining.  However, if it were to get fed through the inliner,
this change will ensure that it doesn't break the code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234937 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-14 20:38:14 +00:00
David Blaikie
8b37471825 DebugInfo: Pubnames: Do not include variable declarations in pubnames
This causes badness for GDB which expects to find a definition in any
compile_unit that has an entry for the variable in its pubnames.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234915 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-14 18:08:25 +00:00
David Blaikie
391cd7a655 Update test case to include the original source code & account for some changes in clang's order of emission
I'd added some stuff to this test case without adding the original
source, which makes updating/adding further stuff rather difficult. So
update it first (& it seems in the interim Clang's changed its output
order a bit, so adjust the CHECK lines to account for that - rather than
hand hacking the IR order which just makes it harder to maintain/change
next time)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234911 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-14 17:17:04 +00:00
Lang Hames
a35d818b9a [Orc] Reapply r234815, outputting via stdout instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234908 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-14 16:58:05 +00:00
Rafael Espindola
091be7b530 Revert "The code that originally made me discover this is:"
This reverts commit r234898.
CodeGen/ARM/2013-10-11-select-stalls.ll was faling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234903 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-14 15:56:33 +00:00
Krzysztof Parzyszek
88a83d4459 Change the testcase mtriple to x86_64-unknown-unknown
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234900 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-14 15:28:42 +00:00
Daniel Jasper
7025d248eb The code that originally made me discover this is:
if ((a & 0x1) == 0x1) {
    ..
  }

In this case we don't actually have any branch probability information and
should not assume to have any. LLVM transforms this into:

  %and = and i32 %a, 1
  %tobool = icmp eq i32 %and, 0

So, in this case, the result of a bitwise and is compared against 0,
but nevertheless, we should not assume to have probability
information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234898 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-14 15:20:37 +00:00
Bradley Smith
d87c77c0e8 [AArch64] Allow non-standard INS/DUP encodings
The ARMv8 ARMARM states that for these instructions in A64 state:

  "Unspecified bits in "imm5" are ignored but should be set to zero by an assembler.", (imm4 for INS).

Make the disassembler accept any encoding with these ignored bits set to 1.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234896 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-14 15:07:26 +00:00
Tom Stellard
71fcd2d4d8 R600/SI: Fix verifier error caused by SIAnnotateControlFlow
This pass will always try to insert llvm.SI.ifbreak intrinsics
in the same block that its conditional value is computed in.  This is
a problem when conditions for breaks or continue are computed outside
of the loop, because the llvm.SI.ifbreak intrinsic ends up being inserted
outside of the loop.

This patch fixes this problem by inserting the llvm.SI.ifbreak
intrinsics in the loop header when the condition is computed outside
the loop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234891 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-14 14:36:45 +00:00
Filipe Cabecinhas
9a1030a4d6 Error out of ParseBitcodeInto(Module*) if we haven't read a Module
Summary:
Without this check the following case failed:

Skip a SubBlock which is not a MODULE_BLOCK_ID nor a BLOCKINFO_BLOCK_ID
Got to end of file

TheModule would still be == nullptr, and we would subsequentially fail
when materializing the Module (assert at the start of
BitcodeReader::MaterializeModule).

Bug found with AFL.

Reviewers: dexonsmith, rafael

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9014

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234887 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-14 14:07:15 +00:00
Petar Jovanovic
01b026b023 Re-enable target-specific relocation table sorting and use it for Mips
Some targets (ie. Mips) have additional rules for ordering the relocation
table entries. Allow them to override generic sortRelocs(), which sorts
entries by Offset.
Then override this function for Mips, to emit HI16 and GOT16 relocations
against the local symbol in pair with the corresponding LO16 relocation.

Patch by Vladimir Stefanovic.

Differential Revision: http://reviews.llvm.org/D7414


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234883 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-14 13:23:34 +00:00
NAKAMURA Takumi
4792454733 Roll back llvm/test/ExecutionEngine/MCJIT/cross-module-sm-pic-a.ll, possibly wrong commit.
It reverts part of r234839, "[RuntimeDyldELF] Improve GOT support".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234879 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-14 10:54:14 +00:00
Anders Waldenborg
6ee10307c0 Fix crash in DebugInfoFinder when adding a module with forward declared composite type
The testcase that is included in the patch caused a crash when doing DebugInfoFinder::processModule
on the module due to DCT->getElements() returning nullptr in DebugInfoFinder::processType.

By doing "DCT->getElements()" instead of "DCT->getElements()->operands()" one gets a DIArray
instead of a raw MDTuple. The former has code to handle null as a 0-element array and
therefore avoids the crash.

Differential Revision: http://reviews.llvm.org/D9008



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234875 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-14 09:18:17 +00:00
Jingyue Wu
9cecacd16a Simplify n-ary adds by reassociation
Summary:
This transformation reassociates a n-ary add so that the add can partially reuse
existing instructions. For example, this pass can simplify

  void foo(int a, int b) {
    bar(a + b);
    bar((a + 2) + b);
  }

to

  void foo(int a, int b) {
    int t = a + b;
    bar(t);
    bar(t + 2);
  }

saving one add instruction.

Fixes PR22357 (https://llvm.org/bugs/show_bug.cgi?id=22357).

Test Plan: nary-add.ll

Reviewers: broune, dberlin, hfinkel, meheff, sanjoy, atrick

Reviewed By: sanjoy, atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8950

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234855 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-14 04:59:22 +00:00
Sanjoy Das
888e8e3a66 [LoopUnrollRuntime] Avoid high-cost trip count computation.
Summary:
Runtime unrolling of loops needs to emit an expression to compute the
loop's runtime trip-count.  Avoid runtime unrolling if this computation
will be expensive.

Depends on D8993.

Reviewers: atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8994

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2015-04-14 03:20:38 +00:00
Sanjoy Das
17e08f50b9 [SCEV] Strengthen SCEVExpander::isHighCostExpansion.
Summary:

Teach `isHighCostExpansion` to consider divisions by power-of-two
constants as cheap and add a test case.  This change is needed for a new
user of `isHighCostExpansion` that will be added in a subsequent change.

Depends on D8995.

Reviewers: atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8993

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234845 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-14 03:20:32 +00:00
Keno Fischer
4edb309c27 [RuntimeDyldELF] Improve GOT support
Summary:
This is the first in a series of patches to eventually add support for TLS relocations to RuntimeDyld. This patch resolves an issue in the current GOT handling, where GOT entries would be reused between object files, which leads to the same situation that necessitates the GOT in the first place, i.e. that the 32-bit offset can not cover all of the address space. Thus this patch makes the GOT object-file-local.
Unfortunately, this still isn't quite enough, because the MemoryManager does not yet guarantee that sections are allocated sufficiently close to each other, even if they belong to the same object file. To address this concern, this patch also adds a small API abstraction on top of the GOT allocation mechanism that will allow (temporarily, until the MemoryManager is improved) using the stub mechanism instead of allocating a different section. The actual switch from separate section to stub mechanism will be part of a follow-on commit, so that it can be easily reverted independently at the appropriate time.

Test Plan: Includes a test case where the GOT of two object files is artificially forced to be apart by several GB.

Reviewers: lhames

Reviewed By: lhames

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8813

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234839 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-14 02:10:35 +00:00
Adam Nemet
1624f35f2b [LoopAccesses] Properly print whether memchecks are needed
Fix oversight in -analyze output.  PtrRtCheck contains the pointers that
need to be checked against each other and not whether memchecks are
necessary.

For instance in the testcase PtrRtCheck has four elements but all
no-alias so no checking is necessary.

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2015-04-14 01:12:55 +00:00
Lang Hames
7b161773fd [Orc] Revert 234815. Still haven't quite got this test figured out apparently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234822 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-14 00:27:47 +00:00
Lang Hames
f265d42389 [Orc] Make the OrcLazy hello.ll regression test output via stderr.
This keeps the program and JIT output in sync, enabling FileCheck to test the
order of target program and JIT events.

In particular we can now test that main is not compiled until after the global
constructor has run.


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2015-04-13 23:28:46 +00:00
Lang Hames
534f9f3ee5 [Orc] Back out r234805 for hello.ll until I can figure out how to sync up the
output.



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2015-04-13 22:58:39 +00:00
Ahmed Bougacha
164cbefb85 [CodeGen] Combine concat_vectors of scalars into build_vector.
Combine something like:
  (v8i8 concat_vectors (v2i8 bitcast (i16)) x4)
into:
  (v8i8 (bitcast (v4i16 BUILD_VECTOR (i16) x4)))

If any of the scalars are floating point, use that throughout.

Differential Revision: http://reviews.llvm.org/D8948


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234809 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-13 22:57:21 +00:00
Lang Hames
597d2b7309 [Orc] Add an Orc layer for applying arbitrary transforms to IR, use it to add
debugging output to the LLI orc-lazy JIT, and update the orc-lazy "hello.ll"
test to actually test for lazy compilation.



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2015-04-13 22:12:54 +00:00
Krzysztof Parzyszek
2c85db4642 Settle on a specific triple for the aarch64 testcase
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234801 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-13 21:55:21 +00:00
Krzysztof Parzyszek
83ed245532 Also add mtriple to the aarch64 testcase
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234797 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-13 20:49:08 +00:00
Krzysztof Parzyszek
2a8b13bead Add mtriple to test case to avoid problems with different naming schemes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234793 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-13 20:24:40 +00:00
Nick Lewycky
d4b4e3e20f Subtraction is not commutative. Fixes PR23212!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234780 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-13 19:17:37 +00:00
Krzysztof Parzyszek
b6852d12a8 Remove this test until I figure out why it fails
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234777 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-13 18:57:50 +00:00
Duncan P. N. Exon Smith
88116fe71a Reapply "Verifier: Check for incompatible bit piece expressions"
This reverts commit r234717, reapplying r234698 (in spirit).

As described in r234717, the original `Verifier` check had a
use-after-free.  Instead of storing pointers to "interesting" debug info
intrinsics whose bit piece expressions should be verified once we have
typerefs, do a second traversal.  I've added a testcase to catch the
`llc` crasher.

Original commit message:

    Verifier: Check for incompatible bit piece expressions

    Convert an assertion into a `Verifier` check.  Bit piece expressions
    must fit inside the variable, and mustn't be the entire variable.
    Catching this in the verifier will help us find bugs sooner, and makes
    `DIVariable::getSizeInBits()` dead code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234776 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-13 18:53:11 +00:00
Matthias Braun
fabde10209 Use FileCheck for test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234774 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-13 18:47:19 +00:00
Akira Hatanaka
a50a335767 [inliner] Don't inline a function if it doesn't have exactly the same
target-cpu and target-features attribute strings as the caller.

Differential Revision: http://reviews.llvm.org/D8984


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234773 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-13 18:43:38 +00:00
Krzysztof Parzyszek
75f1ab4b1b Make the ARM testcase from r234764 also pass on Thumb
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234772 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-13 18:39:52 +00:00
Jan Vesely
a017ce21ba Revert revisions r234755, r234759, r234760
Revert "Remove default in fully-covered switch (to fix Clang -Werror -Wcovered-switch-default)"
Revert "R600: Add carry and borrow instructions. Use them to implement UADDO/USUBO"
Revert "LegalizeDAG: Try to use Overflow operations when expanding ADD/SUB"

Using overflow operations fails CodeGen/Generic/2011-07-07-ScheduleDAGCrash.ll
on hexagon, nvptx, and r600. Revert while I investigate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234768 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-13 17:47:15 +00:00
Krzysztof Parzyszek
fcc330abfe Allow memory intrinsics to be tail calls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234764 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-13 17:16:45 +00:00
Matthias Braun
12a7039644 DAGCombiner: Fix crash in select(select) opt.
In case of different types used for the condition of the selects the
select(select) -> select(and) normalisation cannot be performed.

See also: http://reviews.llvm.org/D7622

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2015-04-13 17:16:33 +00:00
Jan Vesely
4ce8b9c7fb R600: Add carry and borrow instructions. Use them to implement UADDO/USUBO
v2: tighten the sub64 tests
v3: rename to CARRY/BORROW
v4: fixup test cmdline
    add known bits computation
    use sign extend instead of sub 0,x
    better add test
v5: remove redundant break
    move lowering to separate functions
    fix comments

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewers: arsenm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234759 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-13 16:26:00 +00:00
David Blaikie
2d35a46ea5 llvm-readobj: teach it to handle MachO Universal Archive correctly
Patch by Chilledheart (rwindz0@gmail.com).

Reviewed By: rafael

Differential Revision: http://reviews.llvm.org/D8773

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234758 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-13 16:05:49 +00:00
Jan Vesely
187ac42686 LegalizeDAG: Try to use Overflow operations when expanding ADD/SUB
v2: consider BooleanContents when processing overflow

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewers: resistor, jholewinsky (nvidia parts)
Differential Revision: http://reviews.llvm.org/D6340

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2015-04-13 15:32:01 +00:00
John Brawn
afa4193fc8 [ARM] Align global variables passed to memory intrinsics
Fill in the TODO in CodeGenPrepare::OptimizeCallInst so that global
variables that are passed to memory intrinsics are aligned in the same
way that allocas are.

Differential Revision: http://reviews.llvm.org/D8421


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2015-04-13 10:47:39 +00:00
NAKAMURA Takumi
10a56a29ef llvm/test/CodeGen/R600/fminnum.ll: Relax an expression for NaN on MSVCRT like r204118.
<stdin>:202:2: note: possible intended match here
   2143289344(1.#QNAN0e+00), 2(2.802597e-45)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234719 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-13 04:54:06 +00:00
Jan Vesely
b7239d3aa5 R600: Make FMIN/MAXNUM legal on all asics
v2: Add tests

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
reviewer: arsenm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234716 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-12 23:45:05 +00:00
Petr Hosek
054db7df5b [MC] Write padding into fragments when -mc-relax-all flag is used
Summary:
When instruction bundling is enabled and the -mc-relax-all flag is
set, we can write bundle padding directly into fragments and avoid
creating large number of fragments significantly reducing LLVM MC
memory usage.

Test Plan: Regression test attached

Reviewers: eliben

Subscribers: jfb, mseaborn

Differential Revision: http://reviews.llvm.org/D8072

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234714 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-12 23:42:25 +00:00
Lang Hames
2ae6c65416 [Orc] During module partitioning, rename anonymous and asm-private globals.
If they're not (re)named, these globals will fail to resolve when the
partitioned modules are linked.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234707 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-12 20:05:51 +00:00
Hal Finkel
ad96655905 [PowerPC] Really iterate over all loops in PPCLoopDataPrefetch/PPCLoopPreIncPrep
When I fixed these a couple of days ago to iterate over all loops, not just
depth == 1 loops, I inadvertently made it such that we'd only look at the first
top-level loop. Make sure that we really look at all of them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234705 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-12 17:18:56 +00:00
Sanjoy Das
e0f4a11a89 [LoopUnrollRuntime] Clean up a predicate.
Clean up a predicate I added in r229731, fix the relevant comment and
add a test case.  The earlier version is confusing to read and was also
buggy (probably not a coincidence) till Alexey fixed it in r233881.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234701 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-12 01:24:01 +00:00
Hal Finkel
1cea397876 [PowerPC] Disable part-word atomics on the P7
As it turns out, even though these are part of ISA 2.06, the P7 does not
support them (or, at least, not any P7s we're tested so far).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234686 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-11 13:40:36 +00:00
Nemanja Ivanovic
9ca031b6c6 Add direct moves to/from VSR and exploit them for FP/INT conversions
This patch corresponds to review:
http://reviews.llvm.org/D8928

It adds direct move instructions to/from VSX registers to GPR's. These are
exploited for FP <-> INT conversions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234682 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-11 10:40:42 +00:00
Hal Finkel
ff49ef7838 [PowerPC] Fix PPCLoopPreIncPrep for depth > 1 loops
This pass had the same problem as the data-prefetching pass: it was only
checking for depth == 1 loops in practice. Fix that, add some debugging
statements, and make sure that, when we grab an AddRec, it is for the loop we
expect.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234670 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-11 00:33:08 +00:00
Ahmed Bougacha
d2069333ee [CodeGen] Split -enable-global-merge into ARM and AArch64 options.
Currently, there's a single flag, checked by the pass itself.
It can't force-enable the pass (and is on by default), because it
might not even have been created, as that's the targets decision.
Instead, have separate explicit flags, so that the decision is
consistently made in the target.

Keep the flag as a last-resort "force-disable GlobalMerge" for now,
for backwards compatibility.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234666 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-11 00:06:36 +00:00
Reid Kleckner
c127686d0e [WinEH] Recognize SEH finally block inserted by the frontend
This allows winehprepare to build sensible llvm.eh.actions calls for SEH
finally blocks.  The pattern matching in this change is brittle and
should be replaced with something more robust soon.  In the meantime,
this will let us write the code that produces __C_specific_handler xdata
tables, which we need regardless of how we decide to get finally blocks
through EH preparation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234663 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-10 23:12:29 +00:00
Philip Reames
f894c7ecb2 [RewriteStatepointsForGC] test case missing from 234657
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234658 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-10 22:58:39 +00:00
Philip Reames
d92e9ef170 [RewriteStatepointsForGC] Use an actual liveness algorithm
When rewriting statepoints to make relocations explicit, we need to have a conservative but consistent notion of where a particular pointer is live at a particular site. The old code just used dominance, which is correct, but decidedly more conservative then it needed to be. This patch implements a simple dataflow algorithm that's run one per function (well, twice counting fixup after base pointer insertion). There's still lots of room to make this faster, but it's fast enough for all practical purposes today.

Differential Revision: http://reviews.llvm.org/D8674



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234657 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-10 22:53:14 +00:00
Philip Reames
82374f6b8a [RewriteStatepointsForGC] Preprocess the IR to remove unreachable blocks and single entry phis
Two related small changes:

    Various dominance based queries about liveness can get confused if we're talking about unreachable blocks. To avoid reasoning about such cases, just remove them before rewriting statepoints.
    Remove single entry phis (likely left behind by LCSSA) to reduce the number of live values.

Both of these are motivated by http://reviews.llvm.org/D8674 which will be submitted shortly.

Differential Revision: http://reviews.llvm.org/D8675



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234651 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-10 22:07:04 +00:00
Philip Reames
cb148c8541 [RewriteStatepointsForGC] Limited support for vectors of pointers
This patch adds limited support for inserting explicit relocations when there's a vector of pointers live over the statepoint. This doesn't handle the case where the vector contains a mix of base and non-base pointers; that's future work.

The current implementation just scalarizes the vector over the gc.statepoint before doing the explicit rewrite. An alternate approach would be to plumb the vector all the way though the backend lowering, but doing that appears challenging. In particular, the size of the indirect spill slot is currently assumed to be sizeof(pointer) throughout the backend.

In practice, this is enough to allow running the SLP and Loop vectorizers before RewriteStatepointsForGC.

Differential Revision: http://reviews.llvm.org/D8671



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2015-04-10 21:48:25 +00:00
Sanjoy Das
8aca90e5b6 [InstCombine][CodeGenPrep] Create llvm.uadd.with.overflow in CGP.
Summary:
This change moves creating calls to `llvm.uadd.with.overflow` from
InstCombine to CodeGenPrep.  Combining overflow check patterns into
calls to the said intrinsic in InstCombine inhibits optimization because
it introduces an intrinsic call that not all other transforms and
analyses understand.

Depends on D8888.

Reviewers: majnemer, atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8889

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234638 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-10 21:07:09 +00:00
Reid Kleckner
79db0a6fd9 Avoid spewing binary to stdout in some filetype=obj tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234627 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-10 19:36:55 +00:00
Sanjay Patel
dc0ca89635 use update_llc_test_checks.py to tighten checking
test features, not CPUs

remove unnecessary cruft


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234622 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-10 18:31:42 +00:00
Reid Kleckner
10d1d8a3bd [WinEH] Try to make outlining invokes work a little better
WinEH currently turns invokes into calls. Long term, we will reconsider
this, but for now, make sure we remap the operands and clone the
successors of the new terminator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234608 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-10 16:26:42 +00:00
Hal Finkel
d4f643a5df [PowerPC] Prefetching should also consider depth > 1 loops
Iterating over loops from the LoopInfo instance only provides top-level loops.
We need to search the whole tree of loops to find the inner ones.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234603 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-10 15:05:02 +00:00
Toma Tabacu
bb11bbe297 [mips] [IAS] Make the mips-expansions-bad.s test more readable. NFC.
Move the check lines below the code lines and change the indentation from 8
spaces to 2 spaces.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234584 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-10 10:46:59 +00:00
Jingyue Wu
5733100450 Divergence analysis for GPU programs
Summary:
Some optimizations such as jump threading and loop unswitching can negatively
affect performance when applied to divergent branches. The divergence analysis
added in this patch conservatively estimates which branches in a GPU program
can diverge. This information can then help LLVM to run certain optimizations
selectively.

Test Plan: test/Analysis/DivergenceAnalysis/NVPTX/diverge.ll

Reviewers: resistor, hfinkel, eliben, meheff, jholewinski

Subscribers: broune, bjarke.roune, madhur13490, tstellarAMD, dberlin, echristo, jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D8576

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234567 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-10 05:03:50 +00:00
Hal Finkel
36f934a207 [PowerPC] Don't crash on PPC32 i64 fp_to_uint on modern cores
When we have an instruction for this (and, thus, don't generate a runtime
call), we need to custom type legalize this (in a trivial way, just as we do
for fp_to_sint).

Fixes PR23173.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234561 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-10 03:39:00 +00:00
Ahmed Bougacha
1810ca3110 [AArch64] Promote f16 operations to f32.
For the most common ones (such as fadd), we already did the promotion.
Do the same thing for all the others.

Currently, we'll just crash/assert on all these operations, as
there's no hardware or libcall support whatsoever.

f16 (half) is specified as an interchange - not arithmetic - format,
and is expected to be promoted to single-precision for arithmetic
operations.

While there, teach the legalizer about promoting some of the (mostly
floating-point) operations that we never needed before.

Differential Revision: http://reviews.llvm.org/D8648
See related discussion on the thread for: http://reviews.llvm.org/D8755


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234550 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-10 00:08:48 +00:00
Nemanja Ivanovic
c58b8f0b65 Add LLVM support for remaining integer divide and permute instructions from ISA 2.06
This is the patch corresponding to review:
http://reviews.llvm.org/D8406

It adds some missing instructions from ISA 2.06 to the PPC back end.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234546 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-09 23:54:37 +00:00
Ahmed Bougacha
66649e00c9 [CodeGen] Combine concat_vector of trunc'd scalar to scalar_to_vector.
We already do:
  concat_vectors(scalar, undef) -> scalar_to_vector(scalar)
When the scalar is legal.
When it's not, but is a truncated legal scalar, we can also do:
  concat_vectors(trunc(scalar), undef) -> scalar_to_vector(scalar)
Which is equivalent, since the upper lanes are undef anyway.
While there, teach the combine to look at more than 2 operands.

Differential Revision: http://reviews.llvm.org/D8883


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234530 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-09 20:04:47 +00:00
Juergen Ributzka
117bf240ef [AArch64][FastISel] Fix integer extend optimization.
The integer extend optimization tries to fold the extend into the load
instruction. This requires us to identify if the extend has already been
emitted or not and act accordingly on it.

The check that was originally performed for this was not sufficient. Besides
checking the ValueMap for a mapped register we also need to check if the
virtual register has already an associated machine instruction that defines it.

This fixes rdar://problem/20470788.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234529 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-09 20:00:46 +00:00
Rafael Espindola
57a24199de Revert "Refactoring and enhancement to FMA combine."
This reverts commit r234513. It was failing on the bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234518 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-09 18:29:32 +00:00
Olivier Sallenave
ef67194fd2 Refactoring and enhancement to FMA combine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234513 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-09 17:55:26 +00:00
Javed Absar
28c2fda9df [ARM] support for Cortex-R4/R4F
Currently, llvm (backend) doesn't know cortex-r4, even though it is the
default target for armv7r. Using "--target=armv7r-arm-none-eabi" provokes
'cortex-r4' is not a recognized processor for this target' by llvm.
This patch adds support for cortex-r4 and, very closely related, r4f.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234486 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-09 14:07:28 +00:00
Kristof Beyls
2a6ad5bfb2 [AArch64] Add support for dynamic stack alignment
Differential Revision: http://reviews.llvm.org/D8876



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234471 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-09 08:49:47 +00:00
Lang Hames
64008ef318 [AArch64] Remove redundant -march option. Also fix a think-o from r234462.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234467 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-09 05:34:57 +00:00
Nick Lewycky
7ca40334f1 Not all triples put _ before function names. Specify a triple to make this test pass on Linux.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234466 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-09 05:31:32 +00:00
Lang Hames
174f04eefb [AArch64] Teach AArch64TargetLowering::getOptimalMemOpType to consider alignment
restrictions when choosing a type for small-memcpy inlining in
SelectionDAGBuilder.

This ensures that the loads and stores output for the memcpy won't be further
expanded during legalization, which would cause the total number of instructions
for the memcpy to exceed (often significantly) the inlining thresholds.

<rdar://problem/17829180>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234462 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-09 03:40:33 +00:00
Akira Hatanaka
2c3c562b03 Use option -march instead of -mtriple to avoid overconditionalizing the test.
This fixes r234439, which was committed to fix the test failures caused by
r234430.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234451 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-08 23:02:45 +00:00
Akira Hatanaka
0400513fd3 Pass -mtriple to llc to appease buildbot.
This fixes the test case I committed in r234430.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234439 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-08 21:30:48 +00:00
Andrew Kaylor
a9180a2fac [WinEH] Minor bug fixes.
Fixed insert point for allocas created for demoted values.
Clear the nested landing pad list after it has been processed.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234433 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-08 20:57:22 +00:00
Akira Hatanaka
522877813a [DAGCombine] Fix a bug in MergeConsecutiveStores.
The bug manifests when there are two loads and two stores chained as follows in
a DAG,

(ld v3f32) -> (st f32) -> (ld v3f32) -> (st f32)

and the stores' values are extracted from the preceding vector loads.

MergeConsecutiveStores would replace the first store in the chain with the
merged vector store, which would create a cycle between the merged store node
and the last load node that appears in the chain.

This commits fixes the bug by replacing the last store in the chain instead.

rdar://problem/20275084

Differential Revision: http://reviews.llvm.org/D8849


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234430 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-08 20:34:53 +00:00
Adam Nemet
cd13a3808a [LoopAccesses] Allow analysis to complete in the presence of uniform stores
(Re-apply r234361 with a fix and a testcase for PR23157)

Both run-time pointer checking and the dependence analysis are capable
of dealing with uniform addresses. I.e. it's really just an orthogonal
property of the loop that the analysis computes.

Run-time pointer checking will only try to reason about SCEVAddRec
pointers or else gives up. If the uniform pointer turns out the be a
SCEVAddRec in an outer loop, the run-time checks generated will be
correct (start and end bounds would be equal).

In case of the dependence analysis, we work again with SCEVs. When
compared against a loop-dependent address of the same underlying object,
the difference of the two SCEVs won't be constant. This will result in
returning an Unknown dependence for the pair.

When compared against another uniform access, the difference would be
constant and we should return the right type of dependence
(forward/backward/etc).

The changes also adds support to query this property of the loop and
modify the vectorizer to use this.

Patch by Ashutosh Nema!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234424 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-08 17:48:40 +00:00
Scott Douglass
7e2bc24e05 [ARM] make vminnm/vmaxnm work with ?le, ?ge and no-nans-fp-math
Because -menable-no-nans causes fcmp conditions to be rewritten
without 'o' or 'u' the recognition code in needs to cope. Also
extended it to handle 'le' and 'ge.

Differential Revision: http://reviews.llvm.org/D8725


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234421 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-08 17:18:28 +00:00
Sanjay Patel
912be27c05 fixed to test features, not CPU models
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234413 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-08 16:51:42 +00:00
Toma Tabacu
739ca842aa [mips] [IAS] Do not generate redundant move when expanding lw/sw with symbol.
Summary:
Even though there is no 2nd register operand in the "lw/sw $8, symbol" case, we still try to find one, 
and we end up with $0, which makes us generate an unnecessary "addu $8, $8, $0" (a.k.a. "move $8, $8").

We can avoid this by checking if the 2nd register operand is different from $0, before generating the addu.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8055

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234406 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-08 13:52:41 +00:00
Toma Tabacu
f716ca43ca [mips] [IAS] Add support for the BNEZL and BEQZL pseudo-instructions.
Summary:
They are of the form "bnezl/beqzl $rs, offset" and expand to "bnel/beql $rs, $zero, offset".

These instructions are used in Linux inline assembly.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8540

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234401 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-08 12:15:05 +00:00
Rafael Espindola
541279fdf9 Write the section header in the end.
One could make the argument for writing it immediately after the ELF header,
but writing it in the middle of the sections like we were doing just makes
it harder for no reason.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234400 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-08 11:41:24 +00:00
Sergey Dmitrouk
a7512d1d4a [ARM][Debug Info] Restore emitting of .cfi_def_cfa_offset for functions without stack frame
Summary: Looks like new code from [[ http://reviews.llvm.org/rL222057 | rL222057 ]] doesn't account for early `return` in `ARMFrameLowering::emitPrologue`, which leads to loosing `.cfi_def_cfa_offset` directive for functions without stack frame.

Reviewers: echristo, rengolin, asl, t.p.northover

Reviewed By: t.p.northover

Subscribers: llvm-commits, rengolin, aemerson

Differential Revision: http://reviews.llvm.org/D8606

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234399 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-08 10:10:12 +00:00
Toma Tabacu
39fedc9aa2 [mips] [IAS] Remove AssemblerPredicate's from RelocPIC and RelocStatic.
Summary:
These AssemblerPredicate's are unnecessary and actually make some instructions unusable when assembling pre-MIPS32 ISAs.
For example, this was causing the IAS to reject the 'j' instruction for MIPS I-V.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8300

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234398 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-08 10:06:45 +00:00
Adam Nemet
b343d1cd85 Revert "[LoopAccesses] Allow analysis to complete in the presence of uniform stores"
This reverts commit r234361.

It caused PR23157.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234387 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-08 04:16:55 +00:00
Tom Stellard
a787066317 R600/SI: Initial support for assembler and inline assembly
This is currently considered experimental, but most of the more
commonly used instructions should work.

So far only SI has been extensively tested, CI and VI probably work too,
but may be buggy.  The current set of tests cases do not give complete
coverage, but I think it is sufficient for an experimental assembler.

See the documentation in R600Usage for more information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234381 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-08 01:09:26 +00:00
Tom Stellard
434e097df8 R600/SI: Don't print offset0/offset1 DS operands when they are 0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234379 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-08 01:09:19 +00:00
Tim Northover
112102c7fe AArch64: disallow "fmov sD, #-0.0" during assembly.
We weren't checking the sign of the floating point immediate before translating
it to "fmov sD, wzr". Similarly for D-regs.

Technically "movi vD.2s, #0x80, lsl #24" would work most of the time, but it's
not a blessed alias (and I don't think it should be since people expect writing
sD to zero out the high lanes, and there's no dD equivalent). So an error it is.

rdar://20455398

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234372 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-07 22:49:47 +00:00
Adam Nemet
a0834f1d87 [LoopAccesses] Allow analysis to complete in the presence of uniform stores
Both run-time pointer checking and the dependence analysis are capable
of dealing with uniform addresses. I.e. it's really just an orthogonal
property of the loop that the analysis computes.

Run-time pointer checking will only try to reason about SCEVAddRec
pointers or else gives up. If the uniform pointer turns out the be a
SCEVAddRec in an outer loop, the run-time checks generated will be
correct (start and end bounds would be equal).

In case of the dependence analysis, we work again with SCEVs. When
compared against a loop-dependent address of the same underlying object,
the difference of the two SCEVs won't be constant. This will result in
returning an Unknown dependence for the pair.

When compared against another uniform access, the difference would be
constant and we should return the right type of dependence
(forward/backward/etc).

The changes also adds support to query this property of the loop and
modify the vectorizer to use this.

Patch by Ashutosh Nema!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234361 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-07 21:46:16 +00:00
Reid Kleckner
1106660066 [WinEH] Fix xdata generation when no catch object is present
The lack of a catch object is indicated by a frame escape index of -1.

Fixes PR23137.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234346 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-07 19:46:38 +00:00
Toma Tabacu
db3b3a0b9f [mips] [IAS] Allow .set assignments for already defined symbols.
Summary:
This is not possible when using the IAS for MIPS, but it is possible when using the IAS for other architectures and when using GAS for MIPS.


Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8578

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234316 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-07 13:59:39 +00:00
Rafael Espindola
838c24a7c8 Refactor a lot of duplicated code for stub output.
This also moves it earlier so that it they are produced before we print
an end symbol for the data section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234315 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-07 13:42:44 +00:00
Toma Tabacu
0e407e7bbf [TableGen] Prevent invalid code generation when emitting AssemblerPredicate conditions.
Summary:
The loop which emits AssemblerPredicate conditions also links them together by emitting a '&&'.
If the 1st predicate is not an AssemblerPredicate, while the 2nd one is, nothing gets emitted for the 1st one, but we still emit the '&&' because of the 2nd predicate.
This generated code looks like "( && Cond2)" and is invalid.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D8294

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234312 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-07 12:10:11 +00:00
Daniel Jasper
ee6f78817a Add test showing that MachineLICM is calculating register pressure wrong
More details: http://llvm.org/PR23143

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234309 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-07 11:41:40 +00:00
Rafael Espindola
7bdc1cb690 Use sext in fast isel.
Fast isel used to zero extends immediates to 64 bits. This normally goes
unnoticed because the value is truncated to 32 bits for output.

Two cases were it is noticed:

* We fail to use smaller encodings.
* If the original constant was smaller than i32.

In the tests using i1 constants, codegen would change to use -1, which is fine
(and matches what regular isel does) since only the lowest bit is then used.

Instead, this patch then changes the ir to use i8 constants, which looks more
like what clang produces.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234249 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-06 22:29:07 +00:00
Reid Kleckner
ebb3c53316 [WinEH] Don't sink allocas into child handlers
The uselist isn't enough to infer anything about the lifetime of such
allocas. If we want to re-add this optimization, we will need to
leverage lifetime markers to do it.

Fixes PR23122.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234196 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-06 18:50:38 +00:00
Tim Northover
8af3f965e0 ARM: do not relax Thumb1 -> Thumb2 if only Thumb1 is available.
After recognising that a certain narrow instruction might need a relocation to
be represented, we used to unconditionally relax it to a Thumb2 instruction to
permit this. Unfortunately, some CPUs (e.g. v6m) don't even have most Thumb2
instructions, so we end up emitting a completely invalid instruction.

Theoretically, ELF does have relocations for these situations; but they are
fairly unusable with such short ranges and the ABI document even says they're
documented "for completeness". So an error is probably better there too.

rdar://20391953

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234195 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-06 18:44:42 +00:00
Simon Pilgrim
2ec7242600 [X86][SSE] Use (V)PINSRB for direct byte insertion in 16i8 buildvector on SSE4.1 targets
This patch allows SSE4.1 targets to use (V)PINSRB to create 16i8 vectors by inserting i8 scalars directly into a XMM register instead of merging pairs of i8 scalars into a i16 and using the SSE2 PINSRW instruction.

This allows folding of byte loads and reduces scalar register usage as well.

Differential Revision: http://reviews.llvm.org/D8839

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234193 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-06 18:39:00 +00:00
Kevin Enderby
000ffacf53 Fix failure on builder llvm-clang-lld-x86_64-debian-fast as the
test macho-objc-meta-data.test had a line it shouldn't have had.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234190 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-06 18:18:23 +00:00
Kevin Enderby
2e8b39e549 For llvm-objdump added support for printing Objc2 32-bit runtime meta data
with the existing -objc-meta-data and -macho options for Mach-O files.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234185 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-06 17:47:03 +00:00
Jingyue Wu
10483b93ea [SLSR] consider &B[S << i] as &B[(1 << i) * S]
Summary: This reduces handling &B[(1 << i) * s] to handling &B[i * S].

Test Plan: slsr-gep.ll

Reviewers: meheff

Subscribers: sanjoy, llvm-commits

Differential Revision: http://reviews.llvm.org/D8837

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234180 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-06 17:15:48 +00:00
Simon Pilgrim
7d424d47d3 [DAGCombiner] Add support for FCEIL, FFLOOR and FTRUNC vector constant folding
Differential Revision: http://reviews.llvm.org/D8715

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234179 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-06 17:15:41 +00:00
Duncan P. N. Exon Smith
fe42afc0e5 Verifier: Check composite type template params
Add missing checks for `templateParams:` in `MDCompositeType`.  Pull the
current check for `MDSubprogram` to reduce duplicated code and fix it up
to print a good message when the immediate operand isn't an `MDTuple`
(as a drive-by, make the same fix to `variables:` in `MDSubprogram`).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234177 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-06 17:04:58 +00:00
Rafael Espindola
6ba6e554c7 Use a comma after the unique keyword.
H.J. Lu noted that all .section options are separated by a comma.

This patch changes the syntax of unique to require one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234174 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-06 16:34:41 +00:00
Rafael Espindola
9428f184be Be consistent when deciding if a relocation is needed.
Before when deciding if we needed a relocation in A-B, we wore only checking
if A was weak.

This fixes the asymmetry.

The "InSet" argument should probably be renamed to "ForValue", since InSet is
very MachO specific, but doing so in this patch would make it hard to read.

This fixes PR22815.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234165 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-06 15:27:57 +00:00
Rafael Espindola
83be4429b2 Store the sh_link of ARM_EXIDX directly in MCSectionELF.
This avoids some pretty horrible and broken name based section handling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234142 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-06 04:25:18 +00:00
Rafael Espindola
903f4a2051 Implement unique sections with an unique ID.
This allows the compiler/assembly programmer to switch back to a
section. This in turn fixes the bootstrap failure on powerpc (tested
on gcc110) without changing the ppc codegen at all.

I will try to cleanup the various getELFSection overloads in a  followup patch.
Just using a default argument now would lead to ambiguities.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234099 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-04 18:02:01 +00:00
Simon Pilgrim
b8d7733666 [DAGCombiner] Canonicalize vector constants for ADD/MUL/AND/OR/XOR re-association
Scalar integers are commuted to move constants to the RHS for re-association - this ensures vectors do the same.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234092 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-04 10:20:31 +00:00
Eric Christopher
8bc9aa92aa Strip trailing whitespace and reword explanatory comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234078 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-04 02:26:47 +00:00
Craig Topper
b1ff87ec86 [X86] Don't use GR64 register 'and with immediate' instructions if the immediate is zero in the upper 33-bits or upper 57-bits. Use GR32 instructions instead.
Previously the patterns didn't have high enough priority and we would only use the GR32 form if the only the upper 32 or 56 bits were zero.

Fixes PR23100.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234075 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-04 02:08:20 +00:00
David Majnemer
45221a75fb [WinEH] Fill out CatchHigh in the TryBlockMap
Now all fields in the WinEH xdata have been filled out.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234067 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-03 23:37:34 +00:00
David Majnemer
8431785c5e [WinEH] Fill out .xdata for catch objects
This add support for catching an exception such that an exception object
available to the catch handler will be initialized by the runtime.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234062 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-03 22:49:05 +00:00
David Majnemer
f89ce9a09d [WinEH] Sink UnwindHelp completely out of IR
We don't need to represent UnwindHelp in IR.  Instead, we can use the
knowledge that we are emitting the parent function to decide if we
should create the UnwindHelp stack object.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234061 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-03 22:32:26 +00:00
David Majnemer
33b9ae320a Fix a typo
CHECK-LABEL had the wrong function name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234051 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-03 20:56:24 +00:00
David Majnemer
701c2fca7e [InstCombine] Use DataLayout to determine vector element width
InstCombine didn't realize that it needs to use DataLayout to determine
how wide pointers are.  This lead to assertion failures.

This fixes PR23113.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234046 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-03 20:18:40 +00:00
Andrew Kaylor
675e22e7ad [WinEH] Handle nested landing pads in outlined catch handlers
Differential Revision: http://reviews.llvm.org/D8596



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234041 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-03 19:37:50 +00:00
Sanjay Patel
0b654728bc use update_llc_test_checks.py to tighten checking; remove unnecessary testing params
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234029 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-03 17:17:50 +00:00
Sanjay Patel
c070a8f6ba use update_llc_test_checks.py to tighten checking; remove unnecessary testing params
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234027 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-03 17:13:31 +00:00
Sanjay Patel
a3ba15a9c9 use update_llc_test_checks.py to tighten checking; remove unnecessary testing params
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234024 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-03 17:09:37 +00:00
Sanjay Patel
5703d9f0b8 use update_llc_test_checks.py to tighten checking
remove redundant and unnecessary test parameters


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234022 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-03 17:02:48 +00:00
Duncan P. N. Exon Smith
b0d0a65e1d Verifier: Check that inlined-at locations agree
Check that the `MDLocalVariable::getInlinedAt()` in a debug info
intrinsic's variable always matches the `MDLocation::getInlinedAt()` of
its `!dbg` attachment.

The goal here is to get rid of `MDLocalVariable::getInlinedAt()`
entirely (PR22778), since it's expensive and unnecessary, but I'll let
this verifier check bake for a while (a week maybe?) first.  I've
updated the testcases that had the wrong value for `inlinedAt:`.

This checks that things are sane in the IR, but currently things go out
of whack in a few places in the backend.  I'll follow shortly with
assertions in the backend (with code fixes).

If you have out-of-tree testcases that just started failing, here's how
I updated these ones:

 1. The verifier check gives you the basic block, function, instruction,
    and relevant metadata arguments (metadata numbering doesn't
    necessarily match the source file, unfortunately).
 2. Look at the `@llvm.dbg.*()` instruction, and compare the
    `inlinedAt:` fields of the variable argument (second `metadata`
    argument) and the `!dbg` attachment.
 3. Figure out based on the variable `scope:` chain and the functions in
    the file whether the variable has been inlined (and into what), so
    you can determine which `inlinedAt:` is actually correct.  In all of
    the in-tree testcases, the `!MDLocation()` was correct and the
    `!MDLocalVariable()` was wrong, but YMMV.
 4. Duplicate the metadata that you're going to change, and add/drop the
    `inlinedAt:` field from one of them.  Be careful that the other
    references to the same metadata node point at the correct one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234021 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-03 16:54:30 +00:00
Sanjay Patel
f58fa53c99 add checks; remove redundant testing parameters
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234020 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-03 16:44:42 +00:00
Duncan P. N. Exon Smith
2d2520986e CodeGen: Fix MachineInstr::print() for DBG_VALUE
Grab the `MDLocalVariable` from the second-to-last argument; the last
argument is an `MDExpression`, and mixing them up will crash.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234019 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-03 16:23:04 +00:00
Sanjay Patel
8fea4abae0 use update_llc_test_checks.py to tighten checking; remove darwin and sandybridge overspecification
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234017 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-03 16:06:58 +00:00
Simon Pilgrim
af519fbf42 Added vector tests for DAGCombiner::ReassociateOps
Missing vector tests for rL233482

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234015 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-03 15:04:46 +00:00