Tanya Lattner
2a8eb722c7
In r131488 I misunderstood how VREV works. It splits the vector in half and splits each half. Therefore, the real problem was that we were using a VREV64 for a 4xi16, when we should have been using a VREV32.
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Updated test case and reverted change to the PerfectShuffle Table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131529 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 06:42:21 +00:00
Eli Friedman
28b42afcb8
Make some of the fast-isel tests actually test fast-isel (and fix test failures).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131510 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 00:00:10 +00:00
Stuart Hastings
ca1ef48585
X86 pmovsx/pmovzx ignore the upper half of their inputs.
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rdar://problem/6945110
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131493 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 22:13:31 +00:00
Tanya Lattner
c81c9709ef
vrev is incorrectly defined in the perfect shuffle table. The ordering is backwards (should be 0x3210 versus 0x1032) which exposed a bug when doing a shuffle on a 4xi16. I've attached a test case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131488 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 20:48:40 +00:00
Galina Kistanova
416b7117b7
Move test for appropriate directory.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131477 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 19:06:43 +00:00
Eli Friedman
19515b4e52
Add x86 fast-isel for calls returning first-class aggregates. rdar://9435872.
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This is r131438 with a couple small fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131474 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 18:29:03 +00:00
Eli Friedman
c93943b6fe
Back out r131444 and r131438; they're breaking nightly tests. I'll look into
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it more tomorrow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131451 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 02:36:59 +00:00
Eli Friedman
b70eac42e7
Fix test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131444 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 00:39:14 +00:00
Evan Cheng
50ecb195e1
Add target triple so test doesn't fail on Windows machines.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131439 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 00:15:58 +00:00
Eli Friedman
cdc9a20561
Add x86 fast-isel for calls returning first-class aggregates. rdar://9435872.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131438 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 00:13:47 +00:00
Jakob Stoklund Olesen
f5497fb1b4
Teach LiveInterval::isZeroLength about null SlotIndexes.
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When instructions are deleted, they leave tombstone SlotIndex entries.
The isZeroLength method should ignore these null indexes.
This causes RABasic to sometimes spill a callee-saved register in the
abi-isel.ll test, so don't run that test with -regalloc=basic. Prioritizing
register allocation according to spill weight can cause more registers to be
used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131436 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-16 23:50:05 +00:00
Eli Friedman
57f4b03621
Remove dead code. Fix associated test to use FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131424 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-16 21:28:22 +00:00
Eli Friedman
482feb33b2
Make fast-isel work correctly s/uadd.with.overflow intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131420 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-16 21:06:17 +00:00
Eli Friedman
2586b8f936
Basic fast-isel of extractvalue. Not too helpful on its own, given the IR clang generates for cases like this, but it should become more useful soon.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131417 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-16 20:27:46 +00:00
Rafael Espindola
a3f88148e6
Don't produce a vmovntdq if we don't have AVX support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131330 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-14 00:30:01 +00:00
Rafael Espindola
3fa8283744
Make codegen able to handle values of empty types. This is one way
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to fix PR9900. I will keep it open until sable is able to comment on it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131294 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-13 15:18:06 +00:00
Stuart Hastings
88882247d2
Since I can't reproduce the failures from 131261, re-trying with a
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simplified version. <rdar://problem/9298790>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131274 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-13 00:51:54 +00:00
Stuart Hastings
8ad145d729
Revert 131266 and 131261 due to buildbot complaints.
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rdar://problem/9298790
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131269 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-13 00:15:17 +00:00
Stuart Hastings
4c576ca9db
Tweak 131261 (thumb2-cbnz.ll) to generate the intended cbnz.
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rdar://problem/9298790
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131266 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-13 00:10:03 +00:00
Stuart Hastings
5adc646380
Non-fast-isel followup to 129634; correctly handle branches controlled
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by non-CMP expressions. The executable test case (129821) would test
this as well, if we had an "-O0 -disable-arm-fast-isel" LLVM-GCC
tester. Alas, the ARM assembly would be very difficult to check with
FileCheck.
The thumb2-cbnz.ll test is affected; it generates larger code (tst.w
vs. cmp #0 ), but I believe the new version is correct.
rdar://problem/9298790
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131261 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-12 23:36:41 +00:00
Galina Kistanova
60bf5c3197
Correction. Use explicit target triple in the test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131252 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-12 21:55:34 +00:00
Evan Cheng
7139d35165
Re-enable branchfolding common code hoisting optimization. Fixed a liveness test bug and also taught it to update liveins.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131241 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-12 20:30:01 +00:00
Stuart Hastings
007cfce220
Move this test to CodeGen/Thumb. rdar://problem/9416774
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131196 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-11 19:41:28 +00:00
Devang Patel
4243e67bd5
Identify end of prologue (and beginning of function body) using DW_LNS_set_prologue_end line table opcode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131194 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-11 19:22:19 +00:00
Nadav Rotem
42febc6e99
Fixes a bug in the DAGCombiner. LoadSDNodes have two values (data, chain).
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If there is a store after the load node, then there is a chain, which means
that there is another user. Thus, asking hasOneUser would fail. Instead we
ask hasNUsesOfValue on the 'data' value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131183 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-11 14:40:50 +00:00
Nadav Rotem
4301222525
Add custom lowering of X86 vector SRA/SRL/SHL when the shift amount is a splat vector.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131179 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-11 08:12:09 +00:00
Rafael Espindola
41cdc16e73
Revert 131172 as it is causing clang to miscompile itself. I will try
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to provide a reduced testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131176 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-11 03:27:17 +00:00
Evan Cheng
7e20a574eb
Add a late optimization to BranchFolding that hoist common instruction sequences
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at the start of basic blocks to their common predecessor. It's actually quite
common (e.g. about 50 times in JM/lencod) and has shown to be a nice code size
benefit. e.g.
pushq %rax
testl %edi, %edi
jne LBB0_2
## BB#1:
xorb %al, %al
popq %rdx
ret
LBB0_2:
xorb %al, %al
callq _foo
popq %rdx
ret
=>
pushq %rax
xorb %al, %al
testl %edi, %edi
je LBB0_2
## BB#1:
callq _foo
LBB0_2:
popq %rdx
ret
rdar://9145558
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131172 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-11 01:03:01 +00:00
Rafael Espindola
6253c7ca60
Produce a __debug_frame section on darwin ARM when appropriate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131151 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-10 21:04:45 +00:00
Justin Holewinski
f2453a3f2f
PTX: add test cases for cvt, fneg, and selp
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Patch by Dan Bailey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131128 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-10 14:53:13 +00:00
Benjamin Kramer
f51190b697
X86: Add a bunch of peeps for add and sub of SETB.
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"b + ((a < b) ? 1 : 0)" compiles into
cmpl %esi, %edi
adcl $0, %esi
instead of
cmpl %esi, %edi
sbbl %eax, %eax
andl $1, %eax
addl %esi, %eax
This saves a register, a false dependency on %eax
(Intel's CPUs still don't ignore it) and it's shorter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131070 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-08 18:36:07 +00:00
Jakob Stoklund Olesen
bf4e10f2f6
Emit a proper error message when register allocators run out of registers.
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This can't be just an assertion, users can always write impossible inline
assembly. Such an assembly statement should be included in the error message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131024 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-06 21:58:30 +00:00
Justin Holewinski
ab0145d2a9
PTX: add PTX 2.3 language target
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Patch by Wei-Ren Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130980 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-06 11:40:36 +00:00
Eli Friedman
5e926ac651
Re-revert r130877; it's apparently causing a regression on 197.parser,
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possibly related to cbnz formation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130977 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-06 05:23:07 +00:00
Rafael Espindola
7af1a59382
Don't produce a __debug_frame.
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I tested both gdb on a bootstrapped clang and and the gdb testsuite on OS X (snow leopard)
and both are happy using __eh_frame.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130937 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-05 18:43:39 +00:00
Eli Friedman
23d3243e62
Avoid extra vreg copies for arguments passed in registers. Specifically, this can make MachineCSE more effective in some cases (especially in small functions). PR8361 / part of rdar://problem/8259436 .
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130928 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-05 16:53:34 +00:00
Jakob Stoklund Olesen
49b2803ec2
Prepare remaining tests for -join-physreg going away.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130893 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 23:54:59 +00:00
Jakob Stoklund Olesen
61396aebee
Fix a batch of x86 tests to be coalescer independent.
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Most of these tests require a single mov instruction that can come either before
or after a 2-addr instruction. -join-physregs changes the behavior, but the
results are equivalent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130891 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 23:54:51 +00:00
Dan Gohman
becfb889aa
Give this test an explicit register allocator, so that it can work even if
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the default register allocator is changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130883 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 23:14:02 +00:00
Bill Wendling
d29052bf26
SjLj EH could produce a machine basic block that legitimately has more than one
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landing pad as its successor.
SjLj exception handling jumps to the correct landing pad via a switch statement
that's generated right before code-gen. Loosen the constraint in the machine
instruction verifier to allow for this. Note, this isn't the most rigorous check
since we cannot determine where that switch statement came from. But it's
marginally better than turning this check off when SjLj exceptions are used.
<rdar://problem/9187612>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130881 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 22:54:05 +00:00
Eli Friedman
baf717a08a
Re-commit r130862 with a minor change to avoid an iterator running off the edge in some cases.
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Original message:
Teach MachineCSE how to do simple cross-block CSE involving physregs. This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130877 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 22:10:36 +00:00
Galina Kistanova
ff4f6eaf4e
This test fails on ARM. The test shouldn't explicitly specify alignment (and alignment 4 is wrong) and requires hard-float.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130875 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 21:57:44 +00:00
Eli Friedman
24d4c9911e
Back out r130862; it appears to be breaking bootstrap.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130867 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 20:48:42 +00:00
Eli Friedman
49cec1d818
Teach MachineCSE how to do simple cross-block CSE involving physregs. This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 .
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130862 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 19:54:24 +00:00
Jakob Stoklund Olesen
96169b189c
Fix more register and coalescing dependencies.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130859 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 19:02:11 +00:00
Jakob Stoklund Olesen
28e104bcb0
Explicitly request physreg coalesing for a bunch of Thumb2 unit tests.
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These tests all follow the same pattern:
mov r2, r0
movs r0, #0
$CMP r2, r1
it eq
moveq r0, #1
bx lr
The first 'mov' can be eliminated by rematerializing 'movs r0, #0 ' below the
test instruction:
$CMP r0, r1
mov.w r0, #0
it eq
moveq r0, #1
bx lr
So far, only physreg coalescing can do that. The register allocators won't yet
split live ranges just to eliminate copies. They can learn, but this particular
problem is not likely to show up in real code. It only appears because r0 is
used for both the function argument and return value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130858 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 19:02:07 +00:00
Jakob Stoklund Olesen
14c76fed2d
FileCheckize and break dependence on coalescing order.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130856 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 19:02:01 +00:00
Jakob Stoklund Olesen
f695b3ad62
Explicitly request -join-physregs for some tests that depend on it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130855 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 19:01:59 +00:00
Devang Patel
64915dec28
Do not emit location expression size twice.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130854 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 19:00:57 +00:00
Akira Hatanaka
921c58b001
Remove LLVM IR metadata in test case committed in r130847.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130849 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 18:28:36 +00:00
Akira Hatanaka
6b7588e6c4
Prevent instructions using $gp from being placed between a jalr and the instruction that restores the clobbered $gp.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130847 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 17:54:27 +00:00
Jakob Stoklund Olesen
20bc5acfb6
Don't depend on the physreg coalescing order.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130818 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 01:01:47 +00:00
Jakob Stoklund Olesen
c74399f8b4
Don't run this test through -regalloc=basic.
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The basic allocator is really bad about hinting, so it doesn't eliminate all
copies when physreg joining is disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130817 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 01:01:44 +00:00
Jakob Stoklund Olesen
22d28d2372
Fix register-dependent XCore tests
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130816 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 01:01:41 +00:00
Jakob Stoklund Olesen
9dfb367a42
Fix register-dependent test in MSP430.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130815 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 01:01:39 +00:00
Jakob Stoklund Olesen
feaf34758a
Fix a bunch of ARM tests to be register allocation independent.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130800 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-03 22:31:21 +00:00
Bill Wendling
9493a285d1
Replace the "movnt" intrinsics with a native store + nontemporal metadata bit.
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<rdar://problem/8460511>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130791 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-03 21:11:17 +00:00
Evan Cheng
f35907f66b
Make the test less likely to fail with minor changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130778 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-03 19:09:32 +00:00
Bob Wilson
22a751ac13
Remove test for iOS divmod function, since that is disabled for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130769 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-03 17:54:49 +00:00
Bruno Cardoso Lopes
54ad87ab78
Add a few ARM coprocessor intrinsics. Testcases included
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130763 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-03 17:29:22 +00:00
Dan Gohman
cca82149ad
Add an unfolded offset field to LSR's Formula record. This is used to
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model constants which can be added to base registers via add-immediate
instructions which don't require an additional register to materialize
the immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130743 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-03 00:46:49 +00:00
Rafael Espindola
2866edf120
Add 130690 back.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130693 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-02 15:58:16 +00:00
Rafael Espindola
b2d7336fde
Revert while I debug the tests that use march but not mtriple.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130691 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-02 15:42:31 +00:00
Rafael Espindola
433771c514
Move ppc OS X to cfi too. I am building it on an old ppc mini, but it will take some time.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130690 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-02 15:00:52 +00:00
Rafael Espindola
450a5a1207
Add r130623 back now that ELF has been fixed to work with -fno-dwarf2-cfi-asm.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130658 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-01 15:44:13 +00:00
Rafael Espindola
5426a9ee37
GCC uses a different encoding of pointers in the FDE when using
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-fno-dwarf2-cfi-asm. Implement the same behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130637 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-01 04:49:54 +00:00
Rafael Espindola
2b3e12d0cb
Revert the previous patch while I figure out how to make llvm-gcc
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less agressive about disabling cfi on linux :-(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130626 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-30 23:03:44 +00:00
Rafael Espindola
89fc9e8f5e
Enable CFI on OS X.
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Currently the output should be almost identical to the one produced by CodeGen
to make the transition easier.
The only two differences I know of are:
* Some files get an extra advance loc of size 0. This will be fixed when
relaxations are enabled.
* The optimization of declaring an EH symbol as an external variable is not
implemented. This is a subset of adding the nounwind attribute, so we if really
this at -O0 we should probably do it at the IL level.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130623 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-30 22:29:54 +00:00
Jakob Stoklund Olesen
8e1e4cf226
Allow folded spills in test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130599 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-30 08:00:50 +00:00
Jakob Stoklund Olesen
d5b679c8ce
Weekly fix of register allocation dependent unit tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130567 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-30 01:37:52 +00:00
Eli Friedman
b2b03fc2fa
Make FastEmit_ri_ try a bit harder to succeed for supported operations; FastEmit_i can fail for non-Thumb2 ARM. Makes ARMSimplifyAddress work correctly, and reduces the number of fast-isel bailouts on non-Thumb ARM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130560 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29 23:34:52 +00:00
Eli Friedman
c573e2c7ea
Switch to ImmLeaf (which can be used by FastISel) for a few more common ARM/Thumb2 patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130552 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29 22:48:03 +00:00
Eli Friedman
51864a1d2b
Fix run-line, again. :(
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130540 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29 21:33:03 +00:00
Eli Friedman
9ebf57ae13
Re-committing r130454, which does not in fact break anything.
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Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register.
rdar://problem/9338332 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130539 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29 21:22:56 +00:00
Eric Christopher
bcf26aee86
Add trunc->branch support, this won't help with clang's i8->i1 truncations
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for bools, but is a start.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130534 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29 20:02:39 +00:00
Rafael Espindola
7b11a4cbdc
Change DwarfCFIException's member variables to track what it actually
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emmits: .cfi_personality, .cfi_lsda and the moves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130503 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29 14:48:51 +00:00
Andrew Trick
d49ffe8284
Teach Thumb2 isel to fold and->rotr ==> ROR.
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Generalization of Nate Begeman's patch!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130502 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29 14:18:15 +00:00
Andrew Trick
e02a1501e7
Combine thumb2-ror tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130498 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29 14:02:41 +00:00
Eli Friedman
6e6014cfb3
Revert r130454; apparently this doesn't actually work.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130462 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 23:55:14 +00:00
Eli Friedman
73359c1327
Fix runline.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130455 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 23:12:24 +00:00
Eli Friedman
2f7fcd7198
Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register.
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rdar://problem/9338332 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130454 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 23:03:25 +00:00
Eli Friedman
d227eedf82
fast-isel sret calls, try 2. We actually do need to do something on x86-32. rdar://problem/9303592 .
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130429 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 20:19:12 +00:00
Eli Friedman
3fb6e00238
Actually revert r130348 correctly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130418 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 18:20:24 +00:00
Eli Friedman
6cf31b0a1a
Revert r130348; causing buildbot issues on x86-32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130412 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 18:06:10 +00:00
Devang Patel
c26f5447e3
Teach dwarf writer to handle complex address expression for .debug_loc entries.
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This fixes clang generated blocks' variables' debug info.
Radar 9279956.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130373 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 02:22:40 +00:00
Eli Friedman
bd1253809b
Fix a silly mistake in r130338.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130360 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 00:42:03 +00:00
Justin Holewinski
5a3cb924c6
PTX: support for bitwise operations on predicates
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- selection of bitwise preds (AND, OR, XOR)
- new bitwise.ll test
Patch by Dan Bailey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130353 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 00:19:51 +00:00
Eli Friedman
8211a6a61d
fast-isel sret. We actually don't need to do anything special on x86. :) rdar://problem/9303592 .
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130348 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-27 23:58:52 +00:00
Eli Friedman
2790ba8e5a
Make the fast-isel code for literal 0.0 a bit shorter/faster, since 0.0 is common. rdar://problem/9303592 .
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130338 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-27 22:41:55 +00:00
Evan Cheng
309db7c947
If converter was being too cute. It look for root BBs (which don't have
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successors) and use inverse depth first search to traverse the BBs. However
that doesn't work when the CFG has infinite loops. Simply do a linear
traversal of all BBs work just fine.
rdar://9344645
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130324 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-27 19:32:43 +00:00
Jakob Stoklund Olesen
93e110ba34
Also add <imp-def> operands for defined and dead super-registers when rewriting.
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We cannot rely on the <imp-def> operands added by LiveIntervals in all cases as
demonstrated by the test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130313 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-27 17:42:31 +00:00
Eli Friedman
547eb4fd56
Fix an edge case involving branches in fast-isel on x86.
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rdar://problem/9303306 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130272 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-27 01:34:27 +00:00
Evan Cheng
554daa67bd
Be careful about scheduling nodes above previous calls. It increase usages of
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more callee-saved registers and introduce copies. Only allows it if scheduling
a node above calls would end up lessen register pressure.
Call operands also has added ABI restrictions for register allocation, so be
extra careful with hoisting them above calls.
rdar://9329627
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130245 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-26 21:31:35 +00:00
Evan Cheng
90fab0f9d8
This test should be in MC. It breaks with changes to scheduling / register allocation so it's being removed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130243 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-26 21:09:04 +00:00
Benjamin Kramer
efa81404a5
Force a triple on this test to unbreak windows buildbots.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130226 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-26 18:47:43 +00:00
Dan Gohman
a61e73bda5
Fast-isel support for simple inline asms.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130205 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-26 17:18:34 +00:00
Rafael Espindola
cace5b8caf
Add test for PR9743.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130198 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-26 14:17:42 +00:00
Chris Lattner
bffc2b4af1
don't emit the symbol name twice for local bss and common
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symbols. For example, don't emit:
.comm _i,4,2 ## @i
## @i
instead emit:
.comm _i,4,2 ## @i
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130192 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-26 06:14:13 +00:00
Eric Christopher
546c1ffe5f
Make this test disable fast isel as it's not needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130165 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-25 22:39:46 +00:00
Akira Hatanaka
f48eb533d5
Lower BlockAddress node when relocation-model is static.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130131 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-25 17:10:45 +00:00