getTargetNode and SelectNodeTo to reduce duplication, and to
make some of the getTargetNode code available to SelectNodeTo.
Use SelectNodeTo instead of getTargetNode in several new
interesting cases, as it mutates nodes in place instead of
creating new ones.
This triggers some scheduling behavior differences due to nodes
being presented to the scheduler in a different order. Some of the
arbitrary scheduling decisions it makes are now arbitrarily made
differently. This is visible in CodeGen/PowerPC/LargeAbsoluteAddr.ll,
where a trivial scheduling difference led to a trivial register
allocation difference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53203 91177308-0d34-0410-b5e6-96231b3b80d8
SelectionDAG::SelectNodeTo in the instruction selector. This
updates existing nodes in place instead of creating new ones.
Go back to selecting ISD::DBG_LABEL nodes into
TargetInstrInfo::DBG_LABEL nodes instead of leaving them
unselected, now that SelectNodeTo allows us to update them
in place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53057 91177308-0d34-0410-b5e6-96231b3b80d8
- Use a more accurate heuristic for the size of the hashtable.
- Use bitwise and instead of modulo since the size is a power of two.
- Use new[] instead of malloc().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52951 91177308-0d34-0410-b5e6-96231b3b80d8
the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.
Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.
This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52943 91177308-0d34-0410-b5e6-96231b3b80d8
and fix the bug that it uncovers: inlining a pattern fragment could bring
in other pattern fragments if the inlinee hadn't already been inlined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52888 91177308-0d34-0410-b5e6-96231b3b80d8
<16 x float> is 64-byte aligned (for some reason),
which gets us into the stack realignment code. The
computation changing FP-relative offsets to SP-relative
was broken, assiging a spill temp to a location
also used for parameter passing. This
fixes it by rounding up the stack frame to a multiple
of the largest alignment (I concluded it wasn't fixable
without doing this, but I'm not very sure.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52750 91177308-0d34-0410-b5e6-96231b3b80d8
Added abstract class MemSDNode for any Node that have an associated MemOperand
Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and
atomic.lss => atomic.load.sub
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52706 91177308-0d34-0410-b5e6-96231b3b80d8
and better control the abstraction. Rename the type
to MVT. To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits(). Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52044 91177308-0d34-0410-b5e6-96231b3b80d8
in DAGISelEmitter output. This bug was recently uncovered by the
addition of patterns for CALL32m and CALL64m, which are nodes
that now have both MemOperands and variadic_ops.
This bug was especially visible with PIC in various configurations,
because the new patterns are matching the indirect call code used
in many PIC configurations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51877 91177308-0d34-0410-b5e6-96231b3b80d8
index for the input pattern in terms of the output pattern. Instead
keep track of how many fixed operands the input pattern actually
has, and have the input matching code pass the output-emitting
function that index value. This simplifies the code, disentangles
variables_ops from the support for predication operations, and
makes variable_ops more robust.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51808 91177308-0d34-0410-b5e6-96231b3b80d8
It can be handy to have all information about options gathered in a single place
to provide an overview of all supported options. This patch allows the following:
def Options : OptionList<[
(switch_option "E", (help "Help string")),
(alias_option "quiet", "q")
...
]>;
Tool-specific option properties (like 'append_cmd') have (obviously) no meaning in
this context, so the only properties that are allowed are 'help' and 'required'.
See usage example in examples/Clang.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51754 91177308-0d34-0410-b5e6-96231b3b80d8
The following is now allowed:
(case (not_empty "o"), do_something, ...)
This didn't work previously because "-o" is built-in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51751 91177308-0d34-0410-b5e6-96231b3b80d8
The following is now legal:
(case (in_language "c"),
(case (switch_on "E"), "gcc -x c -E $INFILE", (default), "gcc -x c $INFILE"),
(default),
"gcc $INFILE $OUTFILE")
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51748 91177308-0d34-0410-b5e6-96231b3b80d8
For instance, the following command:
llvmc2 -E hello.c
now generates a file with the correct suffix (hello.i).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51733 91177308-0d34-0410-b5e6-96231b3b80d8
Used like this: (cmd_line "$CALL(MyHook) --option -o $ENV(VARIABLE) $CALL(AnotherHook)")
Also works with case expressions.
Hook declarations are auto-generated, the definitions should be provided by the user
(just drop a .cpp file in the tools/llvmc2 directory).
Hooks should live in the "hooks" namespace and have type std::string hooks::Hook(void).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51732 91177308-0d34-0410-b5e6-96231b3b80d8
cases due to an isel deficiency already noted in
lib/Target/X86/README.txt, but they can be matched in this fold-call.ll
testcase, for example.
This is interesting mainly because it exposes a tricky tblgen bug;
tblgen was incorrectly computing the starting index for variable_ops
in the case of a complex pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51706 91177308-0d34-0410-b5e6-96231b3b80d8
definitions. This adds a new construct, "discard", for indicating
that a named node in the input matching pattern is to be discarded,
instead of corresponding to a node in the output pattern. This
allows tblgen to know where the arguments for the varaible_ops are
supposed to begin.
This fixes "rdar://5791600", whatever that is ;-).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51699 91177308-0d34-0410-b5e6-96231b3b80d8
instruction to execute. This can be used for transformations (like two-address
conversion) to remat an instruction instead of generating a "move"
instruction. The idea is to decrease the live ranges and register pressure and
all that jazz.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51660 91177308-0d34-0410-b5e6-96231b3b80d8
DAG instruction selectors. Introudce a dedicated header file for this part:
include/llvm/CodeGen/DAGISelHeader.h
TableGen now only generates the include preprocessor directive to include this
new header.
This is a preparation for supporting multiple implementations of instruction
selectors in the future.
Reviewed and approved by Evan and Dan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51102 91177308-0d34-0410-b5e6-96231b3b80d8
Makes it possible to use options with names like "Wa,".
Also fixes the -Wall option handling as a side-effect.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50973 91177308-0d34-0410-b5e6-96231b3b80d8
string began at a power of 2 in the string index. For example, if "ret" started
at position 16, the ret instruction would be assigned code 16, but the mask would be AsmChars[] + Code & 15, not Code & 31.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49433 91177308-0d34-0410-b5e6-96231b3b80d8
CodeGenDAGPatterns, where it can be used in other tablegen backends.
This allows the inference to be done for DAGISelEmitter so that it
gets accurate mayLoad/mayStore/isSimpleLoad flags.
This brings MemOperand functionality back to where it was before
48329. However, it doesn't solve the problem of anonymous patterns
which expand to code that does loads or stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49123 91177308-0d34-0410-b5e6-96231b3b80d8
start of a filename, not a filename+length. All clients can produce a
null terminated name, and the system api's require null terminated
strings anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49041 91177308-0d34-0410-b5e6-96231b3b80d8
on ideas mentioned in PR686.
Written by Mikhail Glushenkov and contributed by Codedgers, Inc.
Old llvmc will be removed soon after new one will have all its properties.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48699 91177308-0d34-0410-b5e6-96231b3b80d8
flags. This is needed by the new legalize types
infrastructure which wants to expand the 64 bit
constants previously used to hold the flags on
32 bit machines. There are two functional changes:
(1) in LowerArguments, if a parameter has the zext
attribute set then that is marked in the flags;
before it was being ignored; (2) PPC had some bogus
code for handling two word arguments when using the
ELF 32 ABI, which was hard to convert because of
the bogusness. As suggested by the original author
(Nicolas Geoffray), I've disabled it for the moment.
Tested with "make check" and the Ada ACATS testsuite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48640 91177308-0d34-0410-b5e6-96231b3b80d8
Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48329 91177308-0d34-0410-b5e6-96231b3b80d8
field to 32 bits, thus enabling correct handling of ByVal
structs bigger than 0x1ffff. Abstract interface a bit.
Fixes gcc.c-torture/execute/pr23135.c and
gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing
on ppc32, quietly producing wrong code on x86-32.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48122 91177308-0d34-0410-b5e6-96231b3b80d8
were being pruned in patterns where a variable was used more than once, e.g.:
(or (and R32C:$rA, R32C:$rC), (and R32C:$rB, (not R32C:$rC)))
In this example, $rC is used more than once and is actually significant to
instruction selection pattern matching when commuted variants are produced.
This patch scans the pattern's clauses and collects the variables, creating
a set of variables that are used more than once. TreePatternNode::isIsomorphicTo()
also understands that multiply-used variables are significant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47950 91177308-0d34-0410-b5e6-96231b3b80d8
%r3 on PPC) in their ASM files. However, it's hard for humans to read
during debugging. Adding a new field to the register data that lets you
specify a different name to be printed than the one that goes into the
ASM file -- %x3 instead of %r3, for instance.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47534 91177308-0d34-0410-b5e6-96231b3b80d8
tblgen will complain if a sign-extended constant does not fit into a
data type smaller than i32, e.g., i16. This causes a problem when certain
hex constants are used, such as 0xff for byte masks or immediate xor
values.
tblgen will try the sign-extended value first and, if the sign extended
value would overflow, it tries to see if the unsigned value will fit.
Consequently, a software developer can now safely incant:
(XORHIr16 R16C:$rA, 0xffff)
which is somewhat clearer and more informative than incanting:
(XORHIr16 R16C:$rA, (i16 -1))
even if the two are bitwise equivalent.
Tblgen also outputs the 64-bit unsigned constant in the generated ISel code
when getTargetConstant() is invoked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47188 91177308-0d34-0410-b5e6-96231b3b80d8
it follows the order of the enum, not alphabetical.
The motivation is to make -mattr=+ssse3,+sse41
select SSE41 as it ought to. Added "ignored"
enum values of 0 to PPC and SPU to avoid compiler
warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47143 91177308-0d34-0410-b5e6-96231b3b80d8
1) ConstantFP is now expand by default
2) ConstantFP is not turned into TargetConstantFP during Legalize
if it is legal.
This allows ConstantFP to be handled like Constant, allowing for
targets that can encode FP immediates as MachineOperands.
As a bonus, fix up Itanium FP constants, which now correctly match,
and match more constants! Hooray.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47121 91177308-0d34-0410-b5e6-96231b3b80d8
initializer problem, a minor tweak to the way the
DAGISelEmitter finds load/store nodes, and a renaming of the
new PseudoSourceValue objects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46827 91177308-0d34-0410-b5e6-96231b3b80d8
DAGUpdateListener object pointer instead of just returning a vector
of deleted nodes. This makes the interfaces more efficient (no more
allocating a vector [at least a malloc], filling it in, then walking
it) and more clean. This also allows the client to be notified of
nodes that are *changed* but not deleted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46677 91177308-0d34-0410-b5e6-96231b3b80d8
Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46659 91177308-0d34-0410-b5e6-96231b3b80d8
the pattern when generating matchin code.
The first (and currently, only) attribute causes the immediate parent node of the ComplexPattern operand to be passed into the matching code rather than the node at the root of the entire DAG containing the pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46606 91177308-0d34-0410-b5e6-96231b3b80d8
in the backend. Introduce a new SDNode type, MemOperandSDNode, for
holding a MemOperand in the SelectionDAG IR, and add a MemOperand
list to MachineInstr, and code to manage them. Remove the offset
field from SrcValueSDNode; uses of SrcValueSDNode that were using
it are all all using MemOperandSDNode now.
Also, begin updating some getLoad and getStore calls to use the
PseudoSourceValue objects.
Most of this was written by Florian Brander, some
reorganization and updating to TOT by me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46585 91177308-0d34-0410-b5e6-96231b3b80d8
both work right according to the new flags.
This removes the TII::isReallySideEffectFree predicate, and adds
TII::isInvariantLoad.
It removes NeverHasSideEffects+MayHaveSideEffects and adds
UnmodeledSideEffects as machine instr flags. Now the clients
can decide everything they need.
I think isRematerializable can be implemented in terms of the
flags we have now, though I will let others tackle that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45843 91177308-0d34-0410-b5e6-96231b3b80d8
x86 backend where instructions were not marked maystore/mayload, and perf issues where
instructions were not marked neverHasSideEffects. It would be really nice if we could
write patterns for copy instructions.
I have audited all the x86 instructions down to MOVDQAmr. The flags on others and on
other targets are probably not right in all cases, but no clients currently use this
info that are enabled by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45829 91177308-0d34-0410-b5e6-96231b3b80d8
all clients over to using predicates instead of these flags directly.
These are now private values which are only to be used to statically
initialize the tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45692 91177308-0d34-0410-b5e6-96231b3b80d8
TargetInstrDescriptor class and shrink to 16-bits, saving a
word in TargetInstrDescriptor. Add some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45686 91177308-0d34-0410-b5e6-96231b3b80d8
over to using them, instead of diddling Flags directly. Change the
various flags from const variables to enums.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45677 91177308-0d34-0410-b5e6-96231b3b80d8
instead of "ISD::STORE". This allows us to mark target-specific dag
nodes as storing (such as ppc byteswap stores). This allows us to remove
more explicit isStore flags from the .td files.
Finally, add a warning for when a .td file contains an explicit
isStore and tblgen is able to infer it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45654 91177308-0d34-0410-b5e6-96231b3b80d8
occured in a pattern, but failed miserably. The new code works for
any instruction that has a store in its pattern, including all the
x86 mem op mem instructions.
The only target-independent code that uses this is branch folding,
so this won't change anything in practice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45648 91177308-0d34-0410-b5e6-96231b3b80d8
out, DAGISelEmitter can compute it in its ctor, which simplifies some code.
Now we can use CodegenDAGPatterns in other parts of tblgen that want access
to dag pattern info, woo!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45636 91177308-0d34-0410-b5e6-96231b3b80d8
The only difference in output is that we now print them in alphabetical
order instead of reverse alphabetical order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45635 91177308-0d34-0410-b5e6-96231b3b80d8
Split the pattern parsing code out from the dag isel emitter into it's own file.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45632 91177308-0d34-0410-b5e6-96231b3b80d8
throw exceptions", just mark intrinsics with the nounwind
attribute. Likewise, mark intrinsics as readnone/readonly
and get rid of special aliasing logic (which didn't use
anything more than this anyway).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44544 91177308-0d34-0410-b5e6-96231b3b80d8
This makes the parser much easier to understand, eliminates a ton of global variables,
and gives tblgen nice caret diagnostics. It is also faster, but tblgen probably doesn't
care about performance.
There are a couple of FIXMEs which I will take care of next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44274 91177308-0d34-0410-b5e6-96231b3b80d8
I added the lexing files to the VStudio projects and removed the .l files from the
VStudio projects. There was a problem with use of strtoll in TGLexer.cpp and Chris
suggested switching to strtol, so that's included here.
Additionally, this checkin adds minimal x64 builds to the VStudio builds. Build issues
related to x64 in the windows specific files for DynamicLibrary.inc and Singals.inc
are worked around, but not ultimately solved. Binaries used to be stored in
...\win32\{Debug|Release}
but are now kept in
...\win32\bin\{win32|x64}\{Debug|Release}
intermediate files will continue to be stored in the individual project directories under
win32.
Some names will likely change in the future to reflect that the vstudio projects
are no longer 32-bit only, but I wanted to get things up and running today so kept away
from bigger restructuring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44260 91177308-0d34-0410-b5e6-96231b3b80d8
in favour of teaching CCAssignToStack that size 0 and/or align
0 means to use the ABI values. This seems a neater solution.
It is safe since no legal value type has size 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44107 91177308-0d34-0410-b5e6-96231b3b80d8
to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44056 91177308-0d34-0410-b5e6-96231b3b80d8
This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43997 91177308-0d34-0410-b5e6-96231b3b80d8
dealing with types whose size & alignment are
different on different subtargets. Use it for x86 f80.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43988 91177308-0d34-0410-b5e6-96231b3b80d8
the one that takes an operand list instead of explicit
operands. There is one left though, the more interesting
one :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43290 91177308-0d34-0410-b5e6-96231b3b80d8
take a deleted nodes vector, instead of requiring it.
One more significant change: Implement the start of a legalizer that
just works on types. This legalizer is designed to run before the
operation legalizer and ensure just that the input dag is transformed
into an output dag whose operand and result types are all legal, even
if the operations on those types are not.
This design/impl has the following advantages:
1. When finished, this will *significantly* reduce the amount of code in
LegalizeDAG.cpp. It will remove all the code related to promotion and
expansion as well as splitting and scalarizing vectors.
2. The new code is very simple, idiomatic, and modular: unlike
LegalizeDAG.cpp, it has no 3000 line long functions. :)
3. The implementation is completely iterative instead of recursive, good
for hacking on large dags without blowing out your stack.
4. The implementation updates nodes in place when possible instead of
deallocating and reallocating the entire graph that points to some
mutated node.
5. The code nicely separates out handling of operations with invalid
results from operations with invalid operands, making some cases
simpler and easier to understand.
6. The new -debug-only=legalize-types option is very very handy :),
allowing you to easily understand what legalize types is doing.
This is not yet done. Until the ifdef added to SelectionDAGISel.cpp is
enabled, this does nothing. However, this code is sufficient to legalize
all of the code in 186.crafty, olden and freebench on an x86 machine. The
biggest issues are:
1. Vectors aren't implemented at all yet
2. SoftFP is a mess, I need to talk to Evan about it.
3. No lowering to libcalls is implemented yet.
4. Various operations are missing etc.
5. There are FIXME's for stuff I hax0r'd out, like softfp.
Hey, at least it is a step in the right direction :). If you'd like to help,
just enable the #ifdef in SelectionDAGISel.cpp and compile code with it. If
this explodes it will tell you what needs to be implemented. Help is
certainly appreciated.
Once this goes in, we can do three things:
1. Add a new pass of dag combine between the "type legalizer" and "operation
legalizer" passes. This will let us catch some long-standing isel issues
that we miss because operation legalization often obfuscates the dag with
target-specific nodes.
2. We can rip out all of the type legalization code from LegalizeDAG.cpp,
making it much smaller and simpler. When that happens we can then
reimplement the core functionality left in it in a much more efficient and
non-recursive way.
3. Once the whole legalizer is non-recursive, we can implement whole-function
selectiondags maybe...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42981 91177308-0d34-0410-b5e6-96231b3b80d8
1.
[(set GR32:$dst, (add GR32:$src1, GR32:$src2)),
(modify EFLAGS)]
This indicates the source pattern expects the instruction would produce 2 values. The first is the result of the addition. The second is an implicit definition in register EFLAGS.
2.
def : Pat<(parallel (addc GR32:$src1, GR32:$src2), (modify EFLAGS)), ()>
Similar to #1 except this is used for def : Pat patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41897 91177308-0d34-0410-b5e6-96231b3b80d8
This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40807 91177308-0d34-0410-b5e6-96231b3b80d8
This commit fixes two things. One is a pair of VStudio compiler errors stemming from variables
which defined within the for loop statement and also within the body of the for loop. I fixed these
by renaming one of the two variables. Additionally, I've made the Function*->ExFunc map in
ExternalFunctions.cpp a ManagedStatic object, so that cleanup will be done on llvm_shutdown. In repeated
uses of the interpreter, where the same Function* address may get used for completely differnet functions,
this was causing a crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40558 91177308-0d34-0410-b5e6-96231b3b80d8
instruction flag, and use the flag along with a virtual member function
hook for targets to override if there are instructions that are only
trivially rematerializable with specific operands (i.e. constant pool
loads).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37728 91177308-0d34-0410-b5e6-96231b3b80d8
with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37644 91177308-0d34-0410-b5e6-96231b3b80d8
types of the iAny types involved in the overloaded intrinsic. Thus, we
can't use the argument number as the index but have to count them separately
in order to index Tys correctly. This patch rectifies this situation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37296 91177308-0d34-0410-b5e6-96231b3b80d8
feature is set, then the features in the implied list should be set also.
The opposite is also enforced: if a feature in the implied list isn't set,
then the feature that owns that implies list shouldn't be set either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36756 91177308-0d34-0410-b5e6-96231b3b80d8
Don't assert everytime an intrinsic name isn't recognized. Instead, make
the assert optional when callin getIntrinsicID(). This allows the assembler
to handle invalid intrinsic names gracefully.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36120 91177308-0d34-0410-b5e6-96231b3b80d8
Implement code generation for overloaded intrinsic functions. The basic
difference is that "actual" argument types must be provided when
constructing intrinsic names and types. Also, for recognition, only the
prefix is examined. If it matches, the suffix is assumed to match. The
suffix is checked by the Verifier, however.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35539 91177308-0d34-0410-b5e6-96231b3b80d8
to construct FunctionType in separate function, and, have getDeclaration
return a Function instead of a Constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34008 91177308-0d34-0410-b5e6-96231b3b80d8
Implement the arbitrary bit-width integer feature. The feature allows
integers of any bitwidth (up to 64) to be defined instead of just 1, 8,
16, 32, and 64 bit integers.
This change does several things:
1. Introduces a new Derived Type, IntegerType, to represent the number of
bits in an integer. The Type classes SubclassData field is used to
store the number of bits. This allows 2^23 bits in an integer type.
2. Removes the five integer Type::TypeID values for the 1, 8, 16, 32 and
64-bit integers. These are replaced with just IntegerType which is not
a primitive any more.
3. Adjust the rest of LLVM to account for this change.
Note that while this incremental change lays the foundation for arbitrary
bit-width integers, LLVM has not yet been converted to actually deal with
them in any significant way. Most optimization passes, for example, will
still only deal with the byte-width integer types. Future increments
will rectify this situation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33113 91177308-0d34-0410-b5e6-96231b3b80d8
not be used for anything other than backwards compat constraint handling.
Add support for a new DisableEncoding property which contains a list of
registers that should not be encoded by the generated code emitter. Convert
the codeemitter generator to use this, fixing some PPC JIT regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31769 91177308-0d34-0410-b5e6-96231b3b80d8
that there were two input operands before the variable operand portion. This
*happened* to be true for all call instructions, which took a chain and a
destination, but was not true for the PPC BCTRL instruction, whose destination
is implicit.
Making this code more general allows elimination of the custom selection logic
for BCTRL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31732 91177308-0d34-0410-b5e6-96231b3b80d8
X86ISD::CMP, etc.) instead of SDNode names (add, x86cmp, etc). We now allow
multiple SDNodes to map to the same SelectionDAG node (e.g. store, indexed
store).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31575 91177308-0d34-0410-b5e6-96231b3b80d8
way to reach the load via any nodes that would be folded. Start from the
root of the matched sub-tree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30956 91177308-0d34-0410-b5e6-96231b3b80d8
chain operand to point to the load being folded. Now we relax this, traversing
up the chain, if it doesn't reach the load, then it's ok. We will create a
TokenFactor (of all the chain operands and the load's chain) to capture all
the control flow dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30897 91177308-0d34-0410-b5e6-96231b3b80d8
The dag/inst combiners often 'simplify' the masked value based on whether
or not the bits are live or known zero/one. This is good and dandy, but
often causes special case patterns to fail, such as alpha's CMPBGE pattern,
which looks like "(set GPRC:$RC, (setuge (and GPRC:$RA, 255), (and GPRC:$RB, 255)))".
Here the pattern for (and X, 255) should match actual dags like (and X, 254) if
the dag combiner proved that the missing bits are already zero (one for 'or').
For CodeGen/Alpha/cmpbge.ll:test2 for example, this results in:
sll $16,1,$0
cmpbge $0,$17,$0
ret $31,($26),1
instead of:
sll $16,1,$0
and $0,254,$0
and $17,255,$1
cmpule $1,$0,$0
ret $31,($26),1
... and requires no target-specific code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30871 91177308-0d34-0410-b5e6-96231b3b80d8
AggregateString += "\0\0";
Doesn't add two nuls to the AggregateString (for obvious reasons), which
broke the asmprinter when the first character of an asm string was not
literal text.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30625 91177308-0d34-0410-b5e6-96231b3b80d8
has no associated operand. This is useful for portably encoding stuff like
the comment character into an asm string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30617 91177308-0d34-0410-b5e6-96231b3b80d8
the branch's chain is also produced by cmp.
[ch, r : ld]
^ ^
| |
[XX]--/ \- [flag : cmp]
^ ^
| |
\---[br flag]-
Remove an isel check which prevents loads from being folded into cmp / test
instructions.
2) Whenever possible, delete a selected node to allow more load folding
opportunities. Note not all nodes can be deleted after it has been
selected. Some may have simply morphed; some have not changed at all (e.g.
EntryToken).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30242 91177308-0d34-0410-b5e6-96231b3b80d8
actually *removes* one of the operands, instead of just assigning both operands
the same register. This make reasoning about instructions unnecessarily complex,
because you need to know if you are before or after register allocation to match
up operand #'s with the target description file.
Changing this also gets rid of a bunch of hacky code in various places.
This patch also includes changes to fold loads into cmp/test instructions in
the X86 backend, along with a significant simplification to the X86 spill
folding code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30108 91177308-0d34-0410-b5e6-96231b3b80d8
- Clean up the code generated by tablegen:
* AddToISelQueue now takes one argument.
* ComplexPattern matching condition can now be shared.
* Eliminate passing unnecessary arguments to emit routines.
* Eliminate some unneeded SDOperand declarations in select routines.
* Other minor clean ups.
- This reduces foot print slightly: X86ISelDAGToDAG.o is reduced from 971k
to 823k.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29892 91177308-0d34-0410-b5e6-96231b3b80d8
introduced by previous commit.
- SelectCode now returns a SDNode*. If it is not null, the selected node
produces the same number of results as the input node. The seletion loop
is responsible for calling ReplaceAllUsesWith() to replace the input node
with the output target node. For other cases, e.g. when load is folded,
the selection code is responsible for calling ReplaceAllUsesOfValueWith()
and SelectCode returns NULL.
- Other clean ups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29602 91177308-0d34-0410-b5e6-96231b3b80d8
in the start of an array and a count of operands where applicable. In many
cases, the number of operands is known, so this static array can be allocated
on the stack, avoiding the heap. In many other cases, a SmallVector can be
used, which has the same benefit in the common cases.
I updated a lot of code calling getNode that takes a vector, but ran out of
time. The rest of the code should be updated, and these methods should be
removed.
We should also do the same thing to eliminate the methods that take a
vector of MVT::ValueTypes.
It would be extra nice to convert the dagiselemitter to avoid creating vectors
for operands when calling getTargetNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29566 91177308-0d34-0410-b5e6-96231b3b80d8
per possible ValueType of the node. e.g. Select_add is split into Select_add_i8,
Select_add_i16, etc.
For opcodes which do not produce a non-chain result, it is split on the
ValueType of its first non-chain operand. e.g. Select_store.
On X86 / Mac OS X, Select_store used to be the largest function. It had a stack
frame size of 8.5k. Now the largest one is Store_i32 with a frame size of 3.1k.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29404 91177308-0d34-0410-b5e6-96231b3b80d8
instructions not handled would have a case value of #0, throwing things off.
This marginally shrinks the X86 asmprinter, but shrinks the sparc asmwriter
by 25 lines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29187 91177308-0d34-0410-b5e6-96231b3b80d8
series of identical commands, handle them all with one switch. In the case
of the x86 at&t asm printer, only 3 switches are needed for all instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29184 91177308-0d34-0410-b5e6-96231b3b80d8
based and less switch-statements-with-hundreds-of-cases based. This shrinks
the x86 asmprinters to about 1/3 their previous size.
Other improvements coming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29177 91177308-0d34-0410-b5e6-96231b3b80d8
code that emit target specific nodes into emit functions that are uniquified
and shared among selection routines.
e.g. This reduces X86ISelDAGToDAG.o (release) from ~2M to ~1.5M. Stack frame
size of Select_store from ~13k down to ~8k.
This is the first step. Further work to enable more sharing will follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29158 91177308-0d34-0410-b5e6-96231b3b80d8
and index into it, instead of emitting it like this:
static const char * const OpStrs[] = {
"PHINODE\n", // PHI
0, // INLINEASM
"adc ", // ADC32mi
"adc ", // ADC32mi8
...
The old way required thousands of relocations that slows down link time and
dynamic load times.
This also cuts about 10K off each of the X86 asmprinters, and should shrink
the others as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29152 91177308-0d34-0410-b5e6-96231b3b80d8
RemoveInFlightSetEntry. They are used in place of direct set operators to
reduce instruction selection function stack size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28987 91177308-0d34-0410-b5e6-96231b3b80d8
because information about one can help refine the other. This allows us to
write:
def : Pat<(i32 (extload xaddr:$src, i8)),
(LBZX xaddr:$src)>;
as:
def : Pat<(extload xaddr:$src, i8),
(LBZX xaddr:$src)>;
because tblgen knows LBZX returns i32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28865 91177308-0d34-0410-b5e6-96231b3b80d8
instruction, and the result type of the instruction to refine the pattern.
This allows us to write things like this:
def : Pat<(v2i64 (bitconvert (v16i8 VR128:$src))), (v2i64 VR128:$src)>;
as:
def : Pat<(v2i64 (bitconvert (v16i8 VR128:$src))), (VR128:$src)>
and fixes a ppc64 issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28863 91177308-0d34-0410-b5e6-96231b3b80d8
operands. e.g.
def CALL32r : I<0xFF, MRM2r, (ops GR32:$dst, variable_ops),
"call {*}$dst", [(X86call GR32:$dst)]>;
TableGen should emit operand informations for the "required" operands.
Added a target instruction info flag M_VARIABLE_OPS to indicate the target
instruction may have more operands in addition to the minimum required
operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28791 91177308-0d34-0410-b5e6-96231b3b80d8
a cycle. This increase the search space and will increase compile time (in
practice it appears to be small, e.g. 176.gcc goes from 62 sec to 65 sec)
that will be addressed later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28476 91177308-0d34-0410-b5e6-96231b3b80d8
correctly. That is causing non-deterministic behavior (and possibly preventing
some load folding from happening).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28458 91177308-0d34-0410-b5e6-96231b3b80d8
patterns that look like this:
def : Pat<(i32 (X86Wrapper tconstpool :$dst)), (MOV32ri tconstpool :$dst)>;
InsertOneTypeCheck should copy the type from the resolved pattern to the
unresolved one as long as there types are different.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28389 91177308-0d34-0410-b5e6-96231b3b80d8
1. Use expects a chain output.
2. Node is expanded into multiple target ops.
3. One of the inner node produces a chain, the outer most one doesn't.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28209 91177308-0d34-0410-b5e6-96231b3b80d8
nodes should not be folded into other nodes.
This fixes the miscompilation of PR 749.
Temporarily under flag control.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28002 91177308-0d34-0410-b5e6-96231b3b80d8
