Chris Lattner
f4b95d94e2
Correct the setting of Def flags on registers that are modified!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5065 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-15 22:38:47 +00:00
Chris Lattner
f0eb7beb66
Give passes nice names!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5059 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-15 21:13:40 +00:00
Chris Lattner
198ab640bb
Simplify interfaces used by regalloc to insert code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5052 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-15 20:06:35 +00:00
Chris Lattner
afe628c1d6
Changes to make new TargetRegisterClass interface.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5050 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-15 19:29:34 +00:00
Chris Lattner
439b76730d
* Simplify TargetRegisterClass implementations
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* Change regclass iterators to use an extra level of pointers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5047 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-15 18:40:36 +00:00
Chris Lattner
6b993ccfe5
Add support to cast from a bool type
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Add support for boolean constants
add getClassB method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5034 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-15 08:02:15 +00:00
Chris Lattner
d909683591
Use MachineOperand::isFoo methods instead of our own global functions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5033 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-15 08:01:39 +00:00
Chris Lattner
6e49a4b814
Implement indirect function calls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5024 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 14:13:27 +00:00
Misha Brukman
b8ead9dc22
Make function code generation printing debug-only.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5023 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 13:16:14 +00:00
Chris Lattner
202a2d0e17
Fix bork in doMultiply
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5021 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 13:07:42 +00:00
Chris Lattner
d7d3872fb0
Add sanity checks
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5020 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 13:04:04 +00:00
Misha Brukman
87e369d221
Cleaned up the code: factored out switch/case into a separate function, put
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constants in an array for quick lookup. Stole the idea from elsewhere in
Jello.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5017 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 12:00:06 +00:00
Chris Lattner
920536333c
Insert phi code at top of block
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5015 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 11:52:34 +00:00
Brian Gaeke
992447f91b
lib/Target/X86/InstSelectSimple.cpp:
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The MachineBasicBlock variable name patrol hereby fines Chris Lattner
one bag of nachos, for shadowing global names while his license to do so
was under suspension.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5014 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 11:39:18 +00:00
Chris Lattner
7d25589ee1
Implement cast bool to X
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5012 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 11:31:59 +00:00
Brian Gaeke
71794c0069
Rename all BMI MachineBasicBlock operands to MBB.
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Try to mess around with emitGEPOperation's elementSizeReg to make it work,
again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5011 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 11:22:48 +00:00
Chris Lattner
f08ad9f817
Finish up iterator stuph
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5009 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 10:50:40 +00:00
Misha Brukman
fa18ade05b
Treat longs as ints => pretend they're all 32-bit values and squeeze them into
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32-bit registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5008 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 10:43:09 +00:00
Chris Lattner
333b2fa560
Code gen phi's correctly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5004 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 10:09:43 +00:00
Chris Lattner
3faae2dbc2
Print X86 PHI nodes in a sane manner
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5003 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 09:59:26 +00:00
Misha Brukman
2b46e8eccc
Added moveReg2Reg() and moveImm2Reg() to accomodate moving data around due to
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PHI nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5001 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 09:54:12 +00:00
Brian Gaeke
ed6902ca89
lib/Target/X86/InstSelectSimple.cpp: Start counting arguments with 2,
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because arguments start two stack slots off of EBP. Break out of the
for loop once the argument is found. Increment the counter at the end
of the loop instead of the beginning. Use addRegOffset and compute
the scale * index part at compile time instead of using the fancy
load instruction. Just because an instruction set has wacky addressing
modes doesn't mean we ought to use them (at least, if you believe Dave
Patterson).
lib/Target/X86/X86InstrBuilder.h: Add some comments.
test/Regression/Jello/test-loadstore.ll: Let main return int 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4999 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 09:28:50 +00:00
Brian Gaeke
95780cccef
InstSelectSimple.cpp: Give promote32 a comment. Add initial
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implementation of getReg() for arguments.
MachineCodeEmitter.cpp: Fix using EBP with index, scale and no
displacement (whew!) due to Chris.
Printer.cpp: Fix printing out index and scale in memory references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4998 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 07:56:18 +00:00
Chris Lattner
c0812d8f39
Implement getelementptr constant exprs
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Implement ConstantPointerRefs
Treat long/ulongs as if they were integers. A hack, but an effective one
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4995 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 06:56:29 +00:00
Brian Gaeke
e48ec018a5
brg
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InstSelectSimple.cpp: Add stub implementation of visitFreeInst.
Add comments that mention how we are failing to implement malloc/free.
Add initial implementation of visitAllocaInst.
X86TargetMachine.cpp: Include llvm/Transforms/Scalar.h.
Add LowerAllocations pass before instruction selection.
jello/Makefile: Add scalaropts.a.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4994 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 06:46:31 +00:00
Chris Lattner
2067184b42
Emit the right form of mod/rm mod field
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4986 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 05:05:05 +00:00
Chris Lattner
276867de18
Nicify a bit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4985 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 05:04:37 +00:00
Chris Lattner
b1224f2d0b
Fix encoding of CBW instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4983 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 04:41:31 +00:00
Misha Brukman
07e376bd0d
Moves now select correct opcode based on the data size.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4981 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 04:24:53 +00:00
Chris Lattner
95b12ba775
Remove extranous #include
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4980 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 04:12:24 +00:00
Chris Lattner
a0f38c867c
Rename MemArg* to Arg*
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4979 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 03:51:55 +00:00
Chris Lattner
a6a382c5ca
Make mem size an assert
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Add mem size flags to all instructions using an imm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4978 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 03:50:13 +00:00
Misha Brukman
5000e43809
This is supposed to provide correct size for datatypes. Supposedly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4977 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-13 02:13:15 +00:00
Misha Brukman
9f32791fe7
Added the flag to mark instructions which are really 2-address instructions in
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X86, but would be 3-address in any normail architecture.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4974 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-12 23:19:11 +00:00
Brian Gaeke
20244b7e2c
This checkin is brought to you by the brian gaeke allnighter fund.
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(lib/Target/X86) InstSelectSimple.cpp:
Include llvm/DerivedTypes.h and iostream.
Refactor visitMul out into a wrapper around doMultiply(), so that we
can do multiplications on temporary values when we are doing
getelementptrs.
Refactor part of getReg out into makeAnotherReg, so that we can create
registers willy-nilly to hold temporary values, when we are doing
getelementptrs.
Add stub implementations of visitMallocInst and visitAllocaInst.
Add initial implementation of visitGetElementPtrInst.
In copyConstantToRegister:
We throw a *lot* of our asserts here. So, when we want to throw an
assert, print out to stderr whatever expr or whatever constant made
us barf.
Support copying ConstantPointerNull to register, using a move immediate
of zero.
Rename FLDr4 and FLDr8 to FLDr32 and FLDr64, so that they match the meanings
of the numbers in the other instruction names. All uses modified.
Teach visitCallInst to extract byte- and short-class return values
from subregs of EAX. Add a FIXME note about how we would do it for
float-class return values.
Add a FIXME note about how we would cast float to int and back.
X86InstrInfo.def:
Rename FLDr4 and FLDr8 to FLDr32 and FLDr64, so that they match the meanings
of the numbers in the other instruction names. All uses modified.
(tools/jello) GlobalVars.cpp:
Include iostream.
If we have to emit a floating-point constant to memory, gamble and use
the same method as for ints.
If we have to emit a ConstantPointerNull to memory, try using a "void *"
and "NULL".
Otherwise, if we are going to throw an assert, print out whatever constant
made us barf, first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4973 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-12 15:33:40 +00:00
Brian Gaeke
d474e9cdce
Implement a lot of cast functionality (no FP or 64)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4944 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-06 10:49:33 +00:00
Brian Gaeke
86764d778e
Target/X86/Printer.cpp: Add sizePtr function, and use it instead of
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" <SIZE> PTR " string when emitting assembly.
Target/X86/X86InstrInfo.def: Tidy up a bit:
Squashed everything down to 118 chars wide, wrapping lines so that
comment is at the same point on each line. Rename "NoImpRegs" as
"NoIR". (most instructions have NoImpRegs twice on a line, so this
saves 10 columns).
Also, annotate various instructions with flags for size of memory operand.
(MemArg16, MemArg32, MemArg64, etc.)
Target/X86/X86InstrInfo.h: Define flags for size of memory operand.
(MemArg16, MemArg32, MemArg64, etc.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4932 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-05 08:30:40 +00:00
Misha Brukman
2adb3959f6
Implemented functions for emitting prologues and epilogues;
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removed EBP from the list of callee-saved registers (it isn't one).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4929 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 23:57:03 +00:00
Misha Brukman
1f283ef3e5
Added push and pop instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4928 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 23:56:26 +00:00
Chris Lattner
4fa1acc945
Fix handling of function calls that return void
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4925 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 23:50:28 +00:00
Chris Lattner
a324364f04
Implement initial support for return values from call instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4924 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 23:45:28 +00:00
Misha Brukman
0d2cf3a533
Adjust the stack pointer after a function call, proportional to the number of
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arguments pushed onto the stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4922 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 19:22:53 +00:00
Misha Brukman
a17a2ac727
Added instructions to add/subtract imm32 to/from a reg32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4921 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 19:15:22 +00:00
Chris Lattner
ac573f61b4
Fix bogus assertion failures
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4919 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 17:32:52 +00:00
Chris Lattner
6d66944388
Avoid bad assertion
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4918 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 17:28:40 +00:00
Chris Lattner
93689114a5
Remove think-o assertion
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4917 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 17:18:30 +00:00
Chris Lattner
d6c4cfab54
Avoid crashing on Arguments, just silently miscompile
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4916 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 17:15:34 +00:00
Misha Brukman
a361c8417b
storeReg2RegOffset() and loadRegOffset2Reg() now take the iterator by value
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instead of by reference, since they return the modified iterator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4914 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 17:14:13 +00:00
Misha Brukman
0af0d5bd3e
Moved buildReg2RegClassMap() into from X86RegisterInfo to MRegisterInfo, since
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it is target-independent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4911 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 16:47:04 +00:00
Chris Lattner
504c411e81
Add a "Lazy Function Resolution in Jello" section
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Remove some todo's
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4910 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 16:12:54 +00:00
Chris Lattner
33ced56edb
Fix a bug I introduced in a previous change
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4909 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 06:56:56 +00:00
Chris Lattner
dbf30f7b02
Add support for referencing global variables/functions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4907 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-04 06:45:19 +00:00
Misha Brukman
03c6fafd05
Added support for callee- and caller-save registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4897 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-03 23:11:21 +00:00
Chris Lattner
e8e6743cb7
Fix broken ret opcode, grr...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4895 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-03 22:50:02 +00:00
Chris Lattner
d852c15546
Fix instsel for calls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4891 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-03 20:30:12 +00:00
Chris Lattner
f18a36e398
Fix the build
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4884 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-03 18:15:59 +00:00
Brian Gaeke
07f02614f6
brg
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Add support for cast ... to bool in visitCastInst (it's a start, anyways...)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4883 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-03 07:36:03 +00:00
Chris Lattner
ea1ddab58e
Split the machine code emitter completely out of the printer
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4882 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-03 06:34:06 +00:00
Chris Lattner
4ce42a776a
* Move information about Implicit Defs/Uses into X86InstrInfo.def.
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* Expose information about implicit defs/uses of register through the
MachineInstrInfo.h file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4877 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-03 05:42:53 +00:00
Brian Gaeke
bb25f2f08d
brg
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X86Implicit.cpp, X86Implicit.h: New files.
InstSelectSimple.cpp: Add some clarifications in visitCallInst comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4874 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-03 00:51:09 +00:00
Chris Lattner
8f04b0981f
More support for machine code emission: raw instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4872 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-02 21:56:18 +00:00
Chris Lattner
b0f99b90df
Expose explicit type
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4871 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-02 21:50:41 +00:00
Chris Lattner
76041ce515
Start implementing MachineCodeEmitter
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2002-12-02 21:44:34 +00:00
Chris Lattner
4aff92860d
Eliminate OtherFrm
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4868 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-02 21:40:58 +00:00
Chris Lattner
a5855c829b
Remove comment
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Remove handling of OtherFrm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4867 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-02 21:40:46 +00:00
Chris Lattner
40ead95928
Initial support for machine code emission
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4866 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-02 21:24:12 +00:00
Misha Brukman
6877dd3fb0
Fix order of operands on a store from reg to [reg+offset].
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4857 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-02 21:10:35 +00:00
Chris Lattner
f8bafe8fdb
Add rawfrm flags
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4841 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-01 23:25:59 +00:00
Chris Lattner
a4978ccbcb
Don't add implicit regs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4840 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-01 23:24:58 +00:00
Brian Gaeke
c2505985ce
brg
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InstSelectSimple.cpp: Refactor out conversion of byte, short -> int
from visitReturnInst() to new method, promote32().
Use it in both visitReturnInst() and visitCallInst().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4839 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-30 11:57:28 +00:00
Brian Gaeke
18a20212d9
brg
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InstSelectSimple.cpp: First draft of visitCallInst method, handling
int/float args.
X86InstrInfo.def: Add entries for CALL with 32-bit pc relative arg, and
PUSH with 32-bit reg arg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4838 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-29 12:01:58 +00:00
Brian Gaeke
c11232a8c4
brg
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InstSelectSimple.cpp: Add some comments that say what I'm going to do for
calls and casts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4832 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-26 10:43:30 +00:00
Misha Brukman
8b938664f2
Oops. Got the MOVrm and MOVmr mixed up. Fixed. We can now print out
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instructions correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4830 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-22 23:15:27 +00:00
Misha Brukman
f88a2853c8
Enable the register allocator pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4829 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-22 22:45:07 +00:00
Misha Brukman
cf2b9ac204
Added methods to read/write values to stack in .h, fixed implementation in
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.cpp to return the iterator correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4827 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-22 22:43:47 +00:00
Misha Brukman
a85d6bc2bc
Added -*- C++ -*- mode to the comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4826 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-22 22:42:50 +00:00
Misha Brukman
faf0b8c401
Add a simple way to add memory locations of format [reg+offset]
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4825 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-22 22:42:12 +00:00
Brian Gaeke
fa8d571bd4
lib/Target/X86/InstSelectSimple.cpp: Add visitCallInst, visitCastInst.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4821 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-22 11:07:01 +00:00
Chris Lattner
1d53ce4067
Handle cmp Reg, 0 correctly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4819 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 23:30:00 +00:00
Chris Lattner
7ef33a9076
Printing support for more stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4818 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 22:49:46 +00:00
Chris Lattner
3a9a693987
Don't add implicit operands
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4817 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 22:49:20 +00:00
Chris Lattner
128a7a96f0
Fix off by one bug
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4816 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 22:48:15 +00:00
Chris Lattner
15207f45db
Add fixme
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4815 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 22:48:01 +00:00
Chris Lattner
47b4a9b2e0
Minor code cleanups
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4814 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 21:04:50 +00:00
Chris Lattner
1804233ca5
Implement printing of store instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4813 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 21:03:39 +00:00
Chris Lattner
3d3067bf6b
The big change here is to handle printing/emission of X86II::MRMSrcMem
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instructions. Right now the only users are load instructions, and Misha's
spill code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4812 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 20:44:15 +00:00
Chris Lattner
92845e37f5
Remove implicit information from instruction selector
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4811 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 18:54:29 +00:00
Chris Lattner
457adb55f9
Add printing information for MUL and DIV
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4810 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 18:54:14 +00:00
Chris Lattner
94e8ee2282
Fix a bug that prevented compilation of multiple functions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4809 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 17:26:58 +00:00
Chris Lattner
d3e0faca06
Remove opcode information for instructions that are completely defined now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4805 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 17:12:55 +00:00
Chris Lattner
644e3261d1
Add printing support for sahf & setcc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4804 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 17:10:57 +00:00
Chris Lattner
675dd2cc47
Add printing support for /0 /1 type instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4803 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 17:09:01 +00:00
Chris Lattner
85b39f229f
Add support for /0 /1, etc type instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4802 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 17:08:49 +00:00
Chris Lattner
4b4e9dd937
Rename the SetCC X86 instructions to reflect the fact that they are the
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register versions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4800 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 16:19:42 +00:00
Chris Lattner
05093a51b4
Simplify setcc code a bit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4799 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 15:52:38 +00:00
Chris Lattner
77875d88d0
Support Registers of the form (B8+ rd) for example
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4798 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 02:00:20 +00:00
Chris Lattner
97ad9e1fea
Dont' set flags
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4797 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 01:59:50 +00:00
Chris Lattner
233ad71051
Implement printing more, implement opcode output more
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4796 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 01:33:44 +00:00
Chris Lattner
0dc20dda5b
Huge diff do to reindeinting comments.
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Basically just adds OpSize flags for instructions that need them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4795 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 01:33:28 +00:00
Chris Lattner
11e53e3c38
Add new prefix flag
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4794 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 01:32:55 +00:00
Chris Lattner
644e1abae4
Print another class of instructions correctly, giving us: xorl EDX, EDX
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for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4793 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 00:30:01 +00:00
Misha Brukman
7c58925050
Booleans are types too. And they get stored in bytes. And InstructionSelection
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doesn't assert fail. And everyone's happy. Yay!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4792 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-21 00:25:56 +00:00
Misha Brukman
b83b28697c
Add definitions for function headers from MRegisterInfo.h:
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Some functions are in X86RegisterInfo.cpp, others, because of the data they
need, are in X86RegisterClasses.cpp, which also defines some register classes:
byte, short, and int.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4784 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-20 18:59:43 +00:00
Misha Brukman
e1f0d8113a
Check not only for MO_VirtualRegister, but MO_MachineRegister as well when
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printing out assembly. After all, we want the real thing too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4783 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-20 18:56:41 +00:00
Misha Brukman
d2cc017f46
Add mapping in MachineFunction from SSA regs to Register Classes. Also,
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uncovered a bug where registers were not being put in a map if they were not
found...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4776 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-20 00:58:23 +00:00
Misha Brukman
90ed18c201
Sigh. Fixed some speling.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4775 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-20 00:56:42 +00:00
Misha Brukman
602b9ff595
Thanks to the R8, R16, and R32 macros, I can now deal with registers that
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belong to different register classes easier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4773 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-20 00:47:40 +00:00
Brian Gaeke
c03a0cb01b
Brian Gaeke says:
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lib/Target/X86/InstSelectSimple.cpp: Add a little something to
visitBranchInst which supports conditional branches.
lib/Target/X86/X86InstrInfo.def: Add defs of JNE, JE, CMPri8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4755 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-19 09:08:47 +00:00
Chris Lattner
f9f6088e17
Start trying to print instructions more correctly. For now we also print out the opcode for each instruction as well.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4743 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-18 06:56:51 +00:00
Chris Lattner
f21dfcddcf
Expose base opcode
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4742 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-18 06:56:24 +00:00
Chris Lattner
6aab9cf65c
Start to add more information to instr.def
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4741 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-18 05:37:11 +00:00
Chris Lattner
239dcfd215
Add instruction annotation about whether it has a 0x0F opcode prefix
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4740 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-18 01:59:28 +00:00
Chris Lattner
9213b73c19
Add more void flags
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4739 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-18 01:37:48 +00:00
Chris Lattner
92bd0f9c4d
Set the void flag on instructions that should get it
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4738 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-18 01:34:36 +00:00
Chris Lattner
927dd095c4
Arrange to have a TargetMachine available in X86InstrInfo::print
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4734 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 23:20:37 +00:00
Chris Lattner
e9b309ad13
Wow, I'm incapable of the simplest things today...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4732 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 23:05:21 +00:00
Chris Lattner
fb02a8b11f
Rename registers to follow the intel style of all caps
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4731 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 23:03:46 +00:00
Chris Lattner
dbb61c6445
Reorganize printing interface a bit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4728 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 22:53:13 +00:00
Chris Lattner
71e83caecd
Fix minor detail
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4725 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 22:33:26 +00:00
Chris Lattner
0692536b71
Fix Mul/Div clobbers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4718 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 21:56:38 +00:00
Chris Lattner
6fc3c52359
Fix a few typos, implement load/store
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4716 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 21:11:55 +00:00
Chris Lattner
9562add237
Add functions to buld X86 specific constructs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4714 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 21:03:35 +00:00
Chris Lattner
1411ba31ba
Add information about memory index representation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4712 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 20:33:26 +00:00
Chris Lattner
e7236ffa94
Add load/store instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4711 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 20:33:12 +00:00
Chris Lattner
43189d17c3
Switch visitRet to use getClass()
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4710 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-17 20:07:45 +00:00
Brian Gaeke
6559bb96a9
include/llvm/CodeGen/MachineInstrBuilder.h: Add addClobber() inline
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convenience method. Fix typo in comment.
lib/Target/X86/InstSelectSimple.cpp: Explicitly specify some implicit uses.
Use MOVZX/MOVSX instead of MOV instructions with sign extend instructions.
Take out LEAVE instructions.
32-bit IDIV and DIV use CDQ, not CWQ (CWQ is a typo).
Fix typo in comment and remove some FIXME comments.
lib/Target/X86/Printer.cpp: Include X86InstrInfo.h and llvm/Function.h.
Add some simple code to Printer::runOnFunction to iterate over
MachineBasicBlocks and call X86InstrInfo::print().
lib/Target/X86/X86InstrInfo.def: Make some more instructions with
implicit defs "Void". Add more sign/zero extending "move" insns
(movsx, movzx).
lib/Target/X86/X86RegisterInfo.def: Add EFLAGS as a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4707 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-14 22:32:30 +00:00
Brian Gaeke
20abb6bf45
InstSelectSimple.cpp: (visitReturnInst) Add return instructions with return
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values.
X86InstrInfo.def: add LEAVE instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4691 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-11 19:37:09 +00:00
Brian Gaeke
1749d6359b
Add instruction selection code and tests for setcc instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4603 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-07 17:59:21 +00:00
Chris Lattner
f01729ea56
Implement signed and unsigned division and remainder
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4508 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-02 20:54:46 +00:00
Chris Lattner
ca9671d864
Implement multiply operator
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4506 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-02 20:28:58 +00:00
Chris Lattner
68aad93291
* Implement subtract
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* Merge add code into logical code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4503 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-02 20:13:22 +00:00
Chris Lattner
e2954c84e9
shuffle code around a bit, implement and, or, xor
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4502 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-02 20:04:26 +00:00
Chris Lattner
51b49a9633
Add PHI node support, add comment for branch function
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4500 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-02 19:45:49 +00:00
Chris Lattner
2df035bb3c
Implement unconditional branching support
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4498 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-02 19:27:56 +00:00
Chris Lattner
e9913f2cff
* Fix nonconstant shift case
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* Turn table into 2d table
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4496 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-02 01:41:55 +00:00
Chris Lattner
b1761fc4df
Use a more table driven approach to handling types. Seems to simplify the
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code a bit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4493 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-02 01:15:18 +00:00
Chris Lattner
d5a87f80b7
Make switch statements denser, but only because of the follow-on patch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4492 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-02 00:49:56 +00:00
Chris Lattner
796df73e6e
* Remove dead variable
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* Shift amount is always guaranteed to be 8 bits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4491 91177308-0d34-0410-b5e6-96231b3b80d8
2002-11-02 00:44:25 +00:00
Brian Gaeke
a1719c9130
InstSelectSimple.cpp: Include llvm/iOther.h for ShiftInst.
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Add ISel::visitShiftInst() to instruction select shift instructions.
Add a comment in visitAdd about how to do 64 bit adds.
X86InstrInfo.def: Add register-to-register move opcodes and shift opcodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4477 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-31 23:03:59 +00:00
Chris Lattner
cc0b0c59e8
Add lots more info
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4450 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-30 06:04:46 +00:00
Chris Lattner
8548ee75eb
Make sure to set the destination register correctly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4444 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-30 01:49:01 +00:00
Chris Lattner
b752e9a2ae
Set the destination register field based on the target specific flags
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4442 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-30 01:15:31 +00:00
Chris Lattner
9d17740295
Add flag to specify when no value is produced by an instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4441 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-30 01:09:34 +00:00
Chris Lattner
e5f5221b5e
Implement the new optional getRegisterInfo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4437 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-30 00:56:18 +00:00
Chris Lattner
3dffa7953f
Print machine code after instruction selection
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4434 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-30 00:47:49 +00:00
Chris Lattner
42c7786227
Make sure to pass the LLVM basic block in
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4433 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-30 00:47:40 +00:00
Chris Lattner
36b36037a3
Construct annotation, to make sure it's attached to function
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4429 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-29 23:40:58 +00:00
Chris Lattner
b4f68ed32e
Convert backend to use passes, implement X86TargetMachine
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4421 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-29 22:37:54 +00:00
Chris Lattner
055c965bff
Rename X86InstructionInfo to X86InstrInfo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4413 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-29 21:05:24 +00:00
Chris Lattner
33f53b554a
Minor renaming
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4410 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-29 20:48:56 +00:00
Chris Lattner
341a937169
Switch to generating machineinstr's instead of MInstructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4396 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-29 17:43:55 +00:00
Chris Lattner
a535fabe7d
Be compatible with sparc backend
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4395 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-29 17:43:38 +00:00
Chris Lattner
9bbf439e38
Implement MachineInstrInfo interface
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4394 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-29 17:43:19 +00:00
Chris Lattner
79c033765c
Switch to different flag set
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4393 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-29 17:42:40 +00:00
Chris Lattner
75276f150e
Initial stab at MachineInstr'ication
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4367 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-28 23:55:19 +00:00
Misha Brukman
6ee9b5a57d
Fixed spelling and grammar.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4353 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-28 20:01:52 +00:00
Chris Lattner
6f8fd25697
Remove dead fixme
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4300 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-27 21:23:43 +00:00
Chris Lattner
c5291f5e0e
Instruction select constant arguments correctly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4297 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-27 21:16:59 +00:00
Chris Lattner
65a78f28e3
Add instruction definitions for mov r, imm instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4296 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-27 21:16:44 +00:00
Chris Lattner
726140821f
Initial checkin of X86 backend.
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We can instruction select exactly one instruction 'ret void'. Wow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4284 91177308-0d34-0410-b5e6-96231b3b80d8
2002-10-25 22:55:53 +00:00