Commit Graph

431 Commits

Author SHA1 Message Date
Chandler Carruth
7fac06c423 [PM] Add a module analysis pass proxy for the function analysis manager.
This proxy will fill the role of proxying invalidation events down IR
unit layers so that when a module changes we correctly invalidate
function analyses. Currently this is a very coarse solution -- any
change blows away the entire thing -- but the next step is to make
invalidation handling more nuanced so that we can propagate specific
amounts of invalidation from one layer to the next.

The test is extended to place a module pass between two function pass
managers each of which have preserved function analyses which get
correctly invalidated by the module pass that might have changed what
functions are even in the module.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195304 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-21 02:11:31 +00:00
Chandler Carruth
c49e7e6aee [PM] Add the preservation system to the new pass manager.
This adds a new set-like type which represents a set of preserved
analysis passes. The set is managed via the opaque PassT::ID() void*s.
The expected convenience templates for interacting with specific passes
are provided. It also supports a symbolic "all" state which is
represented by an invalid pointer in the set. This state is nicely
saturating as it comes up often. Finally, it supports intersection which
is used when finding the set of preserved passes after N different
transforms.

The pass API is then changed to return the preserved set rather than
a bool. This is much more self-documenting than the previous system.
Returning "none" is a conservatively correct solution just like
returning "true" from todays passes and not marking any passes as
preserved. Passes can also be dynamically preserved or not throughout
the run of the pass, and whatever gets returned is the binding state.
Finally, preserving "all" the passes is allowed for no-op transforms
that simply can't harm such things.

Finally, the analysis managers are changed to instead of blindly
invalidating all of the analyses, invalidate those which were not
preserved. This should rig up all of the basic preservation
functionality. This also correctly combines the preservation moving up
from one IR-layer to the another and the preservation aggregation across
N pass runs. Still to go is incrementally correct invalidation and
preservation across IR layers incrementally during N pass runs. That
will wait until we have a device for even exposing analyses across IR
layers.

While the core of this change is obvious, I'm not happy with the current
testing, so will improve it to cover at least some of the invalidation
that I can test easily in a subsequent commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195241 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-20 11:31:50 +00:00
Chandler Carruth
d14894059f [PM] Make the function pass manager more regular.
The FunctionPassManager is now itself a function pass. When run over
a function, it runs all N of its passes over that function. This is the
1:N mapping in the pass dimension only. This allows it to be used in
either a ModulePassManager or potentially some other manager that
works on IR units which are supersets of Functions.

This commit also adds the obvious adaptor to map from a module pass to
a function pass, running the function pass across every function in the
module.

The test has been updated to use this new pattern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195192 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-20 04:39:16 +00:00
Chandler Carruth
523d929368 [PM] Split the analysis manager into a function-specific interface and
a module-specific interface. This is the first of many steps necessary
to generalize the infrastructure such that we can support both
a Module-to-Function and Module-to-SCC-to-Function pass manager
nestings.

After a *lot* of attempts that never worked and didn't even make it to
a committable state, it became clear that I had gotten the layering
design of analyses flat out wrong. Four days later, I think I have most
of the plan for how to correct this, and I'm starting to reshape the
code into it. This is just a baby step I'm afraid, but starts separating
the fundamentally distinct concepts of function analysis passes and
module analysis passes so that in subsequent steps we can effectively
layer them, and have a consistent design for the eventual SCC layer.

As part of this, I've started some interface changes to make passes more
regular. The module pass accepts the module in the run method, and some
of the constructor parameters are gone. I'm still working out exactly
where constructor parameters vs. method parameters will be used, so
I expect this to fluctuate a bit.

This actually makes the invalidation less "correct" at this phase,
because now function passes don't invalidate module analysis passes, but
that was actually somewhat of a misfeature. It will return in a better
factored form which can scale to other units of IR. The documentation
has gotten less verbose and helpful.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195189 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-20 04:01:38 +00:00
Filip Pizlo
d54beffaa3 Expose the fence instruction via the C API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195173 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-20 00:07:49 +00:00
Hao Liu
97577757c6 Implement the newly added ACLE functions for ld1/st1 with 2/3/4 vectors.
The functions are like: vst1_s8_x2 ...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194990 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-18 06:31:53 +00:00
Matt Arsenault
1572ba716b Fix spacing, forward declare order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194985 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-18 02:51:33 +00:00
Chandler Carruth
8417e85781 [PM] Completely remove support for explicit 'require' methods on the
AnalysisManager. All this method did was assert something and we have
a perfectly good way to trigger that assert from the query path.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194947 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-17 03:18:05 +00:00
Ana Pazos
a53bf06f7a Implemented aarch64 Neon scalar vmulx_lane intrinsics
Implemented aarch64 Neon scalar vfma_lane intrinsics
Implemented aarch64 Neon scalar vfms_lane intrinsics

Implemented legacy vmul_n_f64, vmul_lane_f64, vmul_laneq_f64
intrinsics (v1f64 parameter type) using Neon scalar instructions.

Implemented legacy vfma_lane_f64, vfms_lane_f64,
vfma_laneq_f64, vfms_laneq_f64 intrinsics (v1f64 parameter type)
using Neon scalar instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194888 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-15 23:32:10 +00:00
Chad Rosier
5758c3c832 [AArch64] Fix the scalar NEON ACLE functions so that they return float/double
rather than the vector equivalent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194853 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-15 21:28:10 +00:00
Cameron McInally
28e12e9f02 Add AVX512 unmasked FMA intrinsics and support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194824 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-15 17:01:14 +00:00
Matt Arsenault
59d3ae6cdc Add addrspacecast instruction.
Patch by Michele Scandale!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194760 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-15 01:34:59 +00:00
Chandler Carruth
4701c4702e Fix the header comment of the new pass manager stuff to not claim to be
the legacy stuff. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194689 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-14 10:55:14 +00:00
Kevin Qin
0710afb9af [AArch64 neon] support poly64 and relevant intrinsic functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194659 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-14 03:27:58 +00:00
Kevin Qin
a08063a000 Implement aarch64 neon instruction class SIMD misc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194656 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-14 02:44:13 +00:00
Jiangning Liu
082ac99cc8 Implement AArch64 NEON instruction set AdvSIMD (table).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194648 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-14 01:57:32 +00:00
Chad Rosier
11966d7c98 [AArch64] Add support for legacy AArch32 NEON scalar shift by immediate
instructions.  This patch does not include the shift right and accumulate
instructions.  A number of non-overloaded intrinsics have been remove in favor
of their overloaded counterparts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194598 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-13 20:05:37 +00:00
Chandler Carruth
429af0e0a7 Add another (perhaps better) video for Sean's talk. (Thanks Marshall!)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194549 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-13 02:49:38 +00:00
Chandler Carruth
cfe36cb02a Give folks a reference to some material on the fundamental design
pattern in use here. Addresses review feedback from Sean (thanks!) and
others.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194541 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-13 01:51:36 +00:00
Chandler Carruth
f348c9782c Introduce an AnalysisManager which is like a pass manager but with a lot
more smarts in it. This is where most of the interesting logic that used
to live in the implicit-scheduling-hackery of the old pass manager will
live.

Like the previous commits, note that this is a very early prototype!
I expect substantial changes before this is ready to use.

The core of the design is the following:

- We have an AnalysisManager which can be used across a series of
  passes over a module.
- The code setting up a pass pipeline registers the analyses available
  with the manager.
- Individual transform passes can check than an analysis manager
  provides the analyses they require in order to fail-fast.
- There is *no* implicit registration or scheduling.
- Analysis passes are different from other passes: they produce an
  analysis result that is cached and made available via the analysis
  manager.
- Cached results are invalidated automatically by the pass managers.
- When a transform pass requests an analysis result, either the analysis
  is run to produce the result or a cached result is provided.

There are a few aspects of this design that I *know* will change in
subsequent commits:
- Currently there is no "preservation" system, that needs to be added.
- All of the analysis management should move up to the analysis library.
- The analysis management needs to support at least SCC passes. Maybe
  loop passes. Living in the analysis library will facilitate this.
- Need support for analyses which are *both* module and function passes.
- Need support for pro-actively running module analyses to have cached
  results within a function pass manager.
- Need a clear design for "immutable" passes.
- Need support for requesting cached results when available and not
  re-running the pass even if that would be necessary.
- Need more thorough testing of all of this infrastructure.

There are other aspects that I view as open questions I'm hoping to
resolve as I iterate a bit on the infrastructure, and especially as
I start writing actual passes against this.
- Should we have separate management layers for function, module, and
  SCC analyses? I think "yes", but I'm not yet ready to switch the code.
  Adding SCC support will likely resolve this definitively.
- How should the 'require' functionality work? Should *that* be the only
  way to request results to ensure that passes always require things?
- How should preservation work?
- Probably some other things I'm forgetting. =]

Look forward to more patches in shorter order now that this is in place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194538 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-13 01:12:08 +00:00
Weiming Zhao
72c84a8294 Export intrinsics:__builtin_arm_{dmb,dsb} to frontend
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194505 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-12 19:57:43 +00:00
Chad Rosier
4c433cf673 [AArch64] The shift right/left and insert immediate builtins expect 3
source operands, a vector, an element to insert, and a shift amount.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194406 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 19:11:11 +00:00
Chad Rosier
30b2a19f3b [AArch64] Add support for NEON scalar floating-point convert to fixed-point instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194394 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 18:04:07 +00:00
Chandler Carruth
ea9988447c [PM] Start sketching out the new module and function pass manager.
This is still just a skeleton. I'm trying to pull together the
experimentation I've done into committable chunks, and this is the first
coherent one. Others will follow in hopefully short order that move this
more toward a useful initial implementation. I still expect the design
to continue evolving in small ways as I work through the different
requirements and features needed here though.

Keep in mind, all of this is off by default.

Currently, this mostly exercises the use of a polymorphic smart pointer
and templates to hide the polymorphism for the pass manager from the
pass implementation. The next step will be more significant, adding the
first framework of analysis support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194325 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-09 13:09:08 +00:00
Chandler Carruth
49837ef811 Move the old pass manager infrastructure into a legacy namespace and
give the files a legacy prefix in the right directory. Use forwarding
headers in the old locations to paper over the name change for most
clients during the transitional period.

No functionality changed here! This is just clearing some space to
reduce renaming churn later on with a new system.

Even when the new stuff starts to go in, it is going to be hidden behind
a flag and off-by-default as it is still WIP and under development.

This patch is specifically designed so that very little out-of-tree code
has to change. I'm going to work as hard as I can to keep that the case.
Only direct forward declarations of the PassManager class are impacted
by this change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194324 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-09 12:26:54 +00:00
Juergen Ributzka
623d2e618f [Stackmap] Add AnyReg calling convention support for patchpoint intrinsic.
The idea of the AnyReg Calling Convention is to provide the call arguments in
registers, but not to force them to be placed in a paticular order into a
specified set of registers. Instead it is up tp the register allocator to assign
any register as it sees fit. The same applies to the return value (if
applicable).

Differential Revision: http://llvm-reviews.chandlerc.com/D2009

Reviewed by Andy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194293 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-08 23:28:16 +00:00
Jiangning Liu
3ff3a8aa75 Implement AArch64 Neon Crypto instruction classes AES, SHA, and 3 SHA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194085 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-05 17:42:05 +00:00
Cameron McInally
2e58f1d4cf Add support for AVX512 masked vector blend intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194006 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-04 19:14:56 +00:00
Elena Demikhovsky
6a907f8c7d AVX-512: fixed a typo in builtin name
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193988 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-04 11:48:23 +00:00
Elena Demikhovsky
633f98bdfa AVX-512: added VPCONFLICT instruction and intrinsics,
added EVEX_KZ to tablegen


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193959 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-03 13:46:31 +00:00
Rafael Espindola
19794da02c Remove linkonce_odr_auto_hide.
linkonce_odr_auto_hide was in incomplete attempt to implement a way
for the linker to hide symbols that are known to be available in every
TU and whose addresses are not relevant for a particular DSO.

It was redundant in that it all its uses are equivalent to
linkonce_odr+unnamed_addr. Unlike those, it has never been connected
to clang or llvm's optimizers, so it was effectively dead.

Given that nothing produces it, this patch just nukes it
(other than the llvm-c enum value).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193865 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-01 17:09:14 +00:00
Chad Rosier
1a035dd6df [AArch64] Add support for NEON scalar fixed-point convert to floating-point instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193816 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-31 22:36:59 +00:00
Andrew Trick
2ddc56dec8 Add new calling convention for WebKit Java Script.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193812 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-31 22:12:01 +00:00
Chad Rosier
1d28917dc3 [AArch64] Add support for NEON scalar shift immediate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193790 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-31 19:28:44 +00:00
Manman Ren
aa8c95ec28 Cleanup: update comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193773 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-31 17:25:22 +00:00
Andrew Trick
ab7431b0d4 Add experimental stackmap intrinsics to definition file and documenation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193767 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-31 17:18:14 +00:00
Andrew Trick
2e50b8a08d Enable variable arguments support for intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193766 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-31 17:18:11 +00:00
Cameron McInally
424f19732e Add AVX512 unmasked integer broadcast intrinsics and support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193748 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-31 13:56:31 +00:00
Daniel Sanders
02fbffd4e8 [mips][msa] Correct definition of bins[lr] and CHECK-DAG-ize related tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193695 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-30 15:45:42 +00:00
Daniel Sanders
c385709d83 [mips][msa] Added support for matching bmnz, bmnzi, bmz, and bmzi from normal IR (i.e. not intrinsics)
Also corrected the definition of the intrinsics for these instructions (the
result register is also the first operand), and added intrinsics for bsel and
bseli to clang (they already existed in the backend).

These four operations are mostly equivalent to bsel, and bseli (the difference
is which operand is tied to the result). As a result some of the tests changed
as described below.

bitwise.ll:
- bsel.v test adapted so that the mask is unknown at compile-time. This stops
  it emitting bmnzi.b instead of the intended bsel.v.
- The bseli.b test now tests the right thing. Namely the case when one of the
  values is an uimm8, rather than when the condition is a uimm8 (which is
  covered by bmnzi.b)

compare.ll:
- bsel.v tests now (correctly) emits bmnz.v instead of bsel.v because this
  is the same operation (see MSA.txt).

i8.ll
- CHECK-DAG-ized test.
- bmzi.b test now (correctly) emits equivalent bmnzi.b with swapped operands
  because this is the same operation (see MSA.txt).
- bseli.b still emits bseli.b though because the immediate makes it
  distinguishable from bmnzi.b.

vec.ll:
- CHECK-DAG-ized test.
- bmz.v tests now (correctly) emits bmnz.v with swapped operands (see
  MSA.txt).
- bsel.v tests now (correctly) emits bmnz.v with swapped operands (see
  MSA.txt).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193693 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-30 15:20:38 +00:00
Chad Rosier
f853a034a1 [AArch64] Add support for NEON scalar floating-point compare instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193691 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-30 15:19:37 +00:00
Cameron McInally
95efb037f7 Refactor the AVX512 intrinsics. Cluster the intrinsics into the appropriate vector extension class within the .td file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193690 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-30 15:19:10 +00:00
Daniel Sanders
6ff1ef9931 [mips][msa] Added support for matching bins[lr]i.[bhwd] from normal IR (i.e. not intrinsics)
This required correcting the definition of the bins[lr]i intrinsics because
the result is also the first operand.

It also required removing the (arbitrary) check for 32-bit immediates in
MipsSEDAGToDAGISel::selectVSplat().

Currently using binsli.d with 2 bits set in the mask doesn't select binsli.d
because the constant is legalized into a ConstantPool. Similar things can
happen with binsri.d with more than 10 bits set in the mask. The resulting
code when this happens is correct but not optimal.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193687 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-30 14:45:14 +00:00
Rafael Espindola
1313a223ed Clarify that GlobalVariables definitions must have an initializer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193609 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-29 13:44:11 +00:00
Elena Demikhovsky
62d66cbec5 AVX-512: PMIN/PMAX intrinsics and patterns
Patch by Cameron McInally <cameron.mcinally@nyu.edu>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193497 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-27 08:18:37 +00:00
Shuxin Yang
69bd41dfe3 Revert r193251 : Use address-taken to disambiguate global variable and indirect memops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193489 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-27 03:08:44 +00:00
Elena Demikhovsky
62ef058116 AVX-512: added VCVTPH2PS, VCVTPS2PH with intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193312 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-24 07:16:35 +00:00
Yuchen Wu
3d0b7e1cc5 Fixed doxygen comment to match Module.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193273 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-23 21:25:44 +00:00
Shuxin Yang
8e3851a6eb Use address-taken to disambiguate global variable and indirect memops.
Major steps include:
 1). introduces a not-addr-taken bit-field in GlobalVariable
 2). GlobalOpt pass sets "not-address-taken" if it proves a global varirable 
    dosen't have its address taken.
 3). AA use this info for disambiguation. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193251 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-23 17:28:19 +00:00
Chad Rosier
b5eae81267 [AArch64] Add the constraint to NEON scalar mla/mls instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193117 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-21 20:11:47 +00:00
Matheus Almeida
f89f66e61b [mips][msa] Fix definition of SLD instruction.
The second parameter of the SLD intrinsic is the number of columns (GPR) to 
slide left the source array.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193076 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-21 11:47:56 +00:00
Chad Rosier
3b370a2ac4 [AArch64] Add support for NEON scalar three register different instruction
class.  The instruction class includes the signed saturating doubling
multiply-add long, signed saturating doubling multiply-subtract long, and
the signed saturating doubling multiply long instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192908 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-17 18:12:29 +00:00
Daniel Sanders
52244da7f2 [mips][msa] Added lsa instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192895 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-17 13:38:20 +00:00
Daniel Sanders
db8a16252b [mips][msa] Removed ldx.[bhwd] and stx.[bhwd].
These were present in a previous version of the MSA spec but are not
present in the published version. There is no hardware that uses these
instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192888 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-17 12:16:03 +00:00
Chad Rosier
dceac4c5a6 [AArch64] Add support for NEON scalar negate instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192843 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-16 21:04:39 +00:00
Chad Rosier
a249914462 [AArch64] Add support for NEON scalar absolute value instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192842 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-16 21:04:34 +00:00
Chad Rosier
8225b23c6a Update comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192806 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-16 16:30:10 +00:00
Chad Rosier
a2cd42a0a7 [AArch64] Add support for NEON scalar signed saturating accumulated of unsigned
value and unsigned saturating accumulate of signed value instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192800 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-16 16:09:02 +00:00
Will Dietz
1e6810005f TypeFinder: prefer iterative algorithm to keep stack usage low.
Introduce subtype_reverse_iterator to maintain
the numbering assigned during the recursive type walk.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192770 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-16 04:10:06 +00:00
Craig Topper
390ff499f0 Remove x86_sse42_crc32_64_8 intrinsic. It has no functional difference from x86_sse42_crc32_32_8 and was not mapped to a clang builtin. I'm not even sure why this form of the instruction is even called out explicitly in the docs. Also add AutoUpgrade support to convert it into the other intrinsic with appropriate trunc and zext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192672 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-15 05:20:47 +00:00
Chad Rosier
942827b113 [AArch64] Add support for NEON scalar integer compare instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192596 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-14 14:37:20 +00:00
Rafael Espindola
1a525e8c80 Add a GlobalAlias::isValidLinkage to reduce code duplication.
Thanks to Reid Kleckner for the suggestion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192298 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 16:07:32 +00:00
Elena Demikhovsky
50dc2ad46c AVX-512: Added VRCP28 and VRSQRT28 instructions and intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192283 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 08:16:14 +00:00
Chad Rosier
c976500793 [AArch64] Add support for NEON scalar floating-point reciprocal estimate,
reciprocal exponent, and reciprocal square root estimate instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192242 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 22:09:04 +00:00
Matt Arsenault
25180dc319 Fix duplicated assertions.
Do what some other instructions do, and add an assert method.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192236 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 21:11:12 +00:00
Chad Rosier
3dfe644f7b [AArch64] Add support for NEON scalar signed/unsigned integer to floating-point
convert instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192231 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 20:43:30 +00:00
Benjamin Kramer
e3c2f07005 IRBuilder: Downgrade InsertPointGuard's instruction pointer to a raw pointer.
Sadly this loses the checking from AssertingVH, but apparently storing the
end() of a BasicBlock into an AssertingVH has bad consequences as it's not
really an instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192209 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 17:44:56 +00:00
Matt Arsenault
c4a8c07f64 Change objectsize intrinsic to accept different address spaces.
Bitcasting everything to i8* won't work. Autoupgrade the old
intrinsic declarations to use the new mangling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192117 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 18:06:48 +00:00
Elena Demikhovsky
714319a169 AVX-512: added scalar convert instructions and intrinsics.
Fixed load folding in VPERM2I instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192063 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-06 13:11:09 +00:00
Craig Topper
22abf7e17f Remove unneeded TBM intrinsics. The arithmetic/logical operation patterns are sufficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192039 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 19:22:59 +00:00
Jiangning Liu
beb6afa843 Implement aarch64 neon instruction set AdvSIMD (Across).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192028 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 08:22:10 +00:00
Craig Topper
fafe4bbd6c Add patterns for selecting TBM instructions from logical operations. Patch from Yunzhong Gao.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191871 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-03 04:16:45 +00:00
Pete Cooper
da750239bd Add v4f16 to supported value types.
This is useful for some ARM intrinsics such as VCVTN which does a <4 x float> <-> <4 x half> conversion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191870 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-03 03:29:21 +00:00
Joey Gouly
d1311ac171 [ARM] Introduce the 'sevl' instruction in ARMv8.
This also removes the restriction on the immediate field of the 'hint'
instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191744 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-01 12:39:11 +00:00
Benjamin Kramer
adb412daa4 IRBuilder: Add RAII objects to reset insertion points or fast math flags.
Inspired by the object from the SLPVectorizer. This found a minor bug in the
debug loc restoration in the vectorizer where the location of a following
instruction was attached instead of the location from the original instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191673 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-30 15:39:48 +00:00
Benjamin Kramer
5a17a462cd IRBuilder: Move fast math flags to IRBuilderBase.
They don't depend on the templated stuff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191672 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-30 15:39:27 +00:00
Yunzhong Gao
685707c28e Adding intrinsics to the llvm backend for TBM instruction set.
Phabricator code review is located here: http://llvm-reviews.chandlerc.com/D1750



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191539 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-27 18:38:42 +00:00
Daniel Sanders
4d835f1cbe [mips][msa] Implemented insert.d intrinsic.
This intrinsic is lowered into an equivalent INSERT_VECTOR_ELT which is
further lowered into a sequence of insert.w's on MIPS32.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191521 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-27 13:36:54 +00:00
Daniel Sanders
9f30d43122 [mips][msa] Implemented fill.d intrinsic.
This intrinsic is lowered into an equivalent BUILD_VECTOR which is further
lowered into a sequence of insert.w's on MIPS32.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191519 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-27 13:20:41 +00:00
Daniel Sanders
e8eafdb676 [mips][msa] Implemented copy_[us].d intrinsic.
This intrinsic is lowered into equivalent copy_s.w instructions during
legalization.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191518 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-27 13:04:21 +00:00
Daniel Sanders
7e0df9aa29 [mips][msa] Added support for matching vshf from normal IR (i.e. not intrinsics)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191301 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-24 14:02:15 +00:00
Daniel Sanders
38a10ff063 [mips][msa] Added support for matching bsel and bseli from normal IR (i.e. not intrinsics)
This required correcting the definition of the bsel and bseli intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191290 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-24 12:04:44 +00:00
Jiangning Liu
477fc628b3 Initial support for Neon scalar instructions.
Patch by Ana Pazos.

1.Added support for v1ix and v1fx types.
2.Added Scalar Pairwise Reduce instructions.
3.Added initial implementation of Scalar Arithmetic instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191263 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-24 02:47:27 +00:00
Reid Kleckner
118a0659ab Explicitly request unsigned enum types when desired
The underlying type of all plain enums in MSVC is 'int', even if the
enumerator contains large 32-bit unsigned values or values greater than
UINT_MAX.  The only way to get a large or unsigned enum type is to
request it explicitly with the C++11 strong enum types feature.

However, since LLVM isn't C++11 yet, I had to add a conditional
LLVM_ENUM_INT_TYPE to Compiler.h to control its usage.

The motivating true positive for this change is compiling PointerIntPair
with MSVC for win64.  The PointerIntMask value is supposed to be pointer
sized value of all ones with some low zeros.  Instead, it's truncated to
32-bits!  We are only saved later because it is sign extended back in
the AND with int64_t, and we happen to want all ones.

This silences lots of -Wmicrosoft warnings during a clang self-host
targeting Windows.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191241 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-23 23:26:57 +00:00
Daniel Sanders
9a1aaeb012 [mips][msa] Added support for matching insert and copy from normal IR (i.e. not intrinsics)
Changes to MIPS SelectionDAG:
* Added nodes VEXTRACT_[SZ]EXT_ELT to represent extract and extend in a single
  operation and implemented the DAG combines necessary to fold sign/zero
  extends into the extract.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191199 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-23 14:03:12 +00:00
Amara Emerson
5df37dab76 [ARMv8] Add support for the v8 cryptography extensions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190996 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-19 11:59:01 +00:00
Joey Gouly
a4d46d7fc6 [ARMv8] Add CRC instructions.
Patch by Bradley Smith!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190928 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 09:45:55 +00:00
Ben Langmuir
215585920f Add llvm.x86.* intrinsics for Intel SHA Extensions
Add llvm.x86.* intrinsics for all of the Intel SHA Extensions instructions, as
well as tests. Also remove mayLoad and hasSideEffects, which can be inferred
from the instruction patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190864 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 13:44:39 +00:00
Craig Topper
2898b3c28d Make a more clear AVX-512 section header that matches similar in the file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190843 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 03:34:09 +00:00
Matt Arsenault
4b28ee2088 MemCpyOptimizer: Use max legal int size instead of pointer size
If there are no legal integers, assume 1 byte.

This makes more sense than using the pointer size as
a guess for the maximum GPR width.

It is conceivable to want to use some 64-bit pointers
on a target where 64-bit integers aren't legal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190817 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-16 22:43:16 +00:00
Peter Collingbourne
1e3037f0be Implement function prefix data as an IR feature.
Previous discussion:
http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-July/063909.html

Differential Revision: http://llvm-reviews.chandlerc.com/D1191

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190773 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-16 01:08:15 +00:00
Matt Arsenault
b95237f10c Fix comment to match what the assert actually enforces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190566 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-12 01:07:54 +00:00
Daniel Sanders
8857294192 [mips][msa] Corrected the definition of the dotp_[su].[hwd] intrinsics
The elements of the operands should be half the width of the elements of
the result.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190505 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-11 09:59:17 +00:00
Daniel Sanders
436f64567c [mips][msa] Removed unsupported dot product instructions (dotp_[su].b)
The dotp_[su].b instructions never existed in any revision of the MSA spec.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190398 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-10 09:51:43 +00:00
Bob Wilson
db3a9e64f8 Revert patches to add case-range support for PR1255.
The work on this project was left in an unfinished and inconsistent state.
Hopefully someone will eventually get a chance to implement this feature, but
in the meantime, it is better to put things back the way the were.  I have
left support in the bitcode reader to handle the case-range bitcode format,
so that we do not lose bitcode compatibility with the llvm 3.3 release.

This reverts the following commits: 155464, 156374, 156377, 156613, 156704,
156757, 156804 156808, 156985, 157046, 157112, 157183, 157315, 157384, 157575,
157576, 157586, 157612, 157810, 157814, 157815, 157880, 157881, 157882, 157884,
157887, 157901, 158979, 157987, 157989, 158986, 158997, 159076, 159101, 159100,
159200, 159201, 159207, 159527, 159532, 159540, 159583, 159618, 159658, 159659,
159660, 159661, 159703, 159704, 160076, 167356, 172025, 186736

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190328 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 19:14:35 +00:00
Manman Ren
0b3d39235a TBAA: add isTBAAVtableAccess to MDNode so clients can call the function
instead of having its own implementation.

The implementation of isTBAAVtableAccess is in TypeBasedAliasAnalysis.cpp
since it is related to the format of TBAA metadata.

The path for struct-path tbaa will be exercised by
test/Instrumentation/ThreadSanitizer/read_from_global.ll, vptr_read.ll, and
vptr_update.ll when struct-path tbaa is on by default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190216 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 22:47:05 +00:00
Matt Arsenault
4598bd53ab Use type helper functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190113 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 00:37:24 +00:00
Joey Gouly
4897151df6 [ARMv8] Implement the new DMB/DSB operands.
This removes the custom ISD Node: MEMBARRIER and replaces it
with an intrinsic.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190055 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 15:35:24 +00:00
Rafael Espindola
9718158222 Revert "Add r159136 back now that pr13124 has been fixed."
This reverts commit r189886.

I found a corner case where this optimization is not valid:

Say we have a "linkonce_odr unnamed_addr" in two translation units:
* In TU 1 this optimization kicks in and makes it hidden.
* In TU 2 it gets const merged with a constant that is *not* unnamed_addr,
  resulting in a non unnamed_addr constant with default visibility.
* The static linker rules for combining visibility them produce a hidden
  symbol, which is incorrect from the point of view of the non unnamed_addr
  constant.

The one place we can do this is when we know that the symbol is not used from
another TU in the same shared object, i.e., during LTO. I will move it there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189954 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 16:09:01 +00:00
Hao Liu
19fdc268c3 Inplement aarch64 neon instructions in AdvSIMD(shift). About 24 shift instructions:
sshr,ushr,ssra,usra,srshr,urshr,srsra,ursra,sri,shl,sli,sqshlu,sqshl,uqshl,shrn,sqrshrun,sqshrn,uqshr,sqrshrn,uqrshrn,sshll,ushll
 and 4 convert instructions:
      scvtf,ucvtf,fcvtzs,fcvtzu


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189925 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 09:28:24 +00:00
Rafael Espindola
79869ee59a Add r159136 back now that pr13124 has been fixed.
Original message:
If a constant or a function has linkonce_odr linkage and unnamed_addr, mark
hidden. Being linkonce_odr guarantees that it is available in every dso that
needs it. Being a constant/function with unnamed_addr guarantees that the
copies don't have to be merged.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189886 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-03 23:34:36 +00:00
Daniel Sanders
fdb6a38913 [mips][msa] Added IntrNoMem and removed Commutative from sub intrinsics.
This changes the SelectionDAG nodes from ISD::INTRINSIC_W_CHAIN to
ISD::INTRINSIC_WO_CHAIN which enables easy lowering to equivalent SelectionDAG
nodes (e.g. __builtin_msa_sub_w -> ISD::SUB) in future patches since nodes
such as ISD::SUB do not have a chain.
It also corrects an obvious mistake, namely that the subtract intrinsics were
marked as being commutative.

As per a similar change in r189106
(http://llvm.org/viewvc/llvm-project?rev=189106&view=rev) there isn’t a new
testcase in this patch since the existing tests should test the intrinsics to
the same standard and the best I can do for a testcase would be a fragile
pass/maybe test of whether memory operations can (and do) cross the intrinsic.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189784 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-03 09:45:20 +00:00
Daniel Sanders
8092b71001 [mips][msa] Added IntrNoMem to the floating-point intrinsics.
This changes the SelectionDAG nodes from ISD::INTRINSIC_W_CHAIN to
ISD::INTRINSIC_WO_CHAIN which enables easy lowering to equivalent SelectionDAG
nodes (e.g. __builtin_msa_fadd_w -> ISD::FADD) in future patches since nodes
such as ISD::FADD do not have a chain.

As per a similar change in r189106
(http://llvm.org/viewvc/llvm-project?rev=189106&view=rev) there isn’t a new
testcase in this patch since the existing tests should test the intrinsics to
the same standard and the best I can do for a testcase would be a fragile
pass/maybe test of whether memory operations can (and do) cross the intrinsic.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189782 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-03 09:35:20 +00:00
Tim Northover
d3128a4a5a ARM: remove unused v(add|sub)hn and vqdml[as]l intrinsics.
Clang is now generating cleaner IR, so this removes the old variants which
should be completely unused.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189481 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-28 14:33:33 +00:00
Daniel Sanders
3c380d5e28 [mips][msa] Added bnz.df, bnz.v, bz.df, and bz.v
These intrinsics are legalized to V(ALL|ANY)_(NON)?ZERO nodes,
are matched as SN?Z_[BHWDV]_PSEUDO pseudo's, and emitted as
a branch/mov sequence to evaluate to 0 or 1.

Note: The resulting code is sub-optimal since it doesnt seem to be possible
to feed the result of an intrinsic directly into a brcond. At the moment
it uses (SETCC (VALL_ZERO $ws), 0, SETEQ) and similar which unnecessarily
evaluates the boolean twice.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189478 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-28 12:14:50 +00:00
Daniel Sanders
2fd3e67dc6 [mips][msa] Added load/store intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189476 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-28 12:04:29 +00:00
Daniel Sanders
abbcf3bd47 [mips][msa] Added move.v
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189471 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-28 10:44:47 +00:00
Daniel Sanders
a6c3a4ee76 [mips][msa] Added cfcmsa, and ctcmsa
The MSA control registers have been added as reserved registers,
and are only used via ISD::Copy(To|From)Reg. The intrinsics are lowered
into these nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189468 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-28 10:26:24 +00:00
Daniel Sanders
f00539cc5a [mips][msa] Added f[cs]af, f[cs]or, f[cs]ueq, f[cs]ul[et], f[cs]une, fsun, ftrunc_[su], hadd_[su], hsub_[su], sr[al]r, sr[al]ri
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189467 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-28 10:12:09 +00:00
Daniel Sanders
e307a9c58c [mips][msa] Few MSA Builtins have side-effects. Added IntrNoMem to those that don't.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189106 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-23 12:21:25 +00:00
Andrea Di Biagio
5768bb8d77 Add function attribute 'optnone'.
This function attribute indicates that the function is not optimized
by any optimization or code generator passes with the 
exception of interprocedural optimization passes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189101 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-23 11:53:55 +00:00
Chandler Carruth
f73826bef0 Add a new helper method to Value to strip in-bounds constant offsets of
pointers, but accumulate the offset into an APInt in the process of
stripping it.

This is a pretty handy thing to have, such as when trying to determine
if two pointers are at some constant relative offset. I'll be committing
a patch shortly to use it for exactly that purpose.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189000 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-22 11:25:11 +00:00
Chandler Carruth
f6db942564 Clean up the doxygen formatting of the comments on the strip* methods on
Value. These methods probably don't belong here, and I'm discussing
moving the lot of them to a better home, but for now I'm about to extend
their functionality and wanted to tidy them up first.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188997 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-22 10:12:18 +00:00
Daniel Sanders
c5158b869b [mips][msa] Removed fcge, fcgt, fsge, fsgt
These instructions were present in a draft spec but were removed before
publication.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188782 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-20 09:41:47 +00:00
Daniel Sanders
6ef333501e [mips][msa] Added insve
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188777 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-20 09:22:54 +00:00
Daniel Sanders
c149fbbe27 [mips][msa] Added and.v, bmnz.v, bmz.v, bsel.v, nor.v, or.v, xor.v
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188767 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-20 08:38:21 +00:00
Hal Finkel
66d1fa6f4b Add a llvm.copysign intrinsic
This adds a llvm.copysign intrinsic; We already have Libfunc recognition for
copysign (which is turned into the FCOPYSIGN SDAG node). In order to
autovectorize calls to copysign in the loop vectorizer, we need a corresponding
intrinsic as well.

In addition to the expected changes to the language reference, the loop
vectorizer, BasicTTI, and the SDAG builder (the intrinsic is transformed into
an FCOPYSIGN node, just like the function call), this also adds FCOPYSIGN to a
few lists in LegalizeVector{Ops,Types} so that vector copysigns can be
expanded.

In TargetLoweringBase::initActions, I've made the default action for FCOPYSIGN
be Expand for vector types. This seems correct for all in-tree targets, and I
think is the right thing to do because, previously, there was no way to generate
vector-values FCOPYSIGN nodes (and most targets don't specify an action for
vector-typed FCOPYSIGN).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188728 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-19 23:35:46 +00:00
Peter Collingbourne
abd37961d5 Introduce non-const overloads for GlobalAlias::{get,resolve}AliasedGlobal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188725 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-19 23:13:33 +00:00
Elena Demikhovsky
c892bd6a74 AVX-512: compiler intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188654 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-19 06:55:01 +00:00
Juergen Ributzka
68af19cbb1 The vbroadcastsi256 intrinsic does not exactly resemble the GCC
builtin. The GCC builtin expects the arguments to be passed by val,
whereas the LLVM intrinsic expects a pointer instead.

This is related to PR 16581 and rdar:14747994.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188608 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-17 16:38:37 +00:00
Jack Carter
bd71eea899 [Mips][msa] Added the simple builtins (madd_q to xori)
Includes:
madd_q, maddr_q, maddv, max_[asu], maxi_[su], min_[asu], mini_[su], mod_[su],
msub_q, msubr_q, msubv, mul_q, mulr_q, mulv, nloc, nlzc, nori, ori, pckev,
pckod, pcnt, sat_[su], shf, sld, sldi, sll, slli, splat, splati, sr[al],
sr[al]i, subs_[su], subss_u, subus_s, subv, subvi, vshf, xori

Patch by Daniel Sanders


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188460 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-15 14:22:07 +00:00
Jack Carter
d0f99639c1 [Mips][msa] Added the simple builtins (fadd to ftq)
Includes:
fadd, fceq, fcg[et], fclass, fcl[et], fcne, fcun, fdiv, fexdo, fexp2,
fexup[lr], ffint_[su], ffql, ffqr, fill, flog2, fmadd, fmax, fmax_a, fmin,
fmin_a, fmsub, fmul, frint, frcp, frsqrt, fseq, fsge, fsgt, fsle, fslt,
fsne, fsqr, fsub, ftint_s, ftq

Patch by Daniel Sanders


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188458 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-15 13:45:36 +00:00
Jack Carter
e2a9376b1b [Mips][msa] Added the simple builtins (add_a to dpsub[su], ilvev to ldi)
Includes:
add_a, adds_[asu], addv, addvi, andi.b, asub_[su].[bhwd], aver?_[su]_[bhwd],
bclr, bclri, bins[lr], bins[lr]i, bmnzi, bmzi, bneg, bnegi, bseli, bset, bseti,
c(eq|ne), c(eq|ne)i, cl[et]_[su], cl[et]i_[su], copy_[su].[bhw], div_[su],
dotp_[su], dpadd_[su], dpsub_[su], ilvev, ilvl, ilvod, ilvr, insv, insve,
ldi

Patch by Daniel Sanders


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188457 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-15 12:24:57 +00:00
Michael Gottesman
2a64a639e5 [stackprotector] Added intrinsic llvm.stackprotectorcheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188191 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-12 18:35:32 +00:00
Hal Finkel
41418d17cc Add ISD::FROUND for libm round()
All libm floating-point rounding functions, except for round(), had their own
ISD nodes. Recent PowerPC cores have an instruction for round(), and so here I'm
adding ISD::FROUND so that round() can be custom lowered as well.

For the most part, this is straightforward. I've added an intrinsic
and a matching ISD node just like those for nearbyint() and friends. The
SelectionDAG pattern I've named frnd (because ISD::FP_ROUND has already claimed
fround).

This will be used by the PowerPC backend in a follow-up commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187926 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-07 22:49:12 +00:00
Elena Demikhovsky
13e6e9171f AVX-512 set: added mask operations, lowering BUILD_VECTOR for i1 vector types.
Added intrinsics and tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187717 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-05 08:52:21 +00:00
Robert Lytton
4da77f8d5f remove executable permission from IntrinsicsXCore.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187584 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 17:17:59 +00:00
Tim Northover
87773c318f AArch64: add initial NEON support
Patch by Ana Pazos.

- Completed implementation of instruction formats:
AdvSIMD three same
AdvSIMD modified immediate
AdvSIMD scalar pairwise

- Completed implementation of instruction classes
(some of the instructions in these classes
belong to yet unfinished instruction formats):
Vector Arithmetic
Vector Immediate
Vector Pairwise Arithmetic

- Initial implementation of instruction formats:
AdvSIMD scalar two-reg misc
AdvSIMD scalar three same

- Intial implementation of instruction class:
Scalar Arithmetic

- Initial clang changes to support arm v8 intrinsics.
Note: no clang changes for scalar intrinsics function name mangling yet.

- Comprehensive test cases for added instructions
To verify auto codegen, encoding, decoding, diagnosis, intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187567 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 09:20:35 +00:00
Robert Lytton
691aa094da XCore target: add GCCBuiltin to four intrinsics
The following are made available by clang in the XCore ABI
	__builtin_bitrev
	__builtin_getid
	__builtin_getps
	__builtin_setps

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187566 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-01 08:41:32 +00:00
Matt Arsenault
485c7fd76b Revert "Remove isCastable since nothing uses it now"
Apparently dragonegg uses it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187454 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 22:02:14 +00:00
Matt Arsenault
0de6832c16 Remove isCastable since nothing uses it now
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187448 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 21:11:17 +00:00
Matt Arsenault
f34dc428fa Change behavior of calling bitcasted alias functions.
It will now only convert the arguments / return value and call
the underlying function if the types are able to be bitcasted.
This avoids using fp<->int conversions that would occur before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187444 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 20:45:05 +00:00
Matt Arsenault
58376d8ede Re-add DataLayout pointer size convenience functions.
These were reverted in r167222 along with the rest
of the last different address space pointer size attempt.
These will be used in later commits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187223 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 17:37:20 +00:00
Rafael Espindola
6fccaafd8b Remove the mblaze backend from llvm.
Approval in here http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-July/064169.html

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187145 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 18:55:05 +00:00
Bill Wendling
9e2ef7780b Add a way to add a kind-value string pair to an attribute.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187138 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 18:34:24 +00:00
Rafael Espindola
2d680824e3 Make these methods const correct.
Thanks to Nick Lewycky for noticing it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187098 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 02:50:08 +00:00
Bill Wendling
9b344d920f Add helpful accessor methods to get the specified function attribute.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187088 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-24 23:45:00 +00:00
Matt Arsenault
e08a57824c Fix missing const
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186857 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-22 18:58:53 +00:00
Joey Gouly
6fec715a1a [ARMv8] Implement the NEON instructions VRINT{N, X, A, Z, M, P}.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186688 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-19 16:34:16 +00:00
Joey Gouly
59b3300664 [ARMv8] Add NEON instructions VCVT{A, N, P, M}.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186574 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-18 11:53:22 +00:00
Adrian Prantl
7a8503c411 Get rid of the Dis/EnableDebugLocations() API.
I'm moving this functionality into clang instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186549 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-18 00:27:46 +00:00
Joey Gouly
19c14abf1c [ARMv8] Add support for the NEON instructions vmaxnm/vminnm.
This adds a new class for non-predicable NEON instructions and a
new DecoderNamespace for v8 NEON instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186504 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-17 13:59:38 +00:00
Manman Ren
c8cfaa1625 Add getModuleFlag(StringRef Key) to query a module flag given Key.
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186470 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-16 23:21:16 +00:00
Tim Northover
2f438131f1 ARM: implement ldrex, strex and clrex intrinsics
Intrinsics already existed for the 64-bit variants, so these support operations
of size at most 32-bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186392 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-16 09:46:55 +00:00
Craig Topper
36dbbf06fb Remove unneeded forward declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186244 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-13 08:28:45 +00:00
Benjamin Kramer
7ffc422659 Mark MDNode::getOperand as readonly.
We can't inline it but we can still CSE calls to it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186156 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 12:05:13 +00:00
Charles Davis
ac226bbf45 Target/X86: Add explicit Win64 and System V/x86-64 calling conventions.
Summary:
This patch adds explicit calling convention types for the Win64 and
System V/x86-64 ABIs. This allows code to override the default, and use
the Win64 convention on a target that wants to use SysV (and
vice-versa). This is needed to implement the `ms_abi` and `sysv_abi` GNU
attributes.

Reviewers:

CC:

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186144 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-12 06:02:35 +00:00
Nadav Rotem
bcd5a0f7ef IRBuilder: add an assertion that checks if we try to get a debug loc from ->end();
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185952 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 17:54:22 +00:00
Nadav Rotem
7b934079c0 Fix a bug in IRBuilder::ClearInsertionPoint. The IR Builder needs to reset both the BB and the insert point inside the BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185883 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 23:27:43 +00:00
Nick Lewycky
6bd46a40e8 Add missing per-argument doesNotAccessMemory accessors. No functionality change
since it has no callers today.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185775 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-07 08:29:51 +00:00