Commit Graph

8349 Commits

Author SHA1 Message Date
Bill Wendling
c69107ca11 Unifacalize the CALLSEQ{START,END} stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44045 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-13 09:19:02 +00:00
Bill Wendling
0f8d9c04d9 Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack
adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).

This can only result in tears...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44037 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-13 00:44:25 +00:00
Anton Korobeynikov
3809fbe789 Completely forgot, that we have some debug information emission on PPC. This should fix
some regressions on ppc nightly tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44029 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-12 23:36:13 +00:00
Bruno Cardoso Lopes
753a98740b Added JumpTable support
Fixed some AsmPrinter issues
Added GLOBAL_OFFSET_TABLE Node handle.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44024 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-12 19:49:57 +00:00
Owen Anderson
20ab29068d Add a flag for indirect branch instructions.
Target maintainers: please check that the instructions for your target are correctly marked.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44012 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-12 07:39:39 +00:00
Anton Korobeynikov
2e7eedf382 Clarify the meaning of '-2' register number
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43998 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-11 19:53:50 +00:00
Anton Korobeynikov
f191c80cd7 Use TableGen to emit information for dwarf register numbers.
This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43997 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-11 19:50:10 +00:00
Dale Johannesen
e3ef744d3e Add CCAssignToStackABISizeAlign for convenience in
dealing with types whose size & alignment are
different on different subtargets.  Use it for x86 f80.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43988 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-10 22:07:15 +00:00
Arnold Schwaighofer
38ada868f2 Update tailcall code to include inline attribute operand for memcpy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43978 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-10 10:48:01 +00:00
Evan Cheng
ed2fc71610 Unbreak x86-64 jumptable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43955 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-09 19:11:23 +00:00
Anton Korobeynikov
b623ce9128 Silence a warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43954 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-09 19:06:14 +00:00
Dale Johannesen
7a42f24f0c Revert previous rewrite per chris's comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43950 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-09 18:07:11 +00:00
Evan Cheng
cc41586b9d Much improved pic jumptable codegen:
Then:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        imull   $4, %ecx, %ecx
        leal    LJTI1_0-"L1$pb"(%eax), %edx
        addl    LJTI1_0-"L1$pb"(%ecx,%eax), %edx
        jmpl    *%edx

        .align  2
        .set L1_0_set_3,LBB1_3-LJTI1_0
        .set L1_0_set_2,LBB1_2-LJTI1_0
        .set L1_0_set_5,LBB1_5-LJTI1_0
        .set L1_0_set_4,LBB1_4-LJTI1_0
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2

Now:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        addl    LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax
        jmpl    *%eax

		.align  2
		.set L1_0_set_3,LBB1_3-"L1$pb"
		.set L1_0_set_2,LBB1_2-"L1$pb"
		.set L1_0_set_5,LBB1_5-"L1$pb"
		.set L1_0_set_4,LBB1_4-"L1$pb"
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43924 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-09 01:32:10 +00:00
Dale Johannesen
3556bc1a9d Rewrite Dwarf number handling per review comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43918 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-09 00:47:10 +00:00
Lauro Ramos Venancio
e0cb36b9fb [ARM] Implement __builtin_thread_pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43892 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-08 17:20:05 +00:00
Dale Johannesen
4542edcaa7 Complete conditionalization of Dwarf reg numbers.
Would somebody not on Darwin please make sure this
doesn't break anything.  Exception handling failures
would be the most likely symptom.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43844 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-07 21:48:35 +00:00
Dale Johannesen
483ec21d90 Interchange Dwarf numbers of ESP and EBP on x86 Darwin.
Much improvement in exception handling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43794 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-07 00:25:05 +00:00
Bruno Cardoso Lopes
000604afd4 Better processor definition
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43749 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-06 03:15:20 +00:00
Rafael Espindola
f1ba1cad38 Move the LowerMEMCPY and LowerMEMCPYCall to a common place.
Thanks for the suggestions Bill :-)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43742 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-05 23:12:20 +00:00
Lauro Ramos Venancio
8699a97a2e [ARM] Fix code generation for:
static __thread struct {
    int a;
    int b;
} teste = {0, 0};



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43722 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-05 18:33:37 +00:00
Evan Cheng
db807edd66 Use movups to spill / restore SSE registers on targets where stacks alignment is
less than 16. This is a temporary solution until dynamic stack alignment is
implemented.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43703 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-05 07:30:01 +00:00
Bruno Cardoso Lopes
c7db5618f9 Added support for PIC code with "explicit relocations" *only*.
Removed all macro code for PIC (goodbye "la").
Support tested with shootout bench.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43697 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-05 03:02:32 +00:00
Duncan Sands
ca0ed74485 Eliminate the remaining uses of getTypeSize. This
should only effect x86 when using long double.  Now
12/16 bytes are output for long double globals (the
exact amount depends on the alignment).  This brings
globals in line with the rest of LLVM: the space
reserved for an object is now always the ABI size.
One tricky point is that only 10 bytes should be
output for long double if it is a field in a packed
struct, which is the reason for the additional
argument to EmitGlobalConstant.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43688 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-05 00:04:43 +00:00
Chris Lattner
fe6575c2bf Fix PR1761 by not printing (rip) suffix when in -static mode.
Evan, please review this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43680 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-04 19:23:28 +00:00
Nick Lewycky
f4c164c2b5 Fix crash before main on ppc/linux with static constructors. PR1771
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43676 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-04 17:32:10 +00:00
Chris Lattner
03e6c7091e Fix PR1763 by allowing the 'q' constraint to work with 64-bit
regs on x86-64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43669 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-04 06:51:12 +00:00
Evan Cheng
a9d641e574 Unbreak tailcall opt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43646 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-02 17:45:40 +00:00
Chris Lattner
253945899b add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43642 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-02 17:04:20 +00:00
Evan Cheng
9df7dc52e8 Missing a getNumOperands check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43630 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-02 01:26:22 +00:00
Duncan Sands
514ab348fd Executive summary: getTypeSize -> getTypeStoreSize / getABITypeSize.
The meaning of getTypeSize was not clear - clarifying it is important
now that we have x86 long double and arbitrary precision integers.
The issue with long double is that it requires 80 bits, and this is
not a multiple of its alignment.  This gives a primitive type for
which getTypeSize differed from getABITypeSize.  For arbitrary precision
integers it is even worse: there is the minimum number of bits needed to
hold the type (eg: 36 for an i36), the maximum number of bits that will
be overwriten when storing the type (40 bits for i36) and the ABI size
(i.e. the storage size rounded up to a multiple of the alignment; 64 bits
for i36).

This patch removes getTypeSize (not really - it is still there but
deprecated to allow for a gradual transition).  Instead there is:

(1) getTypeSizeInBits - a number of bits that suffices to hold all
values of the type.  For a primitive type, this is the minimum number
of bits.  For an i36 this is 36 bits.  For x86 long double it is 80.
This corresponds to gcc's TYPE_PRECISION.

(2) getTypeStoreSizeInBits - the maximum number of bits that is
written when storing the type (or read when reading it).  For an
i36 this is 40 bits, for an x86 long double it is 80 bits.  This
is the size alias analysis is interested in (getTypeStoreSize
returns the number of bytes).  There doesn't seem to be anything
corresponding to this in gcc.

(3) getABITypeSizeInBits - this is getTypeStoreSizeInBits rounded
up to a multiple of the alignment.  For an i36 this is 64, for an
x86 long double this is 96 or 128 depending on the OS.  This is the
spacing between consecutive elements when you form an array out of
this type (getABITypeSize returns the number of bytes).  This is
TYPE_SIZE in gcc.

Since successive elements in a SequentialType (arrays, pointers
and vectors) need to be aligned, the spacing between them will be
given by getABITypeSize.  This means that the size of an array
is the length times the getABITypeSize.  It also means that GEP
computations need to use getABITypeSize when computing offsets.
Furthermore, if an alloca allocates several elements at once then
these too need to be aligned, so the size of the alloca has to be
the number of elements multiplied by getABITypeSize.  Logically
speaking this doesn't have to be the case when allocating just
one element, but it is simpler to also use getABITypeSize in this
case.  So alloca's and mallocs should use getABITypeSize.  Finally,
since gcc's only notion of size is that given by getABITypeSize, if
you want to output assembler etc the same as gcc then getABITypeSize
is the size you want.

Since a store will overwrite no more than getTypeStoreSize bytes,
and a read will read no more than that many bytes, this is the
notion of size appropriate for alias analysis calculations.

In this patch I have corrected all type size uses except some of
those in ScalarReplAggregates, lib/Codegen, lib/Target (the hard
cases).  I will get around to auditing these too at some point,
but I could do with some help.

Finally, I made one change which I think wise but others might
consider pointless and suboptimal: in an unpacked struct the
amount of space allocated for a field is now given by the ABI
size rather than getTypeStoreSize.  I did this because every
other place that reserves memory for a type (eg: alloca) now
uses getABITypeSize, and I didn't want to make an exception
for unpacked structs, i.e. I did it to make things more uniform.
This only effects structs containing long doubles and arbitrary
precision integers.  If someone wants to pack these types more
tightly they can always use a packed struct.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43620 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-01 20:53:16 +00:00
Bill Wendling
0d642871f5 Silence, accersed warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43609 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-01 08:51:44 +00:00
Rafael Espindola
e0703c84dd Make ARM and X86 LowerMEMCPY identical by moving the isThumb check into getMaxInlineSizeThreshold
and by restructuring the X86 version.

New I just have to move this to a common place :-)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43554 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-31 14:39:58 +00:00
Rafael Espindola
fc05f402ea Make ARM an X86 memcpy expansion more similar to each other.
Now both subtarget define getMaxInlineSizeThreshold and the expansion uses it.

This should not change generated code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43552 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-31 11:52:06 +00:00
Dale Johannesen
25f1d08619 Make i64=expand_vector_elt(v2i64) work in 32-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43535 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-31 00:32:36 +00:00
Dale Johannesen
c784208a73 Add missing SSE builtins: CVTPD2PI, CVTPS2PI,
CVTTPD2PI, CVTTPS2PI, CVTPI2PD, CVTPI2PS.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43523 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-30 22:15:38 +00:00
Duncan Sands
14db5efbf0 Fix for visibility warnings generated by gcc-4.2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43500 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-30 13:14:37 +00:00
Dale Johannesen
8d26e594f0 Add missing MMX PSUBQ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43488 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-30 01:18:38 +00:00
Evan Cheng
3c3ddb3a85 Enable more fold (sext (load x)) -> (sext (truncate (sextload x)))
transformation. Previously, it's restricted by ensuring the number of load uses
is one. Now the restriction is loosened up by allowing setcc uses to be
"extended" (e.g. setcc x, c, eq -> setcc sext(x), sext(c), eq).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43465 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-29 19:58:20 +00:00
Evan Cheng
e127a73154 Avoid doing something dumb like rewriting using a 64-bit iv in 32-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43446 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-29 07:57:50 +00:00
Chris Lattner
dc4756bfda add a note.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43444 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-29 06:19:48 +00:00
Chris Lattner
fb7f343615 Add support for the x86-64 'q' regigster modifier, and add support for the
b/h/w/k/q inline asm memory modifiers, which are just ignored.  This fixes
PR1748 and CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43430 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-29 03:09:07 +00:00
Chris Lattner
b361ec3197 Fix PR1749 and InstCombine/2007-10-28-EmptyField.ll by handling
zero-length fields better.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43427 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-29 02:40:02 +00:00
Evan Cheng
402b678373 New entry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43420 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-28 04:01:09 +00:00
Anton Korobeynikov
8d9d74eaa8 Fix off-by-one stack offset computations (dwarf information) for callee-saved
registers in case, when FP pointer was eliminated. This should fixes misc. random
EH-related crahses, when stuff is compiled with -fomit-frame-pointer.
Thanks Duncan for nailing this bug!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43381 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-26 09:13:24 +00:00
Eric Christopher
3c999a270e clo/clz aren't supported on mips I. Keep them around for when we'll
want them later (mips32/64).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43380 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-26 04:00:13 +00:00
Evan Cheng
2bd122c4d9 Loosen up iv reuse to allow reuse of the same stride but a larger type when truncating from the larger type to smaller type is free.
e.g.
Turns this loop:
LBB1_1: # entry.bb_crit_edge
        xorl    %ecx, %ecx
        xorw    %dx, %dx
        movw    %dx, %si
LBB1_2: # bb
        movl    L_X$non_lazy_ptr, %edi
        movw    %si, (%edi)
        movl    L_Y$non_lazy_ptr, %edi
        movw    %dx, (%edi)
		addw    $4, %dx
		incw    %si
		incl    %ecx
		cmpl    %eax, %ecx
		jne     LBB1_2  # bb
	
into

LBB1_1: # entry.bb_crit_edge
        xorl    %ecx, %ecx
        xorw    %dx, %dx
LBB1_2: # bb
        movl    L_X$non_lazy_ptr, %esi
        movw    %cx, (%esi)
        movl    L_Y$non_lazy_ptr, %esi
        movw    %dx, (%esi)
        addw    $4, %dx
		incl    %ecx
        cmpl    %eax, %ecx
        jne     LBB1_2  # bb


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43375 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-26 01:56:11 +00:00
Dale Johannesen
ca4571e79f Support non-POSIX hosts by removing use of strncasecmp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43364 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-25 21:54:43 +00:00
Dale Johannesen
79217064c6 Disable a couple more things for ppcf128.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43267 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-23 23:20:14 +00:00
Evan Cheng
152b7e1874 Temporary solution: added a different set of BCTRL_Macho / BCTRL_ELF with right callee-saved defs set for ppc64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43248 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-23 06:42:42 +00:00
Evan Cheng
4102eb57bb Fix memcpy lowering when addresses are 4-byte aligned but size is not multiple of 4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43234 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-22 22:11:27 +00:00
Dan Gohman
8368805e25 Fix the folding of multiplication into addresses on x86, which was broken
by the recent {U,S}MUL_LOHI changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43230 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-22 20:22:24 +00:00
Evan Cheng
3311876c3c Use ptr type in the immediate field of a BxA instruction so we don't end up selecting 32-bit call instruction for ppc64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43228 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-22 19:46:19 +00:00
Evan Cheng
42b08be973 Fix an unfolding bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43212 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-22 03:03:20 +00:00
Dale Johannesen
61c7ef34e3 Allow for copysign having f80 second argument.
Fixes 5550319.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43205 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-21 01:07:44 +00:00
Evan Cheng
f7c9695a38 Resolve unfold tables ambiguity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43194 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-19 23:50:58 +00:00
Evan Cheng
66f7163545 Local spiller optimization:
Turn a store folding instruction into a load folding instruction. e.g.
     xorl  %edi, %eax
     movl  %eax, -32(%ebp)
     movl  -36(%ebp), %eax
     orl   %eax, -32(%ebp)
=>
     xorl  %edi, %eax
     orl   -36(%ebp), %eax
     mov   %eax, -32(%ebp)
This enables the unfolding optimization for a subsequent instruction which will
also eliminate the newly introduced store instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43192 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-19 21:23:22 +00:00
Rafael Espindola
7b73a5d6de split LowerMEMCPY into LowerMEMCPYCall and LowerMEMCPYInline in the ARM backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43176 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-19 14:35:17 +00:00
Rafael Espindola
5c0d6ed325 Add support for byval function whose argument is not 32 bit aligned.
To do this it is necessary to add a "always inline" argument to the
memcpy node. For completeness I have also added this node to memmove
and memset.  I have also added getMem* functions, because the extra
argument makes it cumbersome to use getNode and because I get confused
by it :-)




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2007-10-19 10:41:11 +00:00
Chris Lattner
26cb2862e9 comment fixes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43168 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-19 04:08:28 +00:00
Chris Lattner
3a7c33a853 Add an easy microoptimization I noticed.
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2007-10-19 03:29:26 +00:00
Dale Johannesen
fabd32deb0 More ppcf128 issues (maybe the last)?
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2007-10-19 00:59:18 +00:00
Evan Cheng
f0a0cddbcd - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding.
- Fix some copy+paste bugs.


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2007-10-18 22:40:57 +00:00
Evan Cheng
58184e6878 Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface.
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2007-10-18 21:29:24 +00:00
Christopher Lamb
a4c791072f Fix a misnamed parameter.
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2007-10-18 19:29:45 +00:00
Christopher Lamb
91ee18c1f7 Fix a typo
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2007-10-18 19:28:55 +00:00
Gordon Henriksen
38ffcc93eb Work around downrev gccs which do not inherit visibility of the
Registry<>::iterator member class.

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2007-10-18 11:53:05 +00:00
Chris Lattner
65a3323b0a legalizing the ret operation on f64 shouldn't introduce a new
i64 bit convert needlessly.


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2007-10-18 06:17:07 +00:00
Gordon Henriksen
4b2b9402c5 Switching TargetMachineRegistry to use the new generic Registry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43094 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-17 21:28:48 +00:00
Chris Lattner
7ef1a4bf04 Change fp to sint legalization on x86-32 to do 2 x i32
loads instead of 1 x i64 loads.  This doesn't change any functionality yet.


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2007-10-17 06:17:29 +00:00
Chris Lattner
2ff75ee9ab fix some funny indentation, add comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43066 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-17 06:02:13 +00:00
Dale Johannesen
c274f54ed8 Check for invalid cc's in f80 select.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43033 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-16 18:09:08 +00:00
Chris Lattner
f602a25668 Fix a bug handling frame references in ppc inline asm when the frame offset
doesn't fit into 16 bits.


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2007-10-16 18:00:18 +00:00
Arnold Schwaighofer
448175fd02 Correction to tail call optimization code. The new return address
was stored to the acutal stack slot before the parameters were
lowered to their stack slot. This could cause arguments to be
overwritten by the return address if the called function had less
parameters than the caller function. The update should remove the
last failing test case of llc-beta: SPASS.


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2007-10-16 09:05:00 +00:00
Chris Lattner
1de7c1dd6f Change LowerFP_TO_SINT to create the specific code it needs instead of
unconditionally creating an i64 bitcast.  With the future legalizer
design, operation legalization can't introduce new nodes with illegal
types.

This fixes the rest of olden on ppc32.


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2007-10-15 20:14:52 +00:00
Evan Cheng
87c8935fd5 LowerFP_TO_SINT must not create a stack object if it's not needed.
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2007-10-15 20:11:21 +00:00
Dale Johannesen
6e64473603 Handle PPC long double in CBackend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42972 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-15 01:05:37 +00:00
Evan Cheng
3644601563 Unbreak x86-64.
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2007-10-14 10:09:39 +00:00
Evan Cheng
347d39f1fd Revert 42908 for now.
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2007-10-14 05:57:21 +00:00
Dale Johannesen
296c176141 Fix type mismatch error in PPC Altivec (only causes
a problem when asserts are on).  From vecLib.



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2007-10-14 01:58:32 +00:00
Duncan Sands
7fef59f7e5 Clarify that fastcc has a problem with nested function
trampolines, rather than with nested functions themselves.


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2007-10-13 07:38:37 +00:00
Evan Cheng
106e8020bd Change unfoldMemoryOperand(). User is now responsible for passing in the
register used by the unfolded instructions. User can also specify whether to
unfold the load, the store, or both.


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2007-10-13 02:35:06 +00:00
Arnold Schwaighofer
92226dd19f Correcting the corrections. Bad bad baaad emacs!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42935 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 21:53:12 +00:00
Arnold Schwaighofer
48abc5cf6b Corrected many typing errors. And removed 'nest' parameter handling
for fastcc from X86CallingConv.td.  This means that nested functions
are not supported for calling convention 'fastcc'.



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2007-10-12 21:30:57 +00:00
Duncan Sands
2e4d675d93 Due to the new tail call optimization, trampolines can no
longer be created for fastcc functions.


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2007-10-12 19:37:31 +00:00
Evan Cheng
1c5d83c14e Update.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42922 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 18:22:55 +00:00
Dan Gohman
8ddde0a151 Change the names used for internal labels to use the current
function symbol name instead of a codegen-assigned function
number.

Thanks Evan! :-)


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2007-10-12 14:53:36 +00:00
Dan Gohman
f0d0089340 Mark vector ctpop, cttz, and ctlz as Expand on x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42905 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 14:09:42 +00:00
Dan Gohman
a3f269f7f6 Mark vector pow, ctpop, cttz, and ctlz as Expand on PowerPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42904 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 14:08:57 +00:00
Evan Cheng
f4a9c69ff6 Fold load / store into MOV32to32_ and MOV16to16_.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42895 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 08:38:01 +00:00
Evan Cheng
96aaa54529 Flag MOV32to32_ with EXTRACT_SUBREG. They should not be scheduled apart.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42894 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 07:55:53 +00:00
Dan Gohman
f96e4de403 Set ISD::FPOW to Expand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42881 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 23:21:31 +00:00
Dale Johannesen
83e105c600 Add missing argument to PALIGNR
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42874 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 20:58:37 +00:00
Arnold Schwaighofer
c85e1716f0 Added tail call optimization to the x86 back end. It can be
enabled by passing -tailcallopt to llc.  The optimization is
performed if the following conditions are satisfied:
* caller/callee are fastcc
* elf/pic is disabled OR
  elf/pic enabled + callee is in module + callee has
  visibility protected or hidden


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2007-10-11 19:40:01 +00:00
Chris Lattner
85d0aaa291 Fix CodeGen/Generic/BasicInstrs.llx on sparc by marking divrem
illegal.  Thanks to gabor for pointing this out!


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2007-10-10 18:10:57 +00:00
Dale Johannesen
6eaeff29b8 Next PPC long double bits: ppcf128->i32 conversion.
Surprisingly complicated.
Adds getTargetNode for 2 outputs, no inputs (missing).


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2007-10-10 01:01:31 +00:00
Dan Gohman
6d60cac029 LowerIntegerDivOrRem no longer exists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42787 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-09 15:45:13 +00:00
Dan Gohman
74f87a63b6 Fix grammar in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42786 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-09 15:44:37 +00:00
Dan Gohman
5bf88ebab9 This is done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42785 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-09 15:42:21 +00:00
Evan Cheng
b76143cf8f Under 64-bit mode use LEA64_32r instead of LEA64r to save a byte.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42783 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-09 07:14:53 +00:00
Bruno Cardoso Lopes
8262df3aa4 Position Independent Code (PIC) support [3]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42780 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-09 03:15:11 +00:00
Bruno Cardoso Lopes
0a6040063f Position Independent Code (PIC) support [2]
- Added a function to hold the stack location 
  where GP must be stored during LowerCALL
- AsmPrinter now emits directives based on
  relocation type
- PIC_ set to default relocation type (same as GCC)


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2007-10-09 03:01:19 +00:00
Bruno Cardoso Lopes
e78080c4dc Position Independent Code (PIC) support [1]
- Modified instruction format to handle pseudo instructions
- Added LoadAddr SDNode to load symbols.


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2007-10-09 02:55:31 +00:00
Evan Cheng
3f41d66d75 Bug fix. X86 was emitting redundant setcc and test instructions before a conditional move.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42774 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08 22:16:29 +00:00
Dan Gohman
525178cdbf Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to
use ISD::{S,U}DIVREM and ISD::{S,U}MUL_HIO. Move the lowering code
associated with these operators into target-independent in LegalizeDAG.cpp
and TargetLowering.cpp.


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2007-10-08 18:33:35 +00:00
Evan Cheng
d47c84c1c9 Allow x86 compare to be commutable by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42761 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08 18:27:46 +00:00
Dan Gohman
3ce990dc05 When we start enabling SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM in
target-indepenent lowering, don't use them on PowerPC.


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2007-10-08 17:28:24 +00:00
Dan Gohman
8e41ed7c4e Simplify getIntPtrType, allowing it to work for arbitrary pointer sizes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42751 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08 15:16:25 +00:00
Chris Lattner
f443ba7f97 disable this entirely: it is causing use of invalidated iterators and infinite looping.
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2007-10-07 22:00:31 +00:00
Chris Lattner
eac9385f09 Fix many regressions on x86 by avoiding dereferencing the end iterator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42738 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-07 21:53:12 +00:00
Anton Korobeynikov
2508372746 Oops, I really wanted to commit this part also :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42700 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-06 16:39:43 +00:00
Anton Korobeynikov
4f1c33f7c8 Move merge code into new helper function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42699 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-06 16:17:49 +00:00
Evan Cheng
c231e8c8a5 Added DAG xforms. e.g.
(vextract (v4f32 s2v (f32 load $addr)), 0) -> (f32 load $addr) 
(vextract (v4i32 bc (v4f32 s2v (f32 load $addr))), 0) -> (i32 load $addr)
Remove x86 specific patterns.


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2007-10-06 02:46:29 +00:00
Dale Johannesen
638ccd52b9 Next powerpc long double bits. Comparisons work,
although not well, and shortening FP converts.



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2007-10-06 01:24:11 +00:00
Evan Cheng
7ad42d9ec0 Commute x86 cmove instructions by swapping the operands and change the condition
to its inverse.
Testing this as llcbeta


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2007-10-05 23:13:21 +00:00
Evan Cheng
57cce6c466 This is done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42656 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 22:34:59 +00:00
Evan Cheng
ecf80ac68a Enable convertToThreeAddress for X86 by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42655 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 22:31:10 +00:00
Evan Cheng
b75ed322c4 INC64_32r -> LEA64_32r is better than INC64_32r -> LEA32r, but it still can
cause performance degradation.


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2007-10-05 21:55:32 +00:00
Evan Cheng
559dc46d46 In 64-bit mode, avoid using leal with 32-bit 32-bit address size, e.g.
leal 1(%ecx), %edi, which requires 67H prefix.


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2007-10-05 20:34:26 +00:00
Dale Johannesen
161e897b0f First round of ppc long double. call/return and
basic arithmetic works.
Rename RTLIB long double functions to distinguish
different flavors of long double; the lib functions
have different names, alas.


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2007-10-05 20:04:43 +00:00
Evan Cheng
b952d1f5be Add support to convert more 64-bit instructions to 3-address instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42642 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 18:20:36 +00:00
Evan Cheng
3154cb67d1 ADC and SBB uses EFLAGS.
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2007-10-05 17:59:57 +00:00
Dan Gohman
52c0253f04 Change a few more spaces to tabs in assembly output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42638 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 15:58:41 +00:00
Dan Gohman
4e8e831a4e Change a space to a tab in the assembly output of a .globl directive
for consistency.


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2007-10-05 15:54:58 +00:00
Evan Cheng
3f411c7627 Testing convertToThreeeAddress as X86 llcbeta.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42630 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 08:04:01 +00:00
Evan Cheng
75b4e46b8a Added storeRegToAddr, loadRegFromAddr, and unfoldMemoryOperand's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42624 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 01:34:55 +00:00
Evan Cheng
afa98bcf3d Not needed any more.
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2007-10-05 01:34:14 +00:00
Evan Cheng
e203ae9971 Forgot these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42622 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 01:33:45 +00:00
Evan Cheng
66f0f64082 - Added a few target hooks to generate load / store instructions from / to any
address (not just from / to frameindexes).
- Added target hooks to unfold load / store instructions / SDNodes into separate
load, data processing, store instructions / SDNodes.


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2007-10-05 01:32:41 +00:00
Chris Lattner
87b77b9079 add a note.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42607 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-04 15:47:27 +00:00
Dan Gohman
cb406c2597 Use empty() member functions when that's what's being tested for instead
of comparing begin() and end().


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2007-10-03 19:26:29 +00:00
Chris Lattner
fce5cfe190 add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42579 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-03 17:10:03 +00:00
Chris Lattner
e1bb6ab7b0 add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42573 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-03 06:10:59 +00:00
Chris Lattner
67a1af9709 Bill's example is still not enough to repro this, but it has other issues that
seem significant as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42564 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-03 03:40:24 +00:00
Bill Wendling
7687bd0b2b Another micro-opt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42554 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-02 21:49:31 +00:00
Bill Wendling
2bb6d459e6 Another missed optimization with LICM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42552 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-02 21:43:06 +00:00
Bill Wendling
892d392905 Small label changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42549 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-02 21:02:53 +00:00
Bill Wendling
6dbb1b59ae Now with source code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42548 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-02 21:01:16 +00:00
Bill Wendling
8d1c8ce3d8 Now with LL code!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42547 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-02 20:54:32 +00:00
Bill Wendling
6aab4910cd Another missed optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42546 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-02 20:42:59 +00:00
Bill Wendling
c720279ac7 Micro-optimization -- missed LICM opportunity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42542 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-02 19:55:05 +00:00
Dale Johannesen
9ab7fb3ba4 Rewrite sqrt and powi to use anyfloat. By popular demand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42537 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-02 17:43:59 +00:00
Evan Cheng
7f3394f379 Refactor code to add load / store folded instructions -> register only
instructions reverse map.


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2007-10-01 23:44:33 +00:00
Evan Cheng
fef922a4d5 Typo. X86comi doesn't read / write chain's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42492 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-01 18:12:48 +00:00
Dale Johannesen
3b5b4cd1a5 Add getABITypeSize, getABITypeSizeInBits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42488 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-01 16:03:14 +00:00
Gordon Henriksen
cd8bc05102 AsmPrinters overriding getAnalysisUsage should call super.
And not super's super, either.

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2007-09-30 13:39:29 +00:00
Evan Cheng
e5f6204cd5 Enabling new condition code modeling scheme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42459 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-29 00:00:36 +00:00
Rafael Espindola
068317bfa3 Refactor the memcpy lowering for the x86 target.
The only generated code difference is that now we call memcpy when
the size of the array is unknown. This matches GCC behavior and is
better since the run time value can be arbitrarily large.



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2007-09-28 12:53:01 +00:00
Evan Cheng
fa00feb7f8 Stop inventing new words. :-)
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2007-09-28 01:35:02 +00:00
Evan Cheng
8decf6bc18 Pessimisively assume ADJCALLSTACKDOWN / ADJCALLSTACKUP (which becomes sub / add) clobbers EFLAGS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42426 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-28 01:19:48 +00:00
Dan Gohman
82482944ed TargetAsmInfo::getAddressSize() was incorrect for x86-64 and 64-bit targets
other than PPC64. Instead of fixing it, just remove it and fix all the
places that use it to use TargetData::getPointerSize() instead, as there
aren't very many. Most of the references were in DwarfWriter.cpp.


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2007-09-27 23:12:31 +00:00
Evan Cheng
3f2d9ec186 Use GR64 in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42417 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-27 21:50:05 +00:00
Evan Cheng
1ed37fdb3b Doh. Calls clobber EFLAGS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42413 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-27 19:01:55 +00:00
Dale Johannesen
693717fbe6 Make temporaries explicit to avoid premature
destruction of compiler-created ones.



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2007-09-26 23:20:33 +00:00
Evan Cheng
42d60274ea - Move getPhysicalRegisterRegClass() from ScheduleDAG to MRegisterInfo.
- Added ability to emit cross class register copies to the BBRU scheduler.
- More aggressive backtracking.


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2007-09-26 21:36:17 +00:00
Evan Cheng
ff11026575 - Added MRegisterInfo::getCrossCopyRegClass() hook. For register classes where reg to reg copies are not possible, this returns another register class which registers in the specified register class can be copied to (and copy back from).
- X86 copyRegToReg() now supports copying between EFLAGS and GR32 / GR64 registers.


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2007-09-26 21:31:07 +00:00
Evan Cheng
bf4f89dc00 Some assemblers do not recognize aliases pushfd, pushfq, popfd, and popfq. Just emit them as pushf and popf.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42371 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 21:28:00 +00:00
Dale Johannesen
2f42901dff Enable codegen for long double abs, sin, cos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42368 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 21:10:55 +00:00
Evan Cheng
8d5562be30 Typos: POPQ -> POPFQ, POPD -> POPFD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42348 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 06:38:29 +00:00
Chris Lattner
1efa1696e3 move PR1160 here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42347 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 06:29:31 +00:00
Evan Cheng
9efce638d3 Allow copyRegToReg to emit cross register classes copies.
Tested with "make check"!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42346 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 06:25:56 +00:00
Chris Lattner
61001b8bd4 move PR1264 here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42345 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 06:15:48 +00:00
Evan Cheng
2f245ba572 Add pushf{d|q}, popf{d|q} to push and pop EFLAGS register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42335 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 01:29:06 +00:00
Evan Cheng
1a35edba13 translateX86CC updates the last two operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42333 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 00:45:55 +00:00
Anton Korobeynikov
29be8486e3 Correctly restore stack pointer after realignment in main() on Cygwin/Mingw32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42332 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 00:13:34 +00:00
Evan Cheng
fdd0837448 Missing load / store folding entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42323 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 22:10:43 +00:00
Anton Korobeynikov
2fe1259d0a Partly revert invalid r41774
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42322 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 21:52:30 +00:00
Dan Gohman
677ccc6e8b More explicit keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42316 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 20:27:06 +00:00
Dan Gohman
b94fc1bcb2 Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42313 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 19:37:26 +00:00
Evan Cheng
4e4d2d7d9a New style x87 cmp instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42312 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 19:08:02 +00:00
Dan Gohman
a37c9f7506 When both x/y and x%y are needed (x and y both scalar integer), compute
both results with a single div or idiv instruction. This uses new X86ISD
nodes for DIV and IDIV which are introduced during the legalize phase
so that the SelectionDAG's CSE can automatically eliminate redundant
computations.


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2007-09-25 18:23:27 +00:00
Dan Gohman
c3b0b5ca1d Move the setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand) and
the check to see if the assembler supports .loc from X86TargetLowering
into the superclass TargetLowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42297 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 15:10:49 +00:00
Evan Cheng
0488db9b99 Added support for new condition code modeling scheme (i.e. physical register dependency). These are a bunch of instructions that are duplicated so the x86 backend can support both the old and new schemes at the same time. They will be deleted after
all the kinks are worked out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42285 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 01:57:46 +00:00
Evan Cheng
a3602685b3 New temporary option -new-cc-modeling-scheme to test the new cc modeling scheme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42283 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 01:50:04 +00:00
Evan Cheng
d23aa5a053 Rename keyword "modify" -> "implicit".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42282 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 01:48:59 +00:00
Dale Johannesen
48d1e4517e When mixing SSE and x87 codegen, it's possible to
have situations where an SSE instruction turns into
multiple blocks, with the live range of an x87
register crossing them.  To do this correctly make
sure we examine all blocks when inserting
FP_REG_KILL.  PR 1697.  (This was exposed by my
fix for PR 1681, but the same thing could happen
mixing x87 long double with SSE.)



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2007-09-24 22:52:39 +00:00
Dan Gohman
a5a403d766 Add support on x86 for having Legalize lower ISD::LOCATION to ISD::DEBUG_LOC
instead of ISD::LABEL with a manual .debug_line entry when the assembler
supports .file and .loc directives.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42278 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-24 21:54:14 +00:00
Dan Gohman
72252732c8 Merge hasDotLoc and hasDotFile into hasDotLocAndDotFile since .loc and .file
aren't really usable without each other. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42274 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-24 21:09:53 +00:00
Bruno Cardoso Lopes
b42abebe36 Added "LoadEffective" pattern to handle stack locations.
Fixed some comments


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42271 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-24 20:15:11 +00:00
Dan Gohman
6b5766e27c Fix the syntax for the .loc directive in preparation for using it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42268 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-24 19:25:06 +00:00
Dan Gohman
5e6e93ecdc The code that used the StartLabelId label was removed, so remove the
code that creates the label too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42265 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-24 16:44:26 +00:00
Chris Lattner
9b4baf1692 claim that "st" is from the 80-bit register file. This causes x87-using inline
asm to die with:

ScheduleDAG.cpp:269: failed assertion `false && "Couldn't find the register class"'

instead of:
failed assertion `RegMap->getRegClass(VReg) == RC && "Register class of operand and regclass of use don't agree!"'

yay.



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2007-09-24 05:27:37 +00:00
Dale Johannesen
f1fc3a8fa6 Fix PR 1681. When X86 target uses +sse -sse2,
keep f32 in SSE registers and f64 in x87.  This
is effectively a new codegen mode.
Change addLegalFPImmediate to permit float and
double variants to do different things.
Adjust callers.



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2007-09-23 14:52:20 +00:00
Chris Lattner
96b207c380 Fix PR1679, by printing GEP indices as signed values instead of unsigned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42239 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-22 20:16:48 +00:00
Rafael Espindola
a37ac9ff53 Don't add a default STACK_ALIGN (use the generic ABI alignment)
Implement calls to functions with byval arguments on X86


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2007-09-21 15:50:22 +00:00
Rafael Espindola
1242d28093 small cleanup: use LowerMemArgument in LowerFastCCArguments also
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42189 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-21 14:55:38 +00:00
Evan Cheng
76a4023096 Honor user-defined section specification of a global, ignores whether its initializer is null.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42182 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-21 00:41:19 +00:00
Devang Patel
0f0daea654 Do not override user specified section.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42179 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-20 23:07:37 +00:00
Dan Gohman
a4ddacf60b Fix several more entries in the x86 reload/remat folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42162 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-20 14:17:21 +00:00
Dale Johannesen
41de436ca3 another long double buglet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42159 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-20 01:27:54 +00:00
Evan Cheng
17207ddf38 Enable if-conversion for ARM by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42156 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-20 00:48:22 +00:00
Dale Johannesen
73328d14ac More long double fixes. x86_64 should build now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42155 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-19 23:55:34 +00:00
Evan Cheng
e71bff7405 Avoid referencing deleted instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42153 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-19 21:48:07 +00:00
Evan Cheng
fab7eff0fa PSHUFDmi, etc. are actually folding a load, not a store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42147 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-19 19:02:47 +00:00
Evan Cheng
dcfa73fe3c Set CCR (EFLAGS) copy cost to -1, i.e. extremely expensive to copy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42124 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-19 01:36:39 +00:00
Evan Cheng
a3ca3149f2 Add CopyCost to TargetRegisterClass. This specifies the cost of copying a value
between two registers in the specific class.


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2007-09-19 01:35:01 +00:00
Dan Gohman
869b2b2c23 Move the entries for 64-bit CMP, IMUL, and a few others into the correct
tables so that they are eligible for reload/remat folding. And add
entries for JMP and CALL.


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2007-09-18 14:59:14 +00:00
Dale Johannesen
ca8035e356 Remove RSTRegClass case from loadRegFromStackSlot
and storeRegToStackSlot.  Evan and I concluded this
should never be needed and it appears to be true.
(It if is needed, adjustment would be needed for
long double to work.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42049 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-17 20:15:38 +00:00
Chris Lattner
76c1b97e40 Merge DenseMapKeyInfo & DenseMapValueInfo into DenseMapInfo
Add a new DenseMapInfo::isEqual method to allow clients to redefine
the equality predicate used when probing the hash table.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42042 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-17 18:34:04 +00:00
Evan Cheng
7d6ff3a25d X86ISD::TEST is dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42037 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-17 17:42:53 +00:00
Dan Gohman
a0a7c1de9c Add 64-bit jmp instructions to the list of instructions that
can terminate a block with no fall-through.


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2007-09-17 15:19:08 +00:00