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8349 Commits

Author SHA1 Message Date
Dan Gohman
8368805e25 Fix the folding of multiplication into addresses on x86, which was broken 
by the recent {U,S}MUL_LOHI changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43230 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-22 20:22:24 +00:00
Evan Cheng
3311876c3c Use ptr type in the immediate field of a BxA instruction so we don't end up selecting 32-bit call instruction for ppc64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43228 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-22 19:46:19 +00:00
Evan Cheng
42b08be973 Fix an unfolding bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43212 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-22 03:03:20 +00:00
Dale Johannesen
61c7ef34e3 Allow for copysign having f80 second argument. 
Fixes 5550319.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43205 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-21 01:07:44 +00:00
Evan Cheng
f7c9695a38 Resolve unfold tables ambiguity. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43194 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-19 23:50:58 +00:00
Evan Cheng
66f7163545 Local spiller optimization: 
Turn a store folding instruction into a load folding instruction. e.g.
     xorl  %edi, %eax
     movl  %eax, -32(%ebp)
     movl  -36(%ebp), %eax
     orl   %eax, -32(%ebp)
=>
     xorl  %edi, %eax
     orl   -36(%ebp), %eax
     mov   %eax, -32(%ebp)
This enables the unfolding optimization for a subsequent instruction which will
also eliminate the newly introduced store instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43192 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-19 21:23:22 +00:00
Rafael Espindola
7b73a5d6de split LowerMEMCPY into LowerMEMCPYCall and LowerMEMCPYInline in the ARM backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43176 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-19 14:35:17 +00:00
Rafael Espindola
5c0d6ed325 Add support for byval function whose argument is not 32 bit aligned. 
To do this it is necessary to add a "always inline" argument to the
memcpy node. For completeness I have also added this node to memmove
and memset.  I have also added getMem* functions, because the extra
argument makes it cumbersome to use getNode and because I get confused
by it :-)




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43172 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-19 10:41:11 +00:00
Chris Lattner
26cb2862e9 comment fixes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43168 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-19 04:08:28 +00:00
Chris Lattner
3a7c33a853 Add an easy microoptimization I noticed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43164 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-19 03:29:26 +00:00
Dale Johannesen
fabd32deb0 More ppcf128 issues (maybe the last)? 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43160 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-19 00:59:18 +00:00
Evan Cheng
f0a0cddbcd - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding. 
- Fix some copy+paste bugs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43153 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-18 22:40:57 +00:00
Evan Cheng
58184e6878 Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43150 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-18 21:29:24 +00:00
Christopher Lamb
a4c791072f Fix a misnamed parameter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43145 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-18 19:29:45 +00:00
Christopher Lamb
91ee18c1f7 Fix a typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43144 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-18 19:28:55 +00:00
Gordon Henriksen
38ffcc93eb Work around downrev gccs which do not inherit visibility of the 
Registry<>::iterator member class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43122 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-18 11:53:05 +00:00
Chris Lattner
65a3323b0a legalizing the ret operation on f64 shouldn't introduce a new 
i64 bit convert needlessly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43116 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-18 06:17:07 +00:00
Gordon Henriksen
4b2b9402c5 Switching TargetMachineRegistry to use the new generic Registry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43094 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-17 21:28:48 +00:00
Chris Lattner
7ef1a4bf04 Change fp to sint legalization on x86-32 to do 2 x i32 
loads instead of 1 x i64 loads.  This doesn't change any functionality yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43068 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-17 06:17:29 +00:00
Chris Lattner
2ff75ee9ab fix some funny indentation, add comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43066 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-17 06:02:13 +00:00
Dale Johannesen
c274f54ed8 Check for invalid cc's in f80 select. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43033 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-16 18:09:08 +00:00
Chris Lattner
f602a25668 Fix a bug handling frame references in ppc inline asm when the frame offset 
doesn't fit into 16 bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43032 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-16 18:00:18 +00:00
Arnold Schwaighofer
448175fd02 Correction to tail call optimization code. The new return address 
was stored to the acutal stack slot before the parameters were
lowered to their stack slot. This could cause arguments to be
overwritten by the return address if the called function had less
parameters than the caller function. The update should remove the
last failing test case of llc-beta: SPASS.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43027 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-16 09:05:00 +00:00
Chris Lattner
1de7c1dd6f Change LowerFP_TO_SINT to create the specific code it needs instead of 
unconditionally creating an i64 bitcast.  With the future legalizer
design, operation legalization can't introduce new nodes with illegal
types.

This fixes the rest of olden on ppc32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43005 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-15 20:14:52 +00:00
Evan Cheng
87c8935fd5 LowerFP_TO_SINT must not create a stack object if it's not needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43004 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-15 20:11:21 +00:00
Dale Johannesen
6e64473603 Handle PPC long double in CBackend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42972 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-15 01:05:37 +00:00
Evan Cheng
3644601563 Unbreak x86-64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42962 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-14 10:09:39 +00:00
Evan Cheng
347d39f1fd Revert 42908 for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42960 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-14 05:57:21 +00:00
Dale Johannesen
296c176141 Fix type mismatch error in PPC Altivec (only causes 
a problem when asserts are on).  From vecLib.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42959 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-14 01:58:32 +00:00
Duncan Sands
7fef59f7e5 Clarify that fastcc has a problem with nested function 
trampolines, rather than with nested functions themselves.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42955 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-13 07:38:37 +00:00
Evan Cheng
106e8020bd Change unfoldMemoryOperand(). User is now responsible for passing in the 
register used by the unfolded instructions. User can also specify whether to
unfold the load, the store, or both.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42946 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-13 02:35:06 +00:00
Arnold Schwaighofer
92226dd19f Correcting the corrections. Bad bad baaad emacs! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42935 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-12 21:53:12 +00:00
Arnold Schwaighofer
48abc5cf6b Corrected many typing errors. And removed 'nest' parameter handling 
for fastcc from X86CallingConv.td.  This means that nested functions
are not supported for calling convention 'fastcc'.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42934 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-12 21:30:57 +00:00
Duncan Sands
2e4d675d93 Due to the new tail call optimization, trampolines can no 
longer be created for fastcc functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42925 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-12 19:37:31 +00:00
Evan Cheng
1c5d83c14e Update. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42922 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-12 18:22:55 +00:00
Dan Gohman
8ddde0a151 Change the names used for internal labels to use the current 
function symbol name instead of a codegen-assigned function
number.

Thanks Evan! :-)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42908 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-12 14:53:36 +00:00
Dan Gohman
f0d0089340 Mark vector ctpop, cttz, and ctlz as Expand on x86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42905 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-12 14:09:42 +00:00
Dan Gohman
a3f269f7f6 Mark vector pow, ctpop, cttz, and ctlz as Expand on PowerPC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42904 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-12 14:08:57 +00:00
Evan Cheng
f4a9c69ff6 Fold load / store into MOV32to32_ and MOV16to16_. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42895 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-12 08:38:01 +00:00
Evan Cheng
96aaa54529 Flag MOV32to32_ with EXTRACT_SUBREG. They should not be scheduled apart. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42894 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-12 07:55:53 +00:00
Dan Gohman
f96e4de403 Set ISD::FPOW to Expand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42881 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-11 23:21:31 +00:00
Dale Johannesen
83e105c600 Add missing argument to PALIGNR 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42874 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-11 20:58:37 +00:00
Arnold Schwaighofer
c85e1716f0 Added tail call optimization to the x86 back end. It can be 
enabled by passing -tailcallopt to llc.  The optimization is
performed if the following conditions are satisfied:
* caller/callee are fastcc
* elf/pic is disabled OR
  elf/pic enabled + callee is in module + callee has
  visibility protected or hidden


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42870 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-11 19:40:01 +00:00
Chris Lattner
85d0aaa291 Fix CodeGen/Generic/BasicInstrs.llx on sparc by marking divrem 
illegal.  Thanks to gabor for pointing this out!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42832 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-10 18:10:57 +00:00
Dale Johannesen
6eaeff29b8 Next PPC long double bits: ppcf128->i32 conversion. 
Surprisingly complicated.
Adds getTargetNode for 2 outputs, no inputs (missing).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42822 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-10 01:01:31 +00:00
Dan Gohman
6d60cac029 LowerIntegerDivOrRem no longer exists. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42787 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-09 15:45:13 +00:00
Dan Gohman
74f87a63b6 Fix grammar in a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42786 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-09 15:44:37 +00:00
Dan Gohman
5bf88ebab9 This is done. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42785 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-09 15:42:21 +00:00
Evan Cheng
b76143cf8f Under 64-bit mode use LEA64_32r instead of LEA64r to save a byte. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42783 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-09 07:14:53 +00:00
Bruno Cardoso Lopes
8262df3aa4 Position Independent Code (PIC) support [3] 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42780 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-09 03:15:11 +00:00
Bruno Cardoso Lopes
0a6040063f Position Independent Code (PIC) support [2] 
- Added a function to hold the stack location 
  where GP must be stored during LowerCALL
- AsmPrinter now emits directives based on
  relocation type
- PIC_ set to default relocation type (same as GCC)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42779 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-09 03:01:19 +00:00
Bruno Cardoso Lopes
e78080c4dc Position Independent Code (PIC) support [1] 
- Modified instruction format to handle pseudo instructions
- Added LoadAddr SDNode to load symbols.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42778 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-09 02:55:31 +00:00
Evan Cheng
3f41d66d75 Bug fix. X86 was emitting redundant setcc and test instructions before a conditional move. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42774 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-08 22:16:29 +00:00
Dan Gohman
525178cdbf Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to 
use ISD::{S,U}DIVREM and ISD::{S,U}MUL_HIO. Move the lowering code
associated with these operators into target-independent in LegalizeDAG.cpp
and TargetLowering.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42762 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-08 18:33:35 +00:00
Evan Cheng
d47c84c1c9 Allow x86 compare to be commutable by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42761 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-08 18:27:46 +00:00
Dan Gohman
3ce990dc05 When we start enabling SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM in 
target-indepenent lowering, don't use them on PowerPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42755 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-08 17:28:24 +00:00
Dan Gohman
8e41ed7c4e Simplify getIntPtrType, allowing it to work for arbitrary pointer sizes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42751 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-08 15:16:25 +00:00
Chris Lattner
f443ba7f97 disable this entirely: it is causing use of invalidated iterators and infinite looping. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42739 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-07 22:00:31 +00:00
Chris Lattner
eac9385f09 Fix many regressions on x86 by avoiding dereferencing the end iterator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42738 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-07 21:53:12 +00:00
Anton Korobeynikov
2508372746 Oops, I really wanted to commit this part also :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42700 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-06 16:39:43 +00:00
Anton Korobeynikov
4f1c33f7c8 Move merge code into new helper function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42699 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-06 16:17:49 +00:00
Evan Cheng
c231e8c8a5 Added DAG xforms. e.g. 
(vextract (v4f32 s2v (f32 load $addr)), 0) -> (f32 load $addr) 
(vextract (v4i32 bc (v4f32 s2v (f32 load $addr))), 0) -> (i32 load $addr)
Remove x86 specific patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42677 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-06 02:46:29 +00:00
Dale Johannesen
638ccd52b9 Next powerpc long double bits. Comparisons work, 
although not well, and shortening FP converts.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42672 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-06 01:24:11 +00:00
Evan Cheng
7ad42d9ec0 Commute x86 cmove instructions by swapping the operands and change the condition 
to its inverse.
Testing this as llcbeta


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42661 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 23:13:21 +00:00
Evan Cheng
57cce6c466 This is done. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42656 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 22:34:59 +00:00
Evan Cheng
ecf80ac68a Enable convertToThreeAddress for X86 by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42655 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 22:31:10 +00:00
Evan Cheng
b75ed322c4 INC64_32r -> LEA64_32r is better than INC64_32r -> LEA32r, but it still can 
cause performance degradation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42653 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 21:55:32 +00:00
Evan Cheng
559dc46d46 In 64-bit mode, avoid using leal with 32-bit 32-bit address size, e.g. 
leal 1(%ecx), %edi, which requires 67H prefix.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42647 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 20:34:26 +00:00
Dale Johannesen
161e897b0f First round of ppc long double. call/return and 
basic arithmetic works.
Rename RTLIB long double functions to distinguish
different flavors of long double; the lib functions
have different names, alas.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42644 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 20:04:43 +00:00
Evan Cheng
b952d1f5be Add support to convert more 64-bit instructions to 3-address instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42642 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 18:20:36 +00:00
Evan Cheng
3154cb67d1 ADC and SBB uses EFLAGS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42640 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 17:59:57 +00:00
Dan Gohman
52c0253f04 Change a few more spaces to tabs in assembly output. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42638 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 15:58:41 +00:00
Dan Gohman
4e8e831a4e Change a space to a tab in the assembly output of a .globl directive 
for consistency.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42637 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 15:54:58 +00:00
Evan Cheng
3f411c7627 Testing convertToThreeeAddress as X86 llcbeta. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42630 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 08:04:01 +00:00
Evan Cheng
75b4e46b8a Added storeRegToAddr, loadRegFromAddr, and unfoldMemoryOperand's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42624 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 01:34:55 +00:00
Evan Cheng
afa98bcf3d Not needed any more. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42623 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 01:34:14 +00:00
Evan Cheng
e203ae9971 Forgot these. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42622 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 01:33:45 +00:00
Evan Cheng
66f0f64082 - Added a few target hooks to generate load / store instructions from / to any 
address (not just from / to frameindexes).
- Added target hooks to unfold load / store instructions / SDNodes into separate
load, data processing, store instructions / SDNodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42621 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 01:32:41 +00:00
Chris Lattner
87b77b9079 add a note. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42607 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-04 15:47:27 +00:00
Dan Gohman
cb406c2597 Use empty() member functions when that's what's being tested for instead 
of comparing begin() and end().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42585 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-03 19:26:29 +00:00
Chris Lattner
fce5cfe190 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42579 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-03 17:10:03 +00:00
Chris Lattner
e1bb6ab7b0 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42573 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-03 06:10:59 +00:00
Chris Lattner
67a1af9709 Bill's example is still not enough to repro this, but it has other issues that 
seem significant as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42564 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-03 03:40:24 +00:00
Bill Wendling
7687bd0b2b Another micro-opt. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42554 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-02 21:49:31 +00:00
Bill Wendling
2bb6d459e6 Another missed optimization with LICM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42552 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-02 21:43:06 +00:00
Bill Wendling
892d392905 Small label changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42549 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-02 21:02:53 +00:00
Bill Wendling
6dbb1b59ae Now with source code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42548 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-02 21:01:16 +00:00
Bill Wendling
8d1c8ce3d8 Now with LL code! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42547 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-02 20:54:32 +00:00
Bill Wendling
6aab4910cd Another missed optimization. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42546 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-02 20:42:59 +00:00
Bill Wendling
c720279ac7 Micro-optimization -- missed LICM opportunity. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42542 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-02 19:55:05 +00:00
Dale Johannesen
9ab7fb3ba4 Rewrite sqrt and powi to use anyfloat. By popular demand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42537 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-02 17:43:59 +00:00
Evan Cheng
7f3394f379 Refactor code to add load / store folded instructions -> register only 
instructions reverse map.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42509 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-01 23:44:33 +00:00
Evan Cheng
fef922a4d5 Typo. X86comi doesn't read / write chain's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42492 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-01 18:12:48 +00:00
Dale Johannesen
3b5b4cd1a5 Add getABITypeSize, getABITypeSizeInBits 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42488 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-01 16:03:14 +00:00
Gordon Henriksen
cd8bc05102 AsmPrinters overriding getAnalysisUsage should call super. 
And not super's super, either.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42482 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-30 13:39:29 +00:00
Evan Cheng
e5f6204cd5 Enabling new condition code modeling scheme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42459 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-29 00:00:36 +00:00
Rafael Espindola
068317bfa3 Refactor the memcpy lowering for the x86 target. 
The only generated code difference is that now we call memcpy when
the size of the array is unknown. This matches GCC behavior and is
better since the run time value can be arbitrarily large.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42433 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-28 12:53:01 +00:00
Evan Cheng
fa00feb7f8 Stop inventing new words. :-) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42429 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-28 01:35:02 +00:00
Evan Cheng
8decf6bc18 Pessimisively assume ADJCALLSTACKDOWN / ADJCALLSTACKUP (which becomes sub / add) clobbers EFLAGS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42426 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-28 01:19:48 +00:00
Dan Gohman
82482944ed TargetAsmInfo::getAddressSize() was incorrect for x86-64 and 64-bit targets 
other than PPC64. Instead of fixing it, just remove it and fix all the
places that use it to use TargetData::getPointerSize() instead, as there
aren't very many. Most of the references were in DwarfWriter.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42419 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-27 23:12:31 +00:00
Evan Cheng
3f2d9ec186 Use GR64 in 64-bit mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42417 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-27 21:50:05 +00:00
Evan Cheng
1ed37fdb3b Doh. Calls clobber EFLAGS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42413 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-27 19:01:55 +00:00
Dale Johannesen
693717fbe6 Make temporaries explicit to avoid premature 
destruction of compiler-created ones.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42383 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-26 23:20:33 +00:00
Evan Cheng
42d60274ea - Move getPhysicalRegisterRegClass() from ScheduleDAG to MRegisterInfo. 
- Added ability to emit cross class register copies to the BBRU scheduler.
- More aggressive backtracking.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42375 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-26 21:36:17 +00:00
Evan Cheng
ff11026575 - Added MRegisterInfo::getCrossCopyRegClass() hook. For register classes where reg to reg copies are not possible, this returns another register class which registers in the specified register class can be copied to (and copy back from). 
- X86 copyRegToReg() now supports copying between EFLAGS and GR32 / GR64 registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42372 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-26 21:31:07 +00:00
Evan Cheng
bf4f89dc00 Some assemblers do not recognize aliases pushfd, pushfq, popfd, and popfq. Just emit them as pushf and popf. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42371 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-26 21:28:00 +00:00
Dale Johannesen
2f42901dff Enable codegen for long double abs, sin, cos 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42368 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-26 21:10:55 +00:00
Evan Cheng
8d5562be30 Typos: POPQ -> POPFQ, POPD -> POPFD. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42348 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-26 06:38:29 +00:00
Chris Lattner
1efa1696e3 move PR1160 here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42347 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-26 06:29:31 +00:00
Evan Cheng
9efce638d3 Allow copyRegToReg to emit cross register classes copies. 
Tested with "make check"!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42346 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-26 06:25:56 +00:00
Chris Lattner
61001b8bd4 move PR1264 here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42345 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-26 06:15:48 +00:00
Evan Cheng
2f245ba572 Add pushf{d|q}, popf{d|q} to push and pop EFLAGS register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42335 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-26 01:29:06 +00:00
Evan Cheng
1a35edba13 translateX86CC updates the last two operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42333 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-26 00:45:55 +00:00
Anton Korobeynikov
29be8486e3 Correctly restore stack pointer after realignment in main() on Cygwin/Mingw32 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42332 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-26 00:13:34 +00:00
Evan Cheng
fdd0837448 Missing load / store folding entries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42323 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-25 22:10:43 +00:00
Anton Korobeynikov
2fe1259d0a Partly revert invalid r41774 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42322 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-25 21:52:30 +00:00
Dan Gohman
677ccc6e8b More explicit keywords. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42316 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-25 20:27:06 +00:00
Dan Gohman
b94fc1bcb2 Fix a typo in a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42313 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-25 19:37:26 +00:00
Evan Cheng
4e4d2d7d9a New style x87 cmp instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42312 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-25 19:08:02 +00:00
Dan Gohman
a37c9f7506 When both x/y and x%y are needed (x and y both scalar integer), compute 
both results with a single div or idiv instruction. This uses new X86ISD
nodes for DIV and IDIV which are introduced during the legalize phase
so that the SelectionDAG's CSE can automatically eliminate redundant
computations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42308 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-25 18:23:27 +00:00
Dan Gohman
c3b0b5ca1d Move the setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand) and 
the check to see if the assembler supports .loc from X86TargetLowering
into the superclass TargetLowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42297 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-25 15:10:49 +00:00
Evan Cheng
0488db9b99 Added support for new condition code modeling scheme (i.e. physical register dependency). These are a bunch of instructions that are duplicated so the x86 backend can support both the old and new schemes at the same time. They will be deleted after 
all the kinks are worked out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42285 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-25 01:57:46 +00:00
Evan Cheng
a3602685b3 New temporary option -new-cc-modeling-scheme to test the new cc modeling scheme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42283 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-25 01:50:04 +00:00
Evan Cheng
d23aa5a053 Rename keyword "modify" -> "implicit". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42282 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-25 01:48:59 +00:00
Dale Johannesen
48d1e4517e When mixing SSE and x87 codegen, it's possible to 
have situations where an SSE instruction turns into
multiple blocks, with the live range of an x87
register crossing them.  To do this correctly make
sure we examine all blocks when inserting
FP_REG_KILL.  PR 1697.  (This was exposed by my
fix for PR 1681, but the same thing could happen
mixing x87 long double with SSE.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42281 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-24 22:52:39 +00:00
Dan Gohman
a5a403d766 Add support on x86 for having Legalize lower ISD::LOCATION to ISD::DEBUG_LOC 
instead of ISD::LABEL with a manual .debug_line entry when the assembler
supports .file and .loc directives.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42278 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-24 21:54:14 +00:00
Dan Gohman
72252732c8 Merge hasDotLoc and hasDotFile into hasDotLocAndDotFile since .loc and .file 
aren't really usable without each other. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42274 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-24 21:09:53 +00:00
Bruno Cardoso Lopes
b42abebe36 Added "LoadEffective" pattern to handle stack locations. 
Fixed some comments


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42271 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-24 20:15:11 +00:00
Dan Gohman
6b5766e27c Fix the syntax for the .loc directive in preparation for using it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42268 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-24 19:25:06 +00:00
Dan Gohman
5e6e93ecdc The code that used the StartLabelId label was removed, so remove the 
code that creates the label too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42265 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-24 16:44:26 +00:00
Chris Lattner
9b4baf1692 claim that "st" is from the 80-bit register file. This causes x87-using inline 
asm to die with:

ScheduleDAG.cpp:269: failed assertion `false && "Couldn't find the register class"'

instead of:
failed assertion `RegMap->getRegClass(VReg) == RC && "Register class of operand and regclass of use don't agree!"'

yay.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42259 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-24 05:27:37 +00:00
Dale Johannesen
f1fc3a8fa6 Fix PR 1681. When X86 target uses +sse -sse2, 
keep f32 in SSE registers and f64 in x87.  This
is effectively a new codegen mode.
Change addLegalFPImmediate to permit float and
double variants to do different things.
Adjust callers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42246 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-23 14:52:20 +00:00
Chris Lattner
96b207c380 Fix PR1679, by printing GEP indices as signed values instead of unsigned. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42239 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-22 20:16:48 +00:00
Rafael Espindola
a37ac9ff53 Don't add a default STACK_ALIGN (use the generic ABI alignment) 
Implement calls to functions with byval arguments on X86


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42192 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-21 15:50:22 +00:00
Rafael Espindola
1242d28093 small cleanup: use LowerMemArgument in LowerFastCCArguments also 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42189 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-21 14:55:38 +00:00
Evan Cheng
76a4023096 Honor user-defined section specification of a global, ignores whether its initializer is null. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42182 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-21 00:41:19 +00:00
Devang Patel
0f0daea654 Do not override user specified section. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42179 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-20 23:07:37 +00:00
Dan Gohman
a4ddacf60b Fix several more entries in the x86 reload/remat folding tables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42162 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-20 14:17:21 +00:00
Dale Johannesen
41de436ca3 another long double buglet 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42159 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-20 01:27:54 +00:00
Evan Cheng
17207ddf38 Enable if-conversion for ARM by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42156 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-20 00:48:22 +00:00
Dale Johannesen
73328d14ac More long double fixes. x86_64 should build now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42155 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-19 23:55:34 +00:00
Evan Cheng
e71bff7405 Avoid referencing deleted instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42153 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-19 21:48:07 +00:00
Evan Cheng
fab7eff0fa PSHUFDmi, etc. are actually folding a load, not a store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42147 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-19 19:02:47 +00:00
Evan Cheng
dcfa73fe3c Set CCR (EFLAGS) copy cost to -1, i.e. extremely expensive to copy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42124 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-19 01:36:39 +00:00
Evan Cheng
a3ca3149f2 Add CopyCost to TargetRegisterClass. This specifies the cost of copying a value 
between two registers in the specific class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42123 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-19 01:35:01 +00:00
Dan Gohman
869b2b2c23 Move the entries for 64-bit CMP, IMUL, and a few others into the correct 
tables so that they are eligible for reload/remat folding. And add
entries for JMP and CALL.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42094 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-18 14:59:14 +00:00
Dale Johannesen
ca8035e356 Remove RSTRegClass case from loadRegFromStackSlot 
and storeRegToStackSlot.  Evan and I concluded this
should never be needed and it appears to be true.
(It if is needed, adjustment would be needed for
long double to work.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42049 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-17 20:15:38 +00:00
Chris Lattner
76c1b97e40 Merge DenseMapKeyInfo & DenseMapValueInfo into DenseMapInfo 
Add a new DenseMapInfo::isEqual method to allow clients to redefine
the equality predicate used when probing the hash table.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42042 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-17 18:34:04 +00:00
Evan Cheng
7d6ff3a25d X86ISD::TEST is dead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42037 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-17 17:42:53 +00:00
Dan Gohman
a0a7c1de9c Add 64-bit jmp instructions to the list of instructions that 
can terminate a block with no fall-through.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42029 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-17 15:19:08 +00:00
Dan Gohman
959062475d Use xorl instead of xorq to enter a zero into a 64-bit register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42027 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-17 14:55:08 +00:00
Dan Gohman
5f6913cecd Emit integer x<1 as x<=0, as comparisons with zero (now includeing 
64-bit) can use test instead of cmp with an immediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42026 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-17 14:49:27 +00:00
Dan Gohman
11f7bfbb83 Use "test reg,reg" in place of "cmp reg,0" for 64-bit operands. This was 
previously only done for 32-bit and smaller operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42024 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-17 14:35:24 +00:00
Dale Johannesen
53f0bc1b25 Implement x86 long double (uses host long double, 
so only works on x86 target).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42019 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-17 00:38:27 +00:00
Bill Wendling
bd626b885f Follow-up to patch r41999. Make the conditional that emits the personality stub 
match the conditional that turns on exception handling emittion in the asm
printer.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42008 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-16 19:21:08 +00:00
Bill Wendling
656ab16c56 Only emit the personality function as a global value if the backend actually 
supports it. This solves this error on the Darwin x86-64 platform:

$ cat testcase.ii
struct A {
  A();
};

A *bork() {
  return new A;
}
$ llvm-g++ -arch x86_64 -c testcase.ii
/var/tmp//cc3U8fd8.s:52:unknown section type: non_lazy_symbol_pointers
/var/tmp//cc3U8fd8.s:52:Rest of line ignored. 1st junk character valued 76 (L).
/var/tmp//cc3U8fd8.s:53:Unknown pseudo-op: .indirect_symbol
/var/tmp//cc3U8fd8.s:53:Rest of line ignored. 1st junk character valued 95 (_).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41999 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-16 10:36:17 +00:00
Chris Lattner
5bda9e49ec Fix PR1666, SPASS with the CBE and 254.gap with the CBE. 
GCC optimizes away things like ptr < NULL  to false.  To "fix" this,
have the CBE emit casts of pointers to intptr_t when doing relational
pointer comparisons.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41983 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-15 06:51:03 +00:00
Dan Gohman
e47f1f9633 Add patterns for SHLD64* and SHRD64*. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41975 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-14 23:17:45 +00:00
Dale Johannesen
9e3d3abd93 Remove the assumption that FP's are either float or 
double from some of the many places in the optimizers
it appears, and do something reasonable with x86
long double.
Make APInt::dump() public, remove newline, use it to
dump ConstantSDNode's.
Allow APFloats in FoldingSet.
Expand X86 backend handling of long doubles (conversions
to/from int, mostly).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41967 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-14 22:26:36 +00:00
Evan Cheng
24f2ea3971 Add implicit def of EFLAGS on those instructions that may modify flags. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41962 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-14 21:48:26 +00:00
Dan Gohman
92dfe2001e Remove isReg, isImm, and isMBB, and change all their users to use 
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41958 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-14 20:33:02 +00:00
Rafael Espindola
7effac5475 Add support for functions with byval arguments on x86 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41953 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-14 15:48:13 +00:00
Evan Cheng
fdd9f006bc Fix comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41947 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-14 01:57:02 +00:00
Evan Cheng
85dbe1a1d2 Initial support for multi-result patterns: 
1.
[(set GR32:$dst, (add GR32:$src1, GR32:$src2)),
 (modify EFLAGS)]
This indicates the source pattern expects the instruction would produce 2 values. The first is the result of the addition. The second is an implicit definition in register EFLAGS.
2.
def : Pat<(parallel (addc GR32:$src1, GR32:$src2), (modify EFLAGS)), ()>
Similar to #1 except this is used for def : Pat patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41897 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-12 23:30:14 +00:00
Dale Johannesen
9d5f456077 Revise previous patch per review comments. 
Next round of x87 long double stuff.
Getting close now, basically works.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41875 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-12 03:30:33 +00:00
Bill Wendling
fe4afb17d3 Enable indirect encoding for the personality function 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41873 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-11 23:55:40 +00:00
Evan Cheng
071a279e94 Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41863 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-11 19:55:27 +00:00
Evan Cheng
3054dde813 Added status flags register: EFLAGS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41862 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-11 19:53:28 +00:00
Dale Johannesen
3f6eb7419d Add APInt interfaces to APFloat (allows directly 
access to bits).  Use them in place of float and
double interfaces where appropriate.
First bits of x86 long double constants handling 
(untested, probably does not work).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41858 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-11 18:32:33 +00:00
Bill Wendling
ef4a661725 Add a bool to indicate if we should set the "indirect encoding" bit in the Dwarf 
information for EH.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41852 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-11 17:20:55 +00:00
Duncan Sands
f7331b3dd7 Fold the adjust_trampoline intrinsic into 
init_trampoline.  There is now only one
trampoline intrinsic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41841 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-11 14:10:23 +00:00
Duncan Sands
49c23935e0 My compiler warns about the semicolon. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41840 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-11 12:30:25 +00:00
Bill Wendling
d60da495cd The personality function on Darwin needs a global stub. We then refer to 
that global stub instead of doing the ".set" thingy we were doing before.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41838 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-11 08:27:17 +00:00
Evan Cheng
be36798bfe 80 col. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41812 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-10 22:22:23 +00:00
Evan Cheng
f618e7c2a1 New entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41810 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-10 22:16:37 +00:00
Chris Lattner
bf8ae84a21 Add some notes about better flag handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41808 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-10 21:43:18 +00:00
Evan Cheng
b0869ed44d It's not safe to rematerialize MOV32r0 etc. by simply cloning the original 
instruction. These are implemented with xor which will modify the conditional
code. They should be rematerialized as move instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41802 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-10 20:48:53 +00:00
Evan Cheng
ef61ed3507 TableGen no longer emit CopyFromReg nodes for implicit results in physical 
registers. The scheduler is now responsible for emitting them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41781 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-07 23:59:02 +00:00
Bill Wendling
82d25148a7 Add missing index versions of instructions to the map. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41776 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-07 22:01:02 +00:00
Dan Gohman
1ab79897e2 Avoid storing and reloading zeros and other constants from stack slots 
by flagging the associated instructions as being trivially rematerializable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41775 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-07 21:32:51 +00:00
Dale Johannesen
cdd509aecd Apply feedback from previous patch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41774 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-07 21:07:57 +00:00
Rafael Espindola
588af2fb99 Add support for having different alignment for objects on call frames. 
The x86-64 ABI states that objects passed on the stack have
8 byte alignment. Implement that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41768 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-07 14:52:14 +00:00
Owen Anderson
718cb665ca Add lengthof and endof templates that hide a lot of sizeof computations. 
Patch by Sterling Stein!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41758 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-07 04:06:50 +00:00
Dale Johannesen
43421b3dd7 Next round of APFloat changes. 
Use APFloat in UpgradeParser and AsmParser.
Change all references to ConstantFP to use the
APFloat interface rather than double.  Remove
the ConstantFP double interfaces.
Use APFloat functions for constant folding arithmetic
and comparisons.
(There are still way too many places APFloat is
just a wrapper around host float/double, but we're
getting there.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41747 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-06 18:13:44 +00:00
Evan Cheng
61d9c861fd Fix a bug in X86InstrInfo::convertToThreeAddress that caused it to codegen: 
leal    (,%rcx,8), %rcx
It should be
leal    (,%rcx,8), %ecx


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41735 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-06 00:14:41 +00:00
Bill Wendling
399ea50dc3 LVXL and STVXL are also a load and store resp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41733 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-05 23:47:12 +00:00
Bill Wendling
c3536b8ecb Add the 64-bit versions of the DS* Altivec instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41717 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-05 04:05:20 +00:00
Evan Cheng
67c906dce7 Fix for PR1613: added 64-bit rotate left PPC instructions and patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41711 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-04 20:20:29 +00:00
Evan Cheng
29d62bebd9 Mac OS X X86-64 ABI is same as the standard. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41700 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-04 16:44:41 +00:00
Anton Korobeynikov
3825262399 Reapply r41578 with proper fix 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41680 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-03 00:36:06 +00:00
Dale Johannesen
ee8476847d Revise per review of previous patch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41645 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-31 17:03:33 +00:00
Rafael Espindola
1b5dcc34b7 Initial support for calling functions with byval arguments on x86-64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41643 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-31 15:06:30 +00:00
Rafael Espindola
7240ae3cac Align i64 and f64 at 8 byte on x86-64. 
This is mandated table 3.1 at
http://www.x86-64.org/documentation/abi.pdf



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41642 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-31 12:23:58 +00:00
Dale Johannesen
eaf089430e Enhance APFloat to retain bits of NaNs (fixes oggenc). 
Use APFloat interfaces for more references, mostly
of ConstantFPSDNode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41632 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-31 04:03:46 +00:00
Raul Herbster
8c132633c8 Instruction formats added used to generate multiply instructions of V5TE. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41629 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-30 23:34:14 +00:00
Raul Herbster
b94e60872e Unused relocation type reloc_arm_absolute removed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41628 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-30 23:31:35 +00:00
Raul Herbster
9c1a3827ce Comments added. It now generates V5TE multiply instructions. However, it is still necessary to model PUWLSH bits more clearly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41627 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-30 23:29:26 +00:00
Raul Herbster
37fb5b154c ARM instruction table was modified by adding information to generate multiply instruction of V5TE. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41626 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-30 23:25:47 +00:00
Raul Herbster
d05c04c169 JITInfo now resolves function addrs and also relocations. It always emits a stub. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41625 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-30 23:21:27 +00:00
Evan Cheng
f4c3a59dba Added support to fold X86 load / store instructions. This allow rematerialized loads to be folded into their uses. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41599 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-30 05:54:07 +00:00
Evan Cheng
35b35c5c32 Add a variant of foldMemoryOperand to fold any load / store, not just load / store from / to stack slots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41597 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-30 05:52:20 +00:00
Evan Cheng
2f39426ec9 Mark load instructions with isLoad = 1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41595 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-30 05:49:43 +00:00
Bill Wendling
b8a80f03bf Use i64 on a PPC64 machine 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41590 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-30 00:59:19 +00:00
Dale Johannesen
f04afdbb48 Change LegalFPImmediates to use APFloat. 
Add APFloat interfaces to ConstantFP, SelectionDAG.
Fix integer bit in double->APFloat conversion.
Convert LegalizeDAG to use APFloat interface in
ConstantFPSDNode uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41587 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-30 00:23:21 +00:00
Duncan Sands
ee46574931 Move getX86RegNum into X86RegisterInfo and use it 
in the trampoline lowering.  Lookup the jump and
mov opcodes for the trampoline rather than hard
coding them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41577 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-29 19:01:20 +00:00
Bruno Cardoso Lopes
51195af45f Added method to get Mips register numbers 
Changed the stack frame layout, StackGrowsUp fits better to Mips strange stack.
Stack offset calculation bug fixed!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41529 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-28 05:13:42 +00:00
Bruno Cardoso Lopes
a2b1bb5296 Changed stack allocation On LowerFORMAL_ARGUMENTS. 
Added comments about new stack allocation.
Expand SelectCC for i32 results


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41527 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-28 05:08:16 +00:00
Bruno Cardoso Lopes
dc0c04c0ed Mask directive completed with CalleeSave info 
Comments for Mips directives added.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41526 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-28 05:06:17 +00:00
Bruno Cardoso Lopes
2d4575ea5a Added methods to record SPOffsets from LowerFORMAL_ARGUMENTS 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41525 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-28 05:04:41 +00:00
Rafael Espindola
44c8265cf8 Add a comment about using libc memset/memcpy or generating inline code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41502 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-27 17:48:26 +00:00
Rafael Espindola
6b83b5d1ae call libc memcpy/memset if array size is bigger then threshold. 
Coping 100MB array (after a warmup) shows that glibc 2.6.1 implementation on
x86-64 (core 2) is 30% faster (from 0.270917s to 0.188079s)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41479 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-27 10:18:20 +00:00
Chris Lattner
48884cd80b rename isOperandValidForConstraint to LowerAsmOperandForConstraint, 
changing the interface to allow for future changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41384 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-25 00:47:38 +00:00
Chris Lattner
90e167a908 Disable EH generation until PPC works 100%. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41360 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-24 16:00:15 +00:00
Chris Lattner
b23f4c5f44 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41359 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-24 15:17:59 +00:00
Chris Lattner
9e43d6316f add some notes on really poor codegen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41319 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-23 15:22:07 +00:00
Chris Lattner
aabd0359a3 new example 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41318 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-23 15:16:03 +00:00
Bill Wendling
adbda021e7 Add the PCSymbol for Darwin x86 platforms. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41284 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-22 18:44:05 +00:00
Bruno Cardoso Lopes
84f47c52fd InlineAsm asm support for integer registers added 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41225 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-21 16:09:25 +00:00
Bruno Cardoso Lopes
edeede2bb5 Instruction Itinerary attribution fixed 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41224 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-21 16:06:45 +00:00
Anton Korobeynikov
095546ce34 Use only 1 knob to enable exceptions on Darwin :). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41208 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-21 00:31:30 +00:00
Rafael Espindola
21485be444 Partial implementation of calling functions with byval arguments: 
*) The needed information is propagated to the DAG
 *) The X86-64 backend detects it and aborts


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41179 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-20 15:18:24 +00:00
Chris Lattner
cf8ba696b3 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41178 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-20 02:14:33 +00:00
Bruno Cardoso Lopes
9710536b44 MipsHi now has ouput flag 
MipsAdd SDNode created to add support to an Add opcode which supports input flag
Added an instruction itinerary to all instruction classes
Added branches with zero cond codes
Now call clobbers all non-callee saved registers
Call w/ register support added
Added DelaySlot to branch and load instructions
Added patterns to handle all setcc, brcond/setcc and MipsAdd instructions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41161 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 02:37:46 +00:00
Bruno Cardoso Lopes
055c7eb4a4 Fixed stack frame addressing bug 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41160 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 02:19:09 +00:00
Bruno Cardoso Lopes
6d32ca0762 support for Schedule included on Mips.td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41159 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 02:18:07 +00:00
Bruno Cardoso Lopes
7ff6fa2503 Removed LowerRETURADDR, fixed small bug into LowerRET, LowerGlobalAddress 
fixed to generate instructions (add, lui) glued!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41158 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 02:16:30 +00:00
Bruno Cardoso Lopes
250a1714be Couple of small changes. Delay Slot handle header declared. 
Newline added after macros at function init on generated asm!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41157 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 02:05:24 +00:00
Bruno Cardoso Lopes
e88c36819e Added InstrItinClass support for instruction formats 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41156 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 02:01:28 +00:00
Bruno Cardoso Lopes
0b2cd89a39 Branch Analysis and InsertNoop inserted into header files 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41155 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 01:59:45 +00:00
Bruno Cardoso Lopes
aff42dcf5d createMipsDelaySlotFillerPass added to mips codegen runtime 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41154 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 01:58:15 +00:00
Bruno Cardoso Lopes
35d2a47994 Added Branch Analysis support 
Added InsertNoop support


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41153 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 01:56:48 +00:00
Bruno Cardoso Lopes
de6a9411db LowerRETURNADDR removed since it was wrong and does not have utility yet! 
MipsAdd opcode added


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41152 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 01:54:09 +00:00
Bruno Cardoso Lopes
13d1b7bbb3 InstrItineraryData support on added. 
Added Mips3 ISA feature (needed when supporting R4000 machines)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41151 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 01:52:27 +00:00
Bruno Cardoso Lopes
9684a697d5 A Pass to insert Nops on intructions with DelaySlot 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41150 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 01:50:47 +00:00
Bruno Cardoso Lopes
a5793899e3 Mips generic fallback instruction schedule support! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41149 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 01:46:44 +00:00
Anton Korobeynikov
a2780e11ef Move ReturnAddrIndex variable to X86MachineFunctionInfo structure. This fixed 
hard to catch bugs with retaddr lowering


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41104 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-15 17:12:32 +00:00
Chris Lattner
d42b8be3da add a note. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41103 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-15 16:58:38 +00:00
Evan Cheng
12914380ed Fix a typo pointd out by Maarten ter Huurne. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41059 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-13 23:27:11 +00:00
Dan Gohman
badb2d23d1 When x86 addresses matching exceeds its recursion limit, check to 
see if the base register is already occupied before assuming it can be
used. This fixes bogus code generation in the accompanying testcase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41049 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-13 20:03:06 +00:00
Chris Lattner
a45d9a15ba Fix PR1607 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41048 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-13 18:42:37 +00:00
Chris Lattner
ace2e8ad0c expand a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41021 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-11 18:19:07 +00:00
Chris Lattner
384f4a94f8 With evan's explicit flag representation, hopefully we will finally be 
able to 3-addressify away stuff like this:

        movl    %ecx, %eax
        decl    %eax



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41020 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-11 18:16:46 +00:00
Bill Wendling
01284b4d55 64-bit SSSE3 ops that use MMX registers don't require 16-byte alignment. 
Make a 'memop' pattern just for them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41017 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-11 09:52:53 +00:00
Christopher Lamb
a1eb155e52 Use subregs to improve any_extend code generation when feasible. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41013 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-10 22:22:41 +00:00
Christopher Lamb
c59e52108b Increase efficiency of sign_extend_inreg by using subregisters for truncation. As the README suggests sign_extend_subreg is selected to (sext(trunc)). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41010 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-10 21:48:46 +00:00
Christopher Lamb
6f41435879 Edit README in light of previous LEA16 commit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41009 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-10 21:29:05 +00:00
Christopher Lamb
b81337117c Add 2-addr to 3-addr promotion code that allows 32-bit LEA to be used via subregisters when 16-bit LEA is disabled. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41007 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-10 21:18:25 +00:00
Rafael Espindola
594d37e21a propagate struct size and alignment of byval arguments to the DAG 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40986 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-10 14:44:42 +00:00
Bill Wendling
ae9671b838 For kicks, I though it would be fun to use the correct opcode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40985 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-10 09:00:17 +00:00
Bill Wendling
76d708b76f Adding SSSE3 intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40982 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-10 06:22:27 +00:00