llvm-6502/test/CodeGen/ARM
Evan Cheng 3144687df7 - Allow target to specify when is register pressure "too high". In most cases,
it's too late to start backing off aggressive latency scheduling when most
  of the registers are in use so the threshold should be a bit tighter.
- Correctly handle live out's and extract_subreg etc.
- Enable register pressure aware scheduling by default for hybrid scheduler.
  For ARM, this is almost always a win on # of instructions. It's runtime
  neutral for most of the tests. But for some kernels with high register
  pressure it can be a huge win. e.g. 464.h264ref reduced number of spills by
  54 and sped up by 20%.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109279 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 22:39:59 +00:00
..
2006-11-10-CycleInDAG.ll
2007-01-19-InfiniteLoop.ll
2007-03-07-CombinerCrash.ll
2007-03-13-InstrSched.ll
2007-03-21-JoinIntervalsCrash.ll
2007-03-26-RegScavengerAssert.ll
2007-03-27-RegScavengerAssert.ll
2007-03-30-RegScavengerAssert.ll
2007-04-02-RegScavengerAssert.ll
2007-04-03-PEIBug.ll
2007-04-03-UndefinedSymbol.ll
2007-04-30-CombinerCrash.ll
2007-05-03-BadPostIndexedLd.ll
2007-05-07-jumptoentry.ll
2007-05-07-tailmerge-1.ll Remove the -enable-sjlj-eh option, which doesn't do anything. 2010-05-02 15:36:26 +00:00
2007-05-09-tailmerge-2.ll Remove the -enable-sjlj-eh option, which doesn't do anything. 2010-05-02 15:36:26 +00:00
2007-05-14-InlineAsmCstCrash.ll
2007-05-14-RegScavengerAssert.ll
2007-05-22-tailmerge-3.ll Remove the -enable-sjlj-eh option, which doesn't do anything. 2010-05-02 15:36:26 +00:00
2007-05-23-BadPreIndexedStore.ll
2007-05-31-RegScavengerInfiniteLoop.ll
2007-08-15-ReuseBug.ll
2008-02-04-LocalRegAllocBug.ll Remove the local register allocator. 2010-06-15 21:58:33 +00:00
2008-02-29-RegAllocLocal.ll Remove the local register allocator. 2010-06-15 21:58:33 +00:00
2008-03-05-SxtInRegBug.ll
2008-03-07-RegScavengerAssert.ll
2008-04-04-ScavengerAssert.ll
2008-04-10-ScavengerAssert.ll
2008-04-11-PHIofImpDef.ll
2008-05-19-LiveIntervalsBug.ll
2008-05-19-ScavengerAssert.ll
2008-07-17-Fdiv.ll
2008-07-24-CodeGenPrepCrash.ll
2008-08-07-AsmPrintBug.ll
2008-09-14-CoalescerBug.ll
2008-09-17-CoalescerBug.ll
2008-11-18-ScavengerAssert.ll
2009-02-16-SpillerBug.ll
2009-02-22-SoftenFloatVaArg.ll
2009-02-27-SpillerBug.ll
2009-03-07-SpillerBug.ll
2009-03-09-AddrModeBug.ll
2009-04-06-AsmModifier.ll
2009-04-08-AggregateAddr.ll
2009-04-08-FloatUndef.ll
2009-04-08-FREM.ll
2009-04-09-RegScavengerAsm.ll
2009-05-05-DAGCombineBug.ll Correct some bogus target triples. 2010-05-07 17:03:48 +00:00
2009-05-07-RegAllocLocal.ll Remove the local register allocator. 2010-06-15 21:58:33 +00:00
2009-05-11-CodePlacementCrash.ll
2009-05-18-InlineAsmMem.ll
2009-06-02-ISelCrash.ll
2009-06-04-MissingLiveIn.ll
2009-06-12-RegScavengerAssert.ll
2009-06-15-RegScavengerAssert.ll
2009-06-19-RegScavengerAssert.ll
2009-06-22-CoalescerBug.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-06-30-RegScavengerAssert2.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-06-30-RegScavengerAssert3.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-06-30-RegScavengerAssert4.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-06-30-RegScavengerAssert5.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-06-30-RegScavengerAssert.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-07-01-CommuteBug.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-07-09-asm-p-constraint.ll
2009-07-18-RewriterBug.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-07-22-ScavengerAssert.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-07-22-SchedulerAssert.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-07-29-VFP3Registers.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-08-02-RegScavengerAssert-Neon.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-08-04-RegScavengerAssert-2.ll Set the mtriple in some tests so that they use AAPCS. 2010-06-15 20:42:00 +00:00
2009-08-04-RegScavengerAssert.ll Set the mtriple in some tests so that they use AAPCS. 2010-06-15 20:42:00 +00:00
2009-08-15-RegScavenger-EarlyClobber.ll Set the mtriple in some tests so that they use AAPCS. 2010-06-15 20:42:00 +00:00
2009-08-15-RegScavengerAssert.ll Set the mtriple in some tests so that they use AAPCS. 2010-06-15 20:42:00 +00:00
2009-08-21-PostRAKill2.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-08-21-PostRAKill3.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-08-21-PostRAKill4.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-08-21-PostRAKill.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-08-23-linkerprivate.ll Implement the "linker_private_weak" linkage type. This will be used for 2010-07-01 21:55:59 +00:00
2009-08-26-ScalarToVector.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-08-27-ScalarToVector.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-08-29-ExtractEltf32.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-08-29-TooLongSplat.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-08-31-LSDA-Name.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-08-31-TwoRegShuffle.ll
2009-09-01-PostRAProlog.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-09-09-AllOnes.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-09-09-fpcmp-ole.ll
2009-09-10-postdec.ll
2009-09-13-InvalidSubreg.ll
2009-09-13-InvalidSuperReg.ll
2009-09-20-LiveIntervalsBug.ll
2009-09-21-LiveVariablesBug.ll
2009-09-22-LiveVariablesBug.ll
2009-09-23-LiveVariablesBug.ll
2009-09-24-spill-align.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2009-09-27-CoalescerBug.ll
2009-09-28-LdStOptiBug.ll Remove the arm_aapcscc marker from the tests. It is the default 2010-06-15 19:04:29 +00:00
2009-10-02-NEONSubregsBug.ll
2009-10-21-InvalidFNeg.ll
2009-10-27-double-align.ll Remove the arm_aapcscc marker from the tests. It is the default 2010-06-15 19:04:29 +00:00
2009-10-30.ll Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm 2010-03-17 17:52:21 +00:00
2009-11-01-NeonMoves.ll Generalize the pre-coalescing of extract_subregs feeding reg_sequences, 2010-06-15 05:56:31 +00:00
2009-11-02-NegativeLane.ll Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elements 2010-05-21 21:05:32 +00:00
2009-11-07-SubRegAsmPrinting.ll move fconst[sd] to UAL. <rdar://7414913> 2009-11-23 21:08:25 +00:00
2009-11-13-CoalescerCrash.ll
2009-11-13-ScavengerAssert2.ll Fix PR5412: Fix an inverted check and another missing sub-register check. 2009-11-14 02:09:09 +00:00
2009-11-13-ScavengerAssert.ll
2009-11-13-VRRewriterCrash.ll Add radar number. 2009-11-14 02:11:32 +00:00
2009-11-30-LiveVariablesBug.ll Fix PR5614: parts of a physical register def may be killed the rest. 2009-12-01 00:44:45 +00:00
2009-12-02-vtrn-undef.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2010-03-04-eabi-fp-spill.ll pr6478: The frame pointer spill frame index is only defined when there is a 2010-03-04 21:42:36 +00:00
2010-03-04-stm-undef-addr.ll pr6480: Don't try producing ld/st-multiple instructions when the address is 2010-03-04 21:04:38 +00:00
2010-03-18-ldm-rtrn.ll pr6652: Use LDM to restore PC to the return address on ARMv4. 2010-03-20 22:20:40 +00:00
2010-04-07-DbgValueOtherTargets.ll Split big test into multiple directories to cater to 2010-04-07 20:43:35 +00:00
2010-04-09-NeonSelect.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2010-04-13-v2f64SplitArg.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2010-04-14-SplitVector.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2010-04-15-ScavengerDebugValue.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2010-05-14-IllegalType.ll Allow TargetLowering::getRegClassFor() to be called on illegal types. Also 2010-05-15 02:18:07 +00:00
2010-05-17-DAGCombineAssert.ll FIX PR7158. SimplifyVBinOp was asserting when it fails to constant fold (op (build_vector), (build_vector)). 2010-05-18 00:03:40 +00:00
2010-05-17-FastAllocCrash.ll Avoid allocating the same physreg to multiple virtregs in one instruction. 2010-05-17 17:18:59 +00:00
2010-05-18-LocalAllocCrash.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2010-05-18-PostIndexBug.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2010-05-19-Shuffles.ll Handle Neon v2f64 and v2i64 vector shuffles as register copies. 2010-05-20 18:39:53 +00:00
2010-05-20-NEONSpillCrash.ll Add a -regalloc=default option that chooses a register allocator based on the -O 2010-05-27 23:57:25 +00:00
2010-05-21-BuildVector.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2010-06-11-vmovdrr-bitcast.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
2010-06-21-LdStMultipleBug.ll Fix PR7421: bug in kill transferring logic. It was ignoring loads / stores which have already been processed. 2010-06-21 21:21:14 +00:00
2010-06-21-nondarwin-tc.ll Add missing FileCheck call. 2010-06-21 18:46:08 +00:00
2010-06-25-Thumb2ITInvalidIterator.ll Thumb2ITBlockPass: Fix a possible dereference of an invalid iterator. This was 2010-06-25 23:14:54 +00:00
2010-06-28-DAGCombineUndef.ll Unlike other targets, ARM now uses BUILD_VECTORs post-legalization so they 2010-06-28 23:40:25 +00:00
2010-06-29-PartialRedefFastAlloc.ll Fix test to be less sensitive of regalloc accidents 2010-07-09 01:32:11 +00:00
2010-06-29-SubregImpDefs.ll Fix a register scavenger crash when dealing with undefined subregs. 2010-06-29 18:42:49 +00:00
addrmode.ll
aliases.ll emit jump table an alias ".set" directives through MCStreamer as 2010-01-26 21:53:08 +00:00
align.ll Emit .comm alignment in bytes but .align in powers of 2 for ARM ELF. 2010-01-26 20:21:43 +00:00
alloca.ll In the presence of variable sized objects, allocate an emergency spill slot. 2010-07-09 20:27:06 +00:00
argaddr.ll
arguments2.ll
arguments3.ll
arguments4.ll
arguments5.ll
arguments6.ll
arguments7.ll Fix declarations in a few more tests. 2010-04-17 21:29:25 +00:00
arguments8.ll Fix declarations in a few more tests. 2010-04-17 21:29:25 +00:00
arguments_f64_backfill.ll
arguments-nosplit-double.ll
arguments-nosplit-i64.ll
arguments.ll Fix calling convention on ARM if vfp2+ is enabled. 2010-07-21 11:38:30 +00:00
arm-asm.ll
arm-frameaddr.ll Remove the arm_aapcscc marker from the tests. It is the default 2010-06-15 19:04:29 +00:00
arm-negative-stride.ll Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm 2010-03-17 17:52:21 +00:00
arm-returnaddr.ll Thumb1 functions using @llvm.returnaddress were not saving the incoming LR. 2010-06-22 22:04:24 +00:00
armv4.ll Remove the arm_aapcscc marker from the tests. It is the default 2010-06-15 19:04:29 +00:00
bfc.ll
bfi.ll Add combiner patterns to more effectively utilize the BFI (bitfield insert) 2010-07-17 03:30:54 +00:00
bfx.ll Update ARM DAGtoDAG for matching UBFX instruction for unsigned bitfield 2010-04-22 23:24:18 +00:00
bic.ll Forgot to alter RUN line when converting to FileCheck. 2009-11-22 13:09:48 +00:00
bits.ll
bx_fold.ll
call_nolink.ll Eliminate more uses of llvm-as and llvm-dis. 2009-09-09 00:09:15 +00:00
call-tc.ll Changes to ARM tail calls, mostly cosmetic. 2010-07-08 01:18:23 +00:00
call.ll Remove a tail call, and move some CHECKs to the 2010-06-04 01:01:04 +00:00
carry.ll
clz.ll
compare-call.ll
constants.ll
crash-O0.ll When using ADDri to get the address of a stack object, 255 is a conservative 2010-06-18 20:59:25 +00:00
cse-libcalls.ll
ctors_dtors.ll
ctz.ll Test case for r93758. 2010-01-19 00:35:20 +00:00
dg.exp
div.ll fix copy/paste oops. 2010-05-05 21:07:46 +00:00
dyn-stackalloc.ll
extloadi1.ll
fabss.ll Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float). 2010-05-21 00:43:17 +00:00
fadds.ll Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float). 2010-05-21 00:43:17 +00:00
fast-isel.ll Baby steps towards ARM fast-isel. 2010-07-21 22:26:11 +00:00
fcopysign.ll
fdivs.ll Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float). 2010-05-21 00:43:17 +00:00
fixunsdfdi.ll
flag-crash.ll It's possible that a flag is added to the SDNode that points back to the 2010-06-24 22:00:37 +00:00
fmacs.ll Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float). 2010-05-21 00:43:17 +00:00
fmdrr-fmrrd.ll
fmscs.ll Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float). 2010-05-21 00:43:17 +00:00
fmuls.ll Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float). 2010-05-21 00:43:17 +00:00
fnegs.ll switch the flag for using NEON for SP floating point to a subtarget 'feature'. 2010-03-25 23:47:34 +00:00
fnmacs.ll switch the flag for using NEON for SP floating point to a subtarget 'feature'. 2010-03-25 23:47:34 +00:00
fnmscs.ll Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float). 2010-05-21 00:43:17 +00:00
fnmul.ll
fnmuls.ll
formal.ll
fp16.ll Fix typo 2010-03-14 18:42:52 +00:00
fp_convert.ll switch the flag for using NEON for SP floating point to a subtarget 'feature'. 2010-03-25 23:47:34 +00:00
fp.ll
fparith.ll
fpcmp_ueq.ll
fpcmp-opt.ll Split -enable-finite-only-fp-math to two options: 2010-07-15 22:07:12 +00:00
fpcmp.ll
fpconsts.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
fpconv.ll
fpmem.ll
fpow.ll
fpowi.ll Make this more likely to generate a libcall. 2010-01-01 03:26:51 +00:00
fptoint.ll Fix for bad FileCheck converts in revision 89584. 2009-11-22 12:50:05 +00:00
fsubs.ll switch the flag for using NEON for SP floating point to a subtarget 'feature'. 2010-03-25 23:47:34 +00:00
globals.ll Start function numbering at 0. 2010-04-17 16:29:15 +00:00
hardfloat_neon.ll
hello.ll Revert 89562. We're being sneakier than I was giving us credit for, and this 2009-11-21 23:34:09 +00:00
hidden-vis-2.ll
hidden-vis-3.ll Start function numbering at 0. 2010-04-17 16:29:15 +00:00
hidden-vis.ll
iabs.ll convert to filecheck. 2010-02-08 23:47:34 +00:00
ifcvt1.ll
ifcvt2.ll Allow ARM if-converter to be run after post allocation scheduling. 2010-06-18 23:09:54 +00:00
ifcvt3.ll
ifcvt4.ll
ifcvt5.ll Fix a bug which prevented tail merging of return instructions in 2010-05-03 14:35:47 +00:00
ifcvt6.ll Reinstate correct test, remove the real invalidated test. 2010-06-23 18:56:06 +00:00
ifcvt7.ll Stop using the old pre-UAL syntax for LDM/STM instruction suffixes. 2010-03-16 16:19:07 +00:00
ifcvt8.ll Stop using the old pre-UAL syntax for LDM/STM instruction suffixes. 2010-03-16 16:19:07 +00:00
ifcvt9.ll
illegal-vector-bitcast.ll
imm.ll
indirectbr.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
inlineasm2.ll
inlineasm3.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
inlineasm-imm-arm.ll
inlineasm.ll llvm can't correctly support 'H', 'Q' and 'R' modifiers. Just mark it an error. 2010-05-27 22:08:38 +00:00
insn-sched1.ll Remove more tail calls. 2010-06-04 01:01:24 +00:00
ispositive.ll
large-stack.ll
ldm.ll Remove more tail calls. 2010-06-04 01:01:24 +00:00
ldr_ext.ll
ldr_frame.ll
ldr_post.ll
ldr_pre.ll
ldr.ll
ldrd.ll Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm 2010-03-17 17:52:21 +00:00
load.ll
long_shift.ll Teach EmitLiveInCopies to omit copies for unused virtual registers, 2010-06-24 22:23:02 +00:00
long-setcc.ll
long.ll
lsr-code-insertion.ll Change if-conversion block size limit checks to add some flexibility. 2010-06-25 22:42:03 +00:00
lsr-on-unrolled-loops.ll - Allow target to specify when is register pressure "too high". In most cases, 2010-07-23 22:39:59 +00:00
lsr-scale-addr-mode.ll
machine-cse-cmp.ll Re-apply 105308 with fix. 2010-06-04 23:28:13 +00:00
mem.ll
memcpy-inline.ll
memfunc.ll
mls.ll Convert a few tests to FileCheck for PR5307. 2009-11-22 11:45:44 +00:00
movt-movw-global.ll Materialize global addresses via movt/movw pair, this is always better 2009-11-24 00:44:37 +00:00
movt.ll
mul_const.ll Some cheap DAG combine goodness for multiplication with a particular constant. 2010-05-15 18:16:59 +00:00
mul.ll
mulhi.ll
mvn.ll
neon_arith1.ll
neon_ld1.ll Use Unified Assembly Syntax for the ARM backend. 2009-11-09 00:11:35 +00:00
neon_ld2.ll
neon_minmax.ll Check for comparisons of +/- zero when optimizing less-than-or-equal and 2010-02-24 22:15:53 +00:00
pack.ll
pr3502.ll
private.ll Delete useless trailing semicolons. 2010-01-05 17:55:26 +00:00
reg_sequence.ll Use a target-specific VMOVIMM DAG node instead of BUILD_VECTOR to represent 2010-07-13 21:16:48 +00:00
remat.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
ret0.ll
ret_arg1.ll
ret_arg2.ll
ret_arg3.ll
ret_arg4.ll
ret_arg5.ll
ret_f32_arg2.ll
ret_f32_arg5.ll
ret_f64_arg2.ll
ret_f64_arg_reg_split.ll
ret_f64_arg_split.ll
ret_f64_arg_stack.ll
ret_i64_arg2.ll
ret_i64_arg3.ll
ret_i64_arg_split.ll
ret_i128_arg2.ll
ret_void.ll
rev.ll
sbfx.ll add a simple dag combine to replace trivial shl+lshr with 2010-04-15 05:28:43 +00:00
section.ll
select_xform.ll
select-imm.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
select.ll
shifter_operand.ll
smul.ll
spill-q.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
stack-frame.ll
stm.ll
str_post.ll
str_pre-2.ll Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm 2010-03-17 17:52:21 +00:00
str_pre.ll
str_trunc.ll
sub.ll Improve 64-subtraction of immediates when parts of the immediate can fit 2010-07-14 17:45:16 +00:00
sxt_rot.ll
t2-imm.ll
tail-opts.ll Delete useless trailing semicolons. 2010-01-05 17:55:26 +00:00
thread_pointer.ll
tls1.ll
tls2.ll Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm 2010-03-17 17:52:21 +00:00
tls3.ll
trap.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
trunc_ldr.ll
truncstore-dag-combine.ll
tst_teq.ll
uint64tof64.ll
unaligned_load_store.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
unord.ll
uxt_rot.ll
uxtb.ll
va_arg.ll Fix va_arg for doubles. With this patch VAARG nodes always contain the 2010-07-11 04:01:49 +00:00
vaba.ll
vabd.ll
vabs.ll
vadd.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vargs_align.ll
vargs.ll
vbits.ll The Neon "vtst" instruction takes a suffix that is the element size alone -- 2010-01-17 06:35:17 +00:00
vbsl.ll
vceq.ll
vcge.ll
vcgt.ll Intrinsics which do a vector compare (results are all zero or all ones) are modeled as icmp / fcmp + sext. This is turned into a vsetcc by dag combine (yes, not a good long term solution). The targets can then isel the vsetcc to the appropriate instruction. 2010-05-19 01:08:17 +00:00
vcnt.ll
vcombine.ll
vcvt.ll
vdup.ll Add an ARM-specific DAG combining to avoid redundant VDUPLANE nodes. 2010-07-14 01:22:12 +00:00
vext.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
vfcmp.ll
vfp.ll
vget_lane.ll Don't create neon moves in CopyRegToReg. NEONMoveFixPass will do the conversion 2010-07-06 16:24:34 +00:00
vhadd.ll
vhsub.ll
vicmp.ll
vld1.ll Fix tests for Neon load/store intrinsics to match the i8* types expected by 2010-04-20 00:17:16 +00:00
vld2.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vld3.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vld4.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vldlane.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vminmax.ll
vmla.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vmls.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vmov.ll Add support for NEON VMVN immediate instructions. 2010-07-14 06:31:50 +00:00
vmul.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vneg.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vpadal.ll
vpadd.ll
vpminmax.ll
vqadd.ll
vqdmul.ll
vqshl.ll
vqshrn.ll
vqsub.ll
vrec.ll
vrev.ll Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
vshift.ll
vshiftins.ll
vshl.ll
vshll.ll
vshrn.ll
vsra.ll
vst1.ll Fix tests for Neon load/store intrinsics to match the i8* types expected by 2010-04-20 00:17:16 +00:00
vst2.ll Fix tests for Neon load/store intrinsics to match the i8* types expected by 2010-04-20 00:17:16 +00:00
vst3.ll Fix tests for Neon load/store intrinsics to match the i8* types expected by 2010-04-20 00:17:16 +00:00
vst4.ll Fix tests for Neon load/store intrinsics to match the i8* types expected by 2010-04-20 00:17:16 +00:00
vstlane.ll Fix tests for Neon load/store intrinsics to match the i8* types expected by 2010-04-20 00:17:16 +00:00
vsub.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vtbl.ll
vtrn.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vuzp.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
vzip.ll Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul, 2010-05-03 22:36:46 +00:00
weak2.ll
weak.ll