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James Molloy ba8562af44 Improve codegen for BUILD_VECTORs on ARM. 
If we have a BUILD_VECTOR that is mostly a constant splat, it is often better to splat that constant then insertelement the non-constant lanes instead of insertelementing every lane from an undef base.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163304 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06 09:55:02 +00:00
..
2006-11-10-CycleInDAG.ll
…
2007-01-19-InfiniteLoop.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
2007-03-07-CombinerCrash.ll
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2007-03-13-InstrSched.ll
Convert the uses of '|&' to use '2>&1 |' instead, which works on old
2012-07-02 18:37:59 +00:00
2007-03-21-JoinIntervalsCrash.ll
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2007-03-27-RegScavengerAssert.ll
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2007-03-30-RegScavengerAssert.ll
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2007-04-02-RegScavengerAssert.ll
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2007-04-03-PEIBug.ll
Fix the remaining TCL-style quotes found in the testsuite. This is
2012-07-02 19:09:46 +00:00
2007-04-03-UndefinedSymbol.ll
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2007-04-30-CombinerCrash.ll
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2007-05-03-BadPostIndexedLd.ll
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2007-05-07-tailmerge-1.ll
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2007-05-09-tailmerge-2.ll
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2007-05-14-InlineAsmCstCrash.ll
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2007-05-14-RegScavengerAssert.ll
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2007-05-22-tailmerge-3.ll
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2007-05-23-BadPreIndexedStore.ll
Fix the remaining TCL-style quotes found in the testsuite. This is
2012-07-02 19:09:46 +00:00
2007-08-15-ReuseBug.ll
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2008-02-04-LocalRegAllocBug.ll
Don't run RAFast in the optimizing regalloc pipeline.
2012-06-08 23:15:12 +00:00
2008-02-29-RegAllocLocal.ll
Don't run RAFast in the optimizing regalloc pipeline.
2012-06-08 23:15:12 +00:00
2008-03-05-SxtInRegBug.ll
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2008-03-07-RegScavengerAssert.ll
Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.
2011-11-27 06:54:59 +00:00
2008-04-04-ScavengerAssert.ll
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2008-04-10-ScavengerAssert.ll
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2008-04-11-PHIofImpDef.ll
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2008-05-19-LiveIntervalsBug.ll
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2008-05-19-ScavengerAssert.ll
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2008-07-17-Fdiv.ll
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2008-07-24-CodeGenPrepCrash.ll
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2008-08-07-AsmPrintBug.ll
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2008-09-17-CoalescerBug.ll
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2008-11-18-ScavengerAssert.ll
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2009-02-16-SpillerBug.ll
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2009-02-22-SoftenFloatVaArg.ll
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2009-02-27-SpillerBug.ll
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2009-03-07-SpillerBug.ll
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2009-03-09-AddrModeBug.ll
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2009-04-06-AsmModifier.ll
Convert all tests using TCL-style quoting to use shell-style quoting.
2012-07-02 12:47:22 +00:00
2009-04-08-AggregateAddr.ll
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2009-04-08-FloatUndef.ll
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2009-04-08-FREM.ll
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2009-04-09-RegScavengerAsm.ll
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2009-05-05-DAGCombineBug.ll
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2009-05-07-RegAllocLocal.ll
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2009-05-11-CodePlacementCrash.ll
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2009-05-18-InlineAsmMem.ll
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2009-06-02-ISelCrash.ll
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2009-06-04-MissingLiveIn.ll
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2009-06-15-RegScavengerAssert.ll
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2009-06-19-RegScavengerAssert.ll
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2009-06-22-CoalescerBug.ll
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2009-06-30-RegScavengerAssert2.ll
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2009-06-30-RegScavengerAssert3.ll
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2009-06-30-RegScavengerAssert4.ll
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2009-06-30-RegScavengerAssert5.ll
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2009-06-30-RegScavengerAssert.ll
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2009-07-01-CommuteBug.ll
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2009-07-09-asm-p-constraint.ll
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2009-07-18-RewriterBug.ll
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2009-07-22-ScavengerAssert.ll
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2009-07-22-SchedulerAssert.ll
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2009-07-29-VFP3Registers.ll
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2009-08-02-RegScavengerAssert-Neon.ll
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2009-08-04-RegScavengerAssert-2.ll
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2009-08-04-RegScavengerAssert.ll
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2009-08-15-RegScavenger-EarlyClobber.ll
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2009-08-15-RegScavengerAssert.ll
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2009-08-21-PostRAKill2.ll
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2009-08-21-PostRAKill3.ll
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2009-08-21-PostRAKill.ll
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2009-08-23-linkerprivate.ll
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2009-08-26-ScalarToVector.ll
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2009-08-27-ScalarToVector.ll
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2009-08-29-ExtractEltf32.ll
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2009-08-29-TooLongSplat.ll
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2009-08-31-LSDA-Name.ll
Convert tests to the new EH model.
2011-11-08 00:09:27 +00:00
2009-08-31-TwoRegShuffle.ll
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2009-09-09-AllOnes.ll
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2009-09-09-fpcmp-ole.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
2009-09-10-postdec.ll
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2009-09-13-InvalidSubreg.ll
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2009-09-13-InvalidSuperReg.ll
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2009-09-20-LiveIntervalsBug.ll
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2009-09-21-LiveVariablesBug.ll
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2009-09-22-LiveVariablesBug.ll
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2009-09-23-LiveVariablesBug.ll
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2009-09-24-spill-align.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
2009-09-27-CoalescerBug.ll
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2009-09-28-LdStOptiBug.ll
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2009-10-02-NEONSubregsBug.ll
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2009-10-16-Scope.ll
Add a new wrapper node for a DILexicalBlock that encapsulates it and a
2011-10-11 22:59:11 +00:00
2009-10-21-InvalidFNeg.ll
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2009-10-27-double-align.ll
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2009-10-30.ll
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2009-11-01-NeonMoves.ll
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2009-11-02-NegativeLane.ll
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2009-11-07-SubRegAsmPrinting.ll
Use vmov.f32 to materialize f32 consts on ARM. This relaxes constraints on
2012-03-15 18:49:02 +00:00
2009-11-13-CoalescerCrash.ll
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2009-11-13-ScavengerAssert2.ll
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2009-11-13-ScavengerAssert.ll
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2009-11-13-VRRewriterCrash.ll
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2009-11-30-LiveVariablesBug.ll
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2009-12-02-vtrn-undef.ll
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2010-03-04-eabi-fp-spill.ll
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2010-03-04-stm-undef-addr.ll
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2010-03-18-ldm-rtrn.ll
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2010-04-07-DbgValueOtherTargets.ll
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2010-04-09-NeonSelect.ll
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2010-04-13-v2f64SplitArg.ll
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2010-04-14-SplitVector.ll
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2010-04-15-ScavengerDebugValue.ll
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2010-05-14-IllegalType.ll
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2010-05-17-FastAllocCrash.ll
Don't run RAFast in the optimizing regalloc pipeline.
2012-06-08 23:15:12 +00:00
2010-05-18-LocalAllocCrash.ll
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2010-05-18-PostIndexBug.ll
Tighten physical register invariants: Allocatable physical registers can
2012-02-14 18:51:53 +00:00
2010-05-19-Shuffles.ll
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2010-05-20-NEONSpillCrash.ll
RegAlloc superpass: includes phi elimination, coalescing, and scheduling.
2012-02-10 04:10:36 +00:00
2010-05-21-BuildVector.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
2010-06-11-vmovdrr-bitcast.ll
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2010-06-21-LdStMultipleBug.ll
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2010-06-21-nondarwin-tc.ll
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2010-06-25-Thumb2ITInvalidIterator.ll
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2010-06-29-PartialRedefFastAlloc.ll
Set correct <def,undef> flags when lowering REG_SEQUENCE.
2012-01-24 23:28:42 +00:00
2010-06-29-SubregImpDefs.ll
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2010-07-26-GlobalMerge.ll
Convert tests to the new EH model.
2011-11-08 00:09:27 +00:00
2010-08-04-EHCrash.ll
Convert tests to the new EH model.
2011-11-08 00:09:27 +00:00
2010-08-04-StackVariable.ll
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2010-09-21-OptCmpBug.ll
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2010-09-29-mc-asm-header-test.ll
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2010-10-19-mc-elf-objheader.ll
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2010-10-25-ifcvt-ldm.ll
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2010-11-15-SpillEarlyClobber.ll
Delete the 'standard' spiller with used the old spilling framework.
2011-11-12 23:29:02 +00:00
2010-11-29-PrologueBug.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
2010-11-30-reloc-movt.ll
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2010-12-07-PEIBug.ll
Use vmov.f32 to materialize f32 consts on ARM. This relaxes constraints on
2012-03-15 18:49:02 +00:00
2010-12-08-tpsoft.ll
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2010-12-15-elf-lcomm.ll
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2010-12-17-LocalStackSlotCrash.ll
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2011-01-19-MergedGlobalDbg.ll
Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment.
2011-11-30 21:54:15 +00:00
2011-02-04-AntidepMultidef.ll
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2011-02-07-AntidepClobber.ll
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2011-03-10-DAGCombineCrash.ll
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2011-03-15-LdStMultipleBug.ll
Rework test so that it reproduces the error without the horrible flag.
2012-08-15 21:10:18 +00:00
2011-03-23-PeepholeBug.ll
Flip the new block-placement pass to be on by default.
2012-04-16 13:49:17 +00:00
2011-04-07-schediv.ll
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2011-04-11-MachineLICMBug.ll
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2011-04-12-AlignBug.ll
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2011-04-12-FastRegAlloc.ll
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2011-04-15-AndVFlagPeepholeBug.ll
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2011-04-15-RegisterCmpPeephole.ll
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2011-04-26-SchedTweak.ll
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2011-04-27-IfCvtBug.ll
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2011-05-04-MultipleLandingPadSuccs.ll
Convert tests to the new EH model.
2011-11-08 00:09:27 +00:00
2011-06-09-TailCallByVal.ll
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2011-06-16-TailCallByVal.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
2011-06-29-MergeGlobalsAlign.ll
Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment.
2011-11-30 21:54:15 +00:00
2011-07-10-GlobalMergeBug.ll
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2011-08-02-MergedGlobalDbg.ll
Always use the string pool, even when it makes the .o larger. This may help
2011-10-28 05:29:47 +00:00
2011-08-12-vmovqqqq-pseudo.ll
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2011-08-25-ldmia_ret.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
2011-08-29-ldr_pre_imm.ll
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2011-08-29-SchedCycle.ll
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2011-09-09-OddVectorDivision.ll
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2011-09-19-cpsr.ll
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2011-09-28-CMovCombineBug.ll
Tighten a ARM dag combine condition to avoid an identity transformation, which
2011-09-28 23:16:31 +00:00
2011-10-26-ExpandUnalignedLoadCrash.ll
Don't try to form pre/post-indexed loads/stores until after LegalizeDAG runs. Fixes PR11029.
2011-11-12 00:35:34 +00:00
2011-10-26-memset-inline.ll
Lower mem-ops to unaligned i32/i16 load/stores on ARM where supported.
2011-11-08 18:56:23 +00:00
2011-10-26-memset-with-neon.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
2011-11-07-PromoteVectorLoadStore.ll
Make sure to expand SIGN_EXTEND_INREG for NEON vectors. PR11319, round 3.
2011-11-11 03:16:38 +00:00
2011-11-09-BitcastVectorDouble.ll
Add check so we don't try to perform an impossible transformation. Fixes issue from PR11319.
2011-11-09 22:25:12 +00:00
2011-11-09-IllegalVectorFPIntConvert.ll
Make sure we correctly unroll conversions between v2f64 and v2i32 on ARM.
2011-11-09 23:36:02 +00:00
2011-11-14-EarlyClobber.ll
Fix early-clobber handling in shrinkToUses.
2011-11-14 18:45:38 +00:00
2011-11-28-DAGCombineBug.ll
DAG combine should not increase alignment of loads / stores with alignment less
2011-11-28 20:42:56 +00:00
2011-11-29-128bitArithmetics.ll
Add correct set of regression tests for r162094 commit.
2012-08-21 12:43:03 +00:00
2011-11-30-MergeAlignment.ll
Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment.
2011-11-30 21:54:15 +00:00
2011-12-14-machine-sink.ll
Convert the uses of '|&' to use '2>&1 |' instead, which works on old
2012-07-02 18:37:59 +00:00
2011-12-19-sjlj-clobber.ll
Mark ARM eh_sjlj_dispatchsetup as clobbering all registers. Radar 10567930.
2011-12-20 01:29:27 +00:00
2012-01-23-PostRA-LICM.ll
Fix PR11829. PostRA LICM was too aggressive.
2012-01-23 21:01:15 +00:00
2012-01-24-RegSequenceLiveRange.ll
Preserve <undef> flags in ARMExpandPseudo.
2012-06-15 17:46:54 +00:00
2012-01-26-CoalescerBug.ll
Rewrite instruction operands in AdjustCopiesBackFrom. Fixes PR11861.
2012-01-27 00:05:42 +00:00
2012-01-26-CopyPropKills.ll
Clear kill flags before propagating a copy.
2012-01-26 17:52:15 +00:00
2012-02-01-CoalescerBug.ll
Move test/CodeGen/Generic/2012-02-01-CoalescerBug.ll to CodeGen/ARM, for now. It requires TARGETS=arm.
2012-02-02 11:44:58 +00:00
2012-03-05-FPSCR-bug.ll
Split fpscr into two registers: FPSCR and FPSCR_NZCV.
2012-03-06 00:19:55 +00:00
2012-03-13-DAGCombineBug.ll
When performing a truncating store, it's possible to rearrange the data
2012-04-09 20:32:02 +00:00
2012-03-26-FoldImmBug.ll
ARM has a peephole optimization which looks for a def / use pair. The def
2012-03-26 23:31:00 +00:00
2012-04-02-TwoAddrInstrCrash.ll
During two-address lowering, rescheduling an instruction does not untie
2012-04-02 19:58:43 +00:00
2012-04-10-DAGCombine.ll
Transform div to mul with reciprocal only when fp imm is legal.
2012-04-10 13:22:49 +00:00
2012-04-24-SplitEHCriticalEdge.ll
MachineBasicBlock::SplitCriticalEdge() should follow LLVM IR variant and refuse to break edge to EH landing pad. rdar://11300144
2012-04-24 19:06:55 +00:00
2012-05-29-TailDupBug.ll
Teach taildup to update livein set. rdar://11538365
2012-05-30 00:42:39 +00:00
2012-06-12-SchedMemLatency.ll
sched: fix latency of memory dependence chain edges for consistency.
2012-06-13 02:39:03 +00:00
2012-08-04-DtripleSpillReload.ll
Add stack spill / reload instructions for DTriple and DQuad register classes, which
2012-08-04 13:16:12 +00:00
2012-08-08-legalize-unaligned.ll
Fix the legalization of ExtLoad on ARM. ExpandUnalignedLoad did not properly
2012-08-09 01:56:44 +00:00
2012-08-09-neon-extload.ll
Add test for previous commit correcting NEON load patterns.
2012-08-13 10:38:45 +00:00
2012-08-13-bfi.ll
Do not optimize (or (and X,Y), Z) into BFI and other sequences if the AND ISDNode has more than one user.
2012-08-13 18:52:44 +00:00
2012-08-27-CopyPhysRegCrash.ll
Make sure we add the predicate after all of the registers are added.
2012-08-27 22:12:44 +00:00
2012-08-30-select.ll
Not all targets have efficient ISel code generation for select instructions.
2012-09-02 12:10:19 +00:00
addrmode.ll
Convert the uses of '|&' to use '2>&1 |' instead, which works on old
2012-07-02 18:37:59 +00:00
aliases.ll
Convert all tests using TCL-style quoting to use shell-style quoting.
2012-07-02 12:47:22 +00:00
align.ll
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alloca.ll
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argaddr.ll
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arguments2.ll
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arguments3.ll
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arguments4.ll
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arguments5.ll
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arguments6.ll
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arguments7.ll
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arguments8.ll
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arguments_f64_backfill.ll
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arguments-nosplit-double.ll
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arguments-nosplit-i64.ll
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arguments.ll
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arm-and-tst-peephole.ll
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arm-asm.ll
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arm-frameaddr.ll
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arm-modifier.ll
Add support for the %H output modifier.
2012-08-13 18:18:52 +00:00
arm-negative-stride.ll
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arm-returnaddr.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
armv4.ll
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atomic-64bit.ll
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atomic-cmp.ll
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atomic-load-store.ll
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atomic-op.ll
Fix a couple of typos in EmitAtomic.
2012-08-31 02:08:34 +00:00
available_externally.ll
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avoid-cpsr-rmw.ll
Thumb2 size reduction fix for tied operands of tMUL.
2012-02-24 00:33:36 +00:00
bfc.ll
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bfi.ll
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bfx.ll
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bic.ll
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bicZext.ll
This change handles a another case for generating the bic instruction
2012-06-18 14:51:32 +00:00
bits.ll
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bswap-inline-asm.ll
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bx_fold.ll
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call_nolink.ll
Fix the remaining TCL-style quotes found in the testsuite. This is
2012-07-02 19:09:46 +00:00
call-tc.ll
Add proper checks.
2012-04-10 03:15:42 +00:00
call.ll
Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.
2011-11-27 06:54:59 +00:00
carry.ll
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clz.ll
Manually upgrade the test suite to specify the flag to cttz and ctlz.
2011-12-12 11:59:10 +00:00
cmn.ll
Re-enable the CMN instruction.
2012-06-11 08:07:26 +00:00
coalesce-subregs.ll
Enable sub-sub-register copy coalescing.
2012-05-15 23:31:35 +00:00
code-placement.ll
Added a late machine instruction copy propagation pass. This catches
2012-01-07 03:02:36 +00:00
commute-movcc.ll
Pass the right sign to TLI->isLegalICmpImmediate.
2012-04-05 03:10:56 +00:00
compare-call.ll
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constants.ll
Don't add CFG edges for redundant conditional branches.
2012-08-20 21:39:52 +00:00
crash-greedy-v6.ll
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crash-greedy.ll
Clear kill flags in removeCopyByCommutingDef().
2012-07-31 02:47:24 +00:00
crash-O0.ll
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crash.ll
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cse-call.ll
Handle regmasks in MachineCSE.
2012-02-28 02:08:50 +00:00
cse-libcalls.ll
Convert all tests using TCL-style quoting to use shell-style quoting.
2012-07-02 12:47:22 +00:00
ctor_order.ll
Properly emit ctors / dtors with priorities into desired sections
2012-01-25 22:24:19 +00:00
ctors_dtors.ll
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ctz.ll
Manually upgrade the test suite to specify the flag to cttz and ctlz.
2011-12-12 11:59:10 +00:00
dagcombine-anyexttozeroext.ll
An oversight when applying the patches for r150956 and r150957 to a vanilla tree meant I forgot to svn add these testcases.
2012-04-05 10:01:12 +00:00
data-in-code-annotations.ll
Refactor data-in-code annotations.
2012-05-18 19:12:01 +00:00
debug-info-arg.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
debug-info-blocks.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
debug-info-branch-folding.ll
During the CodeGenPrepare we often lower intrinsics (such as objsize)
2012-08-14 05:19:07 +00:00
debug-info-d16-reg.ll
- Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function
2011-12-14 02:11:42 +00:00
debug-info-qreg.ll
Add an option to pad an uleb128 to MCObjectWriter and remove the uleb128 encoding from the DWARF asm printer.
2011-11-05 11:52:44 +00:00
debug-info-s16-reg.ll
Add an option to pad an uleb128 to MCObjectWriter and remove the uleb128 encoding from the DWARF asm printer.
2011-11-05 11:52:44 +00:00
debug-info-sreg2.ll
Make tests less sensitive to scheduling changes.
2012-02-23 17:19:34 +00:00
div.ll
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divmod.ll
Emit a single _udivmodsi4 libcall instead of two separate _udivsi3 and
2012-06-21 05:56:05 +00:00
domain-conv-vmovs.ll
Strip old MachineInstrs *after* we know we can put them back.
2012-09-05 18:37:53 +00:00
dyn-stackalloc.ll
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eh-resume-darwin.ll
Convert tests to the new EH model.
2011-11-08 00:09:27 +00:00
ehabi-unwind.ll
An option to selectively enable part of ARM EHABI support.
2012-01-24 13:05:33 +00:00
elf-lcomm-align.ll
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extloadi1.ll
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fabss.ll
Add test triples to fix win32 failures. Revert workaround from r161292.
2012-08-08 20:31:37 +00:00
fadds.ll
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fast-isel-binary.ll
[fast-isel] Add support for SUBs with non-legal types.
2012-02-08 02:45:44 +00:00
fast-isel-br-const.ll
To ensure that we have more accurate line information for a block
2012-04-10 18:18:10 +00:00
fast-isel-br-phi.ll
[fast-isel] HandlePHINodesInSuccessorBlocks() can promite i8 and i16 types too.
2012-02-04 00:39:19 +00:00
fast-isel-call-multi-reg-return.ll
[fast-isel] Cleaner fix for when we're unable to handle a non-double multi-reg
2012-05-11 18:51:55 +00:00
fast-isel-call.ll
[arm-fast-isel] Add support for fastcc.
2012-08-16 05:15:53 +00:00
fast-isel-cmp-imm.ll
[fast-isel] Address Eli's comments for r152847. Specifically, add a test case
2012-03-15 22:54:20 +00:00
fast-isel-conversion.ll
[fast-isel] Add support for FPToUI. Also add test cases for FPToSI.
2012-02-03 20:27:51 +00:00
fast-isel-crash2.ll
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fast-isel-crash.ll
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fast-isel-deadcode.ll
Reapply r146997, "Heed spill slot alignment on ARM."
2012-01-05 00:26:57 +00:00
fast-isel-fold.ll
Add support for emitting both signed- and zero-extend loads. Fix
2011-11-13 02:23:59 +00:00
fast-isel-frameaddr.ll
[arm-fast-isel] Add support for the llvm.frameaddress() intrinsic.
2012-05-30 17:23:22 +00:00
fast-isel-GEP-coalesce.ll
When fast iseling a GEP, accumulate the offset rather than emitting a series of
2011-11-17 07:15:58 +00:00
fast-isel-icmp.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-indirectbr.ll
[fast-isel] Add support for indirect branches.
2012-02-07 23:56:08 +00:00
fast-isel-intrinsic.ll
[arm-fast-isel] Add support for -arm-long-calls.
2012-06-12 19:25:13 +00:00
fast-isel-ldr-str-arm.ll
Add newline to end of file. Thanks, Eli.
2011-11-14 22:48:33 +00:00
fast-isel-ldr-str-thumb-neg-index.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-ldrh-strh-arm.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-mvn.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-pic.ll
[arm-fast-isel] Add support for ARM PIC.
2012-08-29 02:41:21 +00:00
fast-isel-pred.ll
…
fast-isel-redefinition.ll
RegAlloc superpass: includes phi elimination, coalescing, and scheduling.
2012-02-10 04:10:36 +00:00
fast-isel-ret.ll
[fast-isel] Add support for returning non-legal types with no sign- or zero-
2012-02-17 01:21:28 +00:00
fast-isel-select.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-shifter.ll
[arm-fast-isel] Add support for shl, lshr, and ashr.
2012-08-03 02:37:48 +00:00
fast-isel-static.ll
…
fast-isel.ll
[fast-isel] Add support for selecting @llvm.trap().
2012-05-11 21:33:49 +00:00
fcopysign.ll
Refactor and check "onlyReadsMemory" before optimizing builtins.
2012-08-03 23:29:17 +00:00
fdivs.ll
…
fixunsdfdi.ll
…
flag-crash.ll
…
floorf.ll
llvm/test/CodeGen/ARM/floorf.ll: Add explicit -mtriple=arm-unknown-unknown, or it fails on msvc.
2012-08-14 00:56:06 +00:00
fmacs.ll
…
fmdrr-fmrrd.ll
…
fmscs.ll
…
fmuls.ll
Teach DAG combine that multiplication by 1.0 can always be constant folded.
2012-05-02 21:32:35 +00:00
fnegs.ll
…
fnmacs.ll
…
fnmscs.ll
…
fnmul.ll
…
fnmuls.ll
…
fold-const.ll
Manually upgrade the test suite to specify the flag to cttz and ctlz.
2011-12-12 11:59:10 +00:00
formal.ll
…
fp16.ll
The names of VFP variants of half-to-float conversion instructions were
2012-08-14 23:36:01 +00:00
fp_convert.ll
…
fp-arg-shuffle.ll
…
fp-fast.ll
Teach DAG combine a number of tricks to simplify FMA expressions in fast-math mode.
2012-09-01 06:04:27 +00:00
fp.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
fparith.ll
Add test triples to fix win32 failures. Revert workaround from r161292.
2012-08-08 20:31:37 +00:00
fpcmp_ueq.ll
ARM case-insensitive checking for APSR_nzcv.
2012-03-15 21:34:14 +00:00
fpcmp-opt.ll
ARM case-insensitive checking for APSR_nzcv.
2012-03-15 21:34:14 +00:00
fpcmp.ll
…
fpconsts.ll
…
fpconv.ll
…
fpmem.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
fpow.ll
…
fpowi.ll
…
fptoint.ll
…
fsubs.ll
…
fusedMAC.ll
DAG legalisation can now handle illegal fma vector types by scalarisation
2012-06-24 00:05:44 +00:00
global-merge.ll
Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment.
2011-11-30 21:54:15 +00:00
globals.ll
Align ARM constant pool islands via their basic block.
2011-12-06 01:43:02 +00:00
gv-stubs-crash.ll
Check the visibility of the global variable before placing it into the stubs
2011-10-24 23:05:43 +00:00
hardfloat_neon.ll
…
hello.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
hidden-vis-2.ll
ARM Darwin default relocation model is PIC.
2011-09-30 17:41:35 +00:00
hidden-vis-3.ll
ARM Darwin default relocation model is PIC.
2011-09-30 17:41:35 +00:00
hidden-vis.ll
…
iabs.ll
ARM: optimization for sub+abs.
2012-06-15 21:32:12 +00:00
ifcvt1.ll
Move tests to FileCheck.
2011-12-19 23:26:44 +00:00
ifcvt2.ll
…
ifcvt3.ll
Move tests to FileCheck.
2011-12-19 23:26:44 +00:00
ifcvt4.ll
…
ifcvt5.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
ifcvt6.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
ifcvt7.ll
…
ifcvt8.ll
…
ifcvt9.ll
…
ifcvt10.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
ifcvt11.ll
ARM case-insensitive checking for APSR_nzcv.
2012-03-15 21:34:14 +00:00
illegal-vector-bitcast.ll
…
imm.ll
…
indirectbr.ll
…
inlineasm2.ll
…
inlineasm3.ll
Implement 'e' and 'f' modifiers for Neon inline asm. <rdar://problem/10551006>
2011-12-12 21:45:15 +00:00
inlineasm4.ll
…
inlineasm-imm-arm.ll
…
inlineasm.ll
…
insn-sched1.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
int-to-fp.ll
…
integer_insertelement.ll
Optimize codegen for VSETLNi{8,16,32} operating on Q registers. Degenerate to a VSETLN on D registers, instead of an (INSERT_SUBREG (VSETLN (EXTRACT_SUBREG ))) sequence to help the register coalescer.
2012-09-06 09:16:01 +00:00
intrinsics.ll
…
ispositive.ll
…
jumptable-label.ll
…
large-stack.ll
…
ldm.ll
…
ldr_ext.ll
…
ldr_frame.ll
…
ldr_post.ll
FileCheckize these tests.
2012-04-16 20:56:42 +00:00
ldr_pre.ll
FileCheckize these tests.
2012-04-16 20:56:42 +00:00
ldr.ll
…
ldrd-memoper.ll
Preserve MachineMemOperands in ARMLoadStoreOptimizer.
2011-11-11 22:18:09 +00:00
ldrd.ll
Don't run RAFast in the optimizing regalloc pipeline.
2012-06-08 23:15:12 +00:00
ldst-f32-2-i32.ll
…
ldstrexd.ll
…
lit.local.cfg
Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu
2012-03-25 09:02:19 +00:00
load_i1_select.ll
When emitting a cmp with 0 for a lowered select, mask out the high
2012-02-24 00:09:36 +00:00
load-global.ll
…
load.ll
…
log2_not_readnone.ll
Revert r151816 as Jim has the appropriate fix.
2012-03-01 17:41:19 +00:00
long_shift.ll
- Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function
2011-12-14 02:11:42 +00:00
long-setcc.ll
…
long.ll
…
longMAC.ll
Patch to implement UMLAL/SMLAL instructions for the ARM architecture
2012-09-04 14:37:49 +00:00
lsr-code-insertion.ll
…
lsr-icmp-imm.ll
Allow negative immediates in ARM and Thumb2 compares.
2012-04-06 17:45:04 +00:00
lsr-scale-addr-mode.ll
Convert all tests using TCL-style quoting to use shell-style quoting.
2012-07-02 12:47:22 +00:00
lsr-unfolded-offset.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
machine-cse-cmp.ll
Implement ARMBaseInstrInfo::commuteInstruction() for MOVCCr.
2012-04-04 18:23:42 +00:00
machine-licm.ll
…
mem.ll
…
memcpy-inline.ll
Delete stale comment.
2011-11-14 18:03:05 +00:00
memfunc.ll
Proper support for a bastardized darwin-eabi hybird ABI.
2012-02-21 20:46:00 +00:00
mls.ll
…
movt-movw-global.ll
Transfer memory operands to the right instruction.
2012-05-20 06:38:42 +00:00
movt.ll
…
mul_const.ll
Perform mul combine when multiplying wiht negative constants.
2012-03-19 19:19:50 +00:00
mul.ll
…
mulhi.ll
…
mult-alt-generic-arm.ll
…
mvn.ll
…
neon_arith1.ll
…
neon_div.ll
ARM scheduling fix: compute predicated implicit use properly.
2012-06-22 02:50:31 +00:00
neon_ld1.ll
FileCheckize.
2011-11-29 23:09:16 +00:00
neon_ld2.ll
FileCheckize.
2011-11-29 23:09:16 +00:00
neon_minmax.ll
…
neon_shift.ll
…
neon_spill.ll
Add <imp-def> operands when reloading into physregs.
2012-03-06 02:48:17 +00:00
odr_comdat.ll
test commit. removing unnecessary whitespace.
2012-02-24 13:52:45 +00:00
opt-shuff-tstore.ll
Remove the "-promote-elements" flag. This flag is now enabled by default.
2012-06-04 11:27:21 +00:00
pack.ll
…
peephole-bitcast.ll
XFAIL test that depends on linear scan to remove dead code.
2011-11-12 22:39:30 +00:00
phi.ll
…
pr3502.ll
…
pr13249.ll
Now that RegistersDefinedFromSameValue handles one instruction being an
2012-07-01 17:08:01 +00:00
prefetch.ll
…
private.ll
…
reg_asc_order.ll
Allocate virtual registers in ascending order.
2012-04-02 22:30:39 +00:00
reg_sequence.ll
This commit contains a few changes that had to go in together.
2012-04-01 19:31:22 +00:00
ret0.ll
…
ret_arg1.ll
…
ret_arg2.ll
…
ret_arg3.ll
…
ret_arg4.ll
…
ret_arg5.ll
…
ret_f32_arg2.ll
…
ret_f32_arg5.ll
…
ret_f64_arg2.ll
…
ret_f64_arg_reg_split.ll
…
ret_f64_arg_split.ll
…
ret_f64_arg_stack.ll
…
ret_i64_arg2.ll
…
ret_i64_arg3.ll
…
ret_i64_arg_split.ll
…
ret_i128_arg2.ll
…
ret_void.ll
…
rev.ll
Canonicalize (srl (bswap x), 16) to (rotr (bswap x), 16) if the high 16 bits
2012-02-23 02:58:19 +00:00
sbfx.ll
…
section.ll
…
select_xform.ll
Use predication instead of pseudo-opcodes when folding into MOVCC.
2012-09-05 23:58:02 +00:00
select-imm.ll
Implement ARMBaseInstrInfo::commuteInstruction() for MOVCCr.
2012-04-04 18:23:42 +00:00
select.ll
Use predication instead of pseudo-opcodes when folding into MOVCC.
2012-09-05 23:58:02 +00:00
shifter_operand.ll
Extend r148086 to check for [r +/- reg] address mode. This fixes queens performance regression (due to increased register pressure from overly aggressive pre-inc formation).
2012-03-06 23:33:32 +00:00
shuffle.ll
…
smml.ll
Remove incorrect pattern for ARM SMML instruction.
2012-05-17 13:12:13 +00:00
smul.ll
…
spill-q.ll
Enable aligned NEON spilling by default.
2012-01-06 22:19:37 +00:00
stack-frame.ll
…
stm.ll
…
str_post.ll
…
str_pre-2.ll
Fix test that depends on register allocation.
2012-06-11 21:14:28 +00:00
str_pre.ll
Convert all tests using TCL-style quoting to use shell-style quoting.
2012-07-02 12:47:22 +00:00
str_trunc.ll
…
struct_byval.ll
ARM: use NOEN loads and stores if possible when handling struct byval.
2012-06-18 22:23:48 +00:00
sub-cmp-peephole.ll
ARM: Fix optimizeCompare to correctly check safe condition.
2012-07-11 22:51:44 +00:00
sub.ll
(sub X, imm) gets canonicalized to (add X, -imm)
2012-06-23 00:29:06 +00:00
subreg-remat.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
sxt_rot.ll
…
t2-imm.ll
…
tail-dup.ll
Replace the use of isPredicable() with isPredicated() in
2012-01-26 18:24:25 +00:00
tail-opts.ll
Flip the new block-placement pass to be on by default.
2012-04-16 13:49:17 +00:00
test-sharedidx.ll
test/CodeGen/ARM/test-sharedidx.ll: Fix for -Asserts.
2012-01-13 07:03:55 +00:00
thread_pointer.ll
Convert all tests using TCL-style quoting to use shell-style quoting.
2012-07-02 12:47:22 +00:00
thumb1-varalloc.ll
…
thumb2-it-block.ll
ARM: optimization for sub+abs.
2012-06-15 21:32:12 +00:00
tls1.ll
Convert all tests using TCL-style quoting to use shell-style quoting.
2012-07-02 12:47:22 +00:00
tls2.ll
…
tls3.ll
Convert all tests using TCL-style quoting to use shell-style quoting.
2012-07-02 12:47:22 +00:00
tls-models.ll
Extend the IL for selecting TLS models (PR9788)
2012-06-23 11:37:03 +00:00
trap.ll
…
trunc_ldr.ll
…
truncstore-dag-combine.ll
…
tst_teq.ll
…
twoaddrinstr.ll
Fix a somewhat nasty crasher in PR13378. This crashes inside of
2012-07-18 18:58:22 +00:00
uint64tof64.ll
…
umulo-32.ll
…
unaligned_load_store.ll
Use vld1/vst1 to load/store f64 if alignment is < 4 and the target allows unaligned access. rdar://12091029
2012-08-15 17:44:53 +00:00
undef-sext.ll
…
unord.ll
…
unsafe-fsub.ll
Teach DAG combine to fold x-x to 0.0 when unsafe FP math is enabled.
2012-05-07 20:51:25 +00:00
uxt_rot.ll
…
uxtb.ll
…
va_arg.ll
Make this test less sensitive to codegen optimizations.
2011-10-05 18:13:08 +00:00
vaba.ll
…
vabd.ll
…
vabs.ll
…
vadd.ll
…
vargs_align.ll
…
vargs.ll
…
vbits.ll
…
vbsl-constant.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
vbsl.ll
…
vceq.ll
…
vcge.ll
…
vcgt.ll
…
vcnt.ll
More replacing of target-dependent intrinsics with target-indepdent
2012-07-18 00:02:16 +00:00
vcombine.ll
…
vcvt_combine.ll
…
vcvt.ll
…
vdiv_combine.ll
Convert floating point division by a constant into multiplication by the
2012-04-07 20:04:00 +00:00
vdup.ll
Improve codegen for BUILD_VECTORs on ARM.
2012-09-06 09:55:02 +00:00
vector-DAGCombine.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
vector-extend-narrow.ll
Fixed the DAG combiner to better handle the folding of AND nodes for vector types. The previous code was making the assumption that the length of the bitmask returned by isConstantSplat was equal to the size of the vector type. Now we first make sure that the splat value has at least the length of the vector lane type, then we only use as many fields as we have available in the splat value.
2012-09-05 08:57:21 +00:00
vext.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
vfcmp.ll
…
vfp.ll
Add test triples to fix win32 failures. Revert workaround from r161292.
2012-08-08 20:31:37 +00:00
vget_lane.ll
Optimize codegen for VSETLNi{8,16,32} operating on Q registers. Degenerate to a VSETLN on D registers, instead of an (INSERT_SUBREG (VSETLN (EXTRACT_SUBREG ))) sequence to help the register coalescer.
2012-09-06 09:16:01 +00:00
vhadd.ll
…
vhsub.ll
…
vicmp.ll
…
vld1.ll
…
vld2.ll
…
vld3.ll
…
vld4.ll
…
vlddup.ll
These tests used intrinsics with the wrong prototype. They weren't caught because
2012-05-27 19:35:41 +00:00
vldlane.ll
Also set addrmode6 alignment when align==size.
2011-10-27 22:39:16 +00:00
vminmax.ll
…
vmla.ll
…
vmls.ll
…
vmov.ll
ARM vector any_extends need to be selected to vmovl. <rdar://problem/10723651>
2012-01-20 20:59:56 +00:00
vmul.ll
Don't introduce illegal types when creating vmull operations. <rdar://11324364>
2012-04-30 16:53:34 +00:00
vneg.ll
…
vpadal.ll
…
vpadd.ll
…
vpminmax.ll
…
vqadd.ll
…
vqdmul.ll
…
vqshl.ll
…
vqshrn.ll
…
vqsub.ll
…
vrec.ll
…
vrev.ll
When performing a truncating store, it's possible to rearrange the data
2012-04-09 20:32:02 +00:00
vshift.ll
…
vshiftins.ll
…
vshl.ll
…
vshll.ll
…
vshrn.ll
…
vsra.ll
…
vst1.ll
…
vst2.ll
VST2 four-register w/ update pseudos for fixed/register update.
2012-01-20 19:16:00 +00:00
vst3.ll
[fast-isel] Remove -disable-arm-fast-isel option. -fast-isel=0 suffices. Minor cleanup.
2012-05-11 19:40:25 +00:00
vst4.ll
…
vstlane.ll
Also set addrmode6 alignment when align==size.
2011-10-27 22:39:16 +00:00
vsub.ll
…
vtbl.ll
…
vtrn.ll
…
vuzp.ll
…
vzip.ll
…
weak2.ll
…
weak.ll
…
widen-vmovs.ll
Disable code placement for this test.
2012-04-16 20:49:06 +00:00