63 Commits

Author	SHA1	Message	Date
Zane Kaminski	6d7f8ad3a2	A.1.0 RC2/3	2024-05-14 03:06:13 -04:00
Zane Kaminski	2aa9051954	Firmware 1.0 RC1	2024-05-13 05:03:21 -04:00
Zane Kaminski	64f479c465	RC1	2024-03-20 05:26:44 -04:00
Zane Kaminski	c3716ebb82	Change ~ to ! where appropriate in GR8RAM.v	2024-02-16 20:54:16 -05:00
Zane Kaminski	97943bc2e7	Recompile	2024-02-16 20:48:50 -05:00
Zane Kaminski	7eb62dbe5a	Untrack and delete .qws files	2024-02-16 20:46:40 -05:00
Zane Kaminski	f347a27f89	Create new quartus project	2024-02-16 20:43:29 -05:00
Zane Kaminski	9f456e8d0f	Delete old quartus stuff	2024-02-16 20:41:52 -05:00
Zane Kaminski	b1757d3d0f	Compiled CPLD again	2023-02-28 11:23:37 -05:00
Zane Kaminski	4ae69c54f3	New project	2023-02-28 11:17:29 -05:00
Zane Kaminski	debc1f02fe	Release candidate?	2021-09-14 03:57:20 -04:00
Zane Kaminski	76eb5bdd9c	Ignore Quartus stuff	2021-04-21 23:09:07 -04:00
Zane Kaminski	5437b524cc	Register Apple address bus on PHI0 rising edge	2021-04-21 20:06:56 -04:00
Zane Kaminski	edf6ae602e	Change IOROMEN logic back to synchronous reset	2021-04-21 09:21:35 -04:00
Zane Kaminski	e2d63fc8ed	Output read data on falling edge to get more hold time	2021-04-21 09:19:57 -04:00
Zane Kaminski	d2dbdc8193	Revert "Updated slew rate/current strength assignments" ... This reverts commit 780fe32807.	2021-04-20 05:50:09 -04:00
Zane Kaminski	780fe32807	Updated slew rate/current strength assignments	2021-04-20 05:43:37 -04:00
Zane Kaminski	2ca22d3d54	Latch config DIP switches at boot ... Also rearranged GR8RAM.v	2021-04-20 04:23:57 -04:00
Zane Kaminski	2f607d6d7c	Works better?	2021-04-20 04:10:26 -04:00
Zane Kaminski	f09d92f480	Sorta works	2021-04-19 02:57:51 -04:00
Zane Kaminski	ed0821b322	Added CKE back	2021-04-18 20:24:58 -04:00
Zane Kaminski	bfd262def7	Sorta works	2021-04-18 06:01:08 -04:00
Zane Kaminski	8e35f6fc16	Remove CKE	2021-04-18 03:59:56 -04:00
Zane Kaminski	4fd3d2ff3f	Make apple boot ... Apple boots but SDRAM not working. Register R/W/increment works	2021-04-18 03:54:45 -04:00
Zane Kaminski	d8a5dc069d	idk	2021-04-11 15:39:19 -04:00
Zane Kaminski	fc2e875ac2	Works?	2021-04-03 03:44:42 -04:00
Zane Kaminski	763861e444	ugh	2021-03-19 16:38:48 -04:00
Zane Kaminski	e4bfc93b1f	before remove UFM	2021-03-19 14:23:33 -04:00
Zane Kaminski	a336f5969b	hmm	2021-03-19 06:59:22 -04:00
Zane Kaminski	4defba0f50	better	2021-03-19 06:45:31 -04:00
Zane Kaminski	72851cefc5	ugh	2021-03-19 02:56:20 -04:00
Zane Kaminski	686fac229e	idk	2021-03-15 13:40:59 -04:00
Zane Kaminski	fdbc92725a	Remove old CPLD stuff	2021-03-15 13:40:41 -04:00
Zane Kaminski	0a649d68ac	Fabbed	2021-02-17 19:29:24 -05:00
Zane Kaminski	e2a3901004	reset button detect	2020-10-25 05:22:14 -04:00
Zane Kaminski	13c6a59278	Sketch of verilog	2020-10-07 23:32:29 -04:00
Zane Kaminski	0ad3b4640a	Many changes	2020-03-10 18:54:44 -04:00
Zane Kaminski	ac8cf35610	Put FullIOEN back	2020-02-26 03:37:20 -05:00
Zane Kaminski	ef9b5852fb	Added transfer counters	2020-02-26 03:34:33 -05:00
Zane Kaminski	fe0a092924	Added separate configuration section	2020-02-26 03:31:20 -05:00
Zane Kaminski	490fcfb8e7	Cleanup	2020-02-26 03:15:36 -05:00
Zane Kaminski	04be5a0257	Removed inhibit output	2020-02-26 03:14:33 -05:00
Zane Kaminski	92cde65a9d	Moved REGEN and IOROMEN (no functional change)	2020-02-26 03:14:13 -05:00
Zane Kaminski	a4f29ea751	Removed SetWR and FullIOEN	2020-02-26 02:13:35 -05:00
Zane Kaminski	764b09ba6a	Comments, no actual changes to CPLD verilog	2020-02-16 22:03:57 -05:00
Zane Kaminski	88a4169ab6	Fixed previous problem, working again	2020-02-16 00:11:12 -05:00
Zane Kaminski	c5f1e637ac	Doesn't work but committing for posterity	2020-02-15 23:15:54 -05:00
Zane Kaminski	6e6813786d	Merge branch 'dev' of https://github.com/ZaneKaminski/GR8RAM into dev	2020-01-26 15:15:07 -05:00
Zane Kaminski	a2eecf4475	Separated CSDBEN	2020-01-26 15:13:37 -05:00
Zane Kaminski	85e3eb627d	Removed state counter reset	2019-12-21 01:46:05 -05:00