Commit Graph

133 Commits

Author SHA1 Message Date
David Banks
86b8e219eb All: synchronise cpu reset generated by AVR
Change-Id: I05f78a48dda721b882c3dd20755763c94e60b194
2019-11-04 11:37:22 +00:00
David Banks
8e77183c17 65c02: correct value shown an PC
Change-Id: I46d7accb3d02d8018389c01f215a9ef912fb09bf
2019-11-04 11:36:49 +00:00
David Banks
197642d262 All: fix issues at low cpu clock speeds using proper handshaking instead of fixed delays
Change-Id: I86370255634e1919ed79eeafd2b1252c625911f9
2019-11-04 10:43:54 +00:00
David Banks
8724119101 All: rename switches to represent their real function
Change-Id: I6dd61b8b7165e617363d61df5194e35c1a9dcc92
2019-11-04 09:31:56 +00:00
David Banks
663aac5198 6809: cosmetic renaming
Change-Id: I2a6a68289f7bb30ad23387f684dfd1badd6d754c
2019-11-04 09:19:27 +00:00
David Banks
66d109494e All: refactor reset logic, add debouncing
Change-Id: Ie7b57ffcb6aa9aedd52e0b633be16775e9eca822
2019-11-04 09:18:30 +00:00
David Banks
c8d084832b 6502: Make RES_n an input (it was bidirectional which is risky in some systems)
Change-Id: I91fbf429b5fb3ada181d73d7fd03ab36046657be
2019-11-03 13:59:50 +00:00
David Banks
973047db77 6502: Remove superfluous done state
Change-Id: Ieaab323c1d2e553c6636d86ebb31dde4948a0c21
2019-11-03 13:22:25 +00:00
David Banks
bcd1937d3d BusMonCore: fix issue with memory address incrementing too soon
Change-Id: Ie961c50b6c692ecddb181697b8c9a1c37956b9ce
2019-11-03 13:05:19 +00:00
David Banks
5699d02d3d 6502: Update T65 to latest version (same as AtomFpga)
Change-Id: I580c5aff7bd4c7cd234f82c25519a081d20b239f
2019-11-03 12:14:28 +00:00
David Banks
e01ee2b010 6809: fixed some recent build errors
Change-Id: Ica0aa9de8c2c7d7d15821fa061671f8419b9fbe5
2019-11-02 20:09:19 +00:00
David Banks
2101300f17 Removed unused DCM2
Change-Id: I83a5e682987094bd2b48890fadb639f5e50e8e11
2019-11-02 19:37:57 +00:00
David Banks
029ee57f71 BusMonCore: clean up switch/led names
Change-Id: I09e2778ba3718399c436aeb32f587a1cff4f1108
2019-11-02 19:31:32 +00:00
David Banks
c6f860ed2c 6502: seperate top level for GODIL and old LX9, rename modules for consistency
Change-Id: I6d9f390a24b63a303f4a557e49ee68109af4c76a
2019-11-02 19:31:32 +00:00
David Banks
cfce5b1bd7 Z80/6809: rename clocks for consistency
Change-Id: Iecd3ac5ede39865efc58eaa9e45f5892a44acb82
2019-11-02 19:31:32 +00:00
David Banks
e0db1ccd7c Removed ice6502mon as it's never really been used
Change-Id: I0898ea3450573c5dafc143e5589aa0a3b4a1dc6c
2019-11-02 19:31:38 +00:00
David Banks
1227d174a9 Removed ice6502fast as it's never really been used
Change-Id: I7179414838f0488b12f0cc01d51b09184d835546
2019-11-02 19:31:32 +00:00
David Banks
9c4c0837e5 6809: seperate top level for GODIL and old LX9
Change-Id: I4a7d2a67c8aeaabc25d2987edb4a9026e92b1efc
2019-11-02 15:18:33 +00:00
David Banks
29438683b2 Z80: seperate top level for GODIL and old LX9
Change-Id: I1f339996037bb8a20afb7664877e0ed1d53d3868
2019-11-02 14:50:43 +00:00
David Banks
d9f53c1f09 Z80: refactor at top level to better support tristateable outputs
Change-Id: Ic4a55eb99c85ff2032079d8d12c7d7e44803b6e2
2019-11-02 13:26:00 +00:00
David Banks
d23ebe6913 Z80: push tristating up to Z80CpuMon
Change-Id: I6fd3e0a170f908d47a7cf0a7f82ab4f74ed980d9
2019-11-01 18:31:31 +00:00
David Banks
71cb5ff561 Z80: started implementing BUSRQ/BUSAK
Change-Id: I3d5ef9842ff5346a2e5df96d69e47ef94a81d8b8
2019-11-01 17:48:17 +00:00
David Banks
ceedc701ca Z80: cosmetic (remove replication of a register)
Change-Id: I9ac3bf846da6f713e12b3d336cd9a25b5b6d8c96
2019-10-30 17:41:50 +00:00
David Banks
768863fb85 Z80: show halted state when single stepping
Change-Id: Iefe132a98f6b476d9ab7252f0ce551bf0435b3cd
2019-10-30 17:31:49 +00:00
David Banks
c6bc245b3d Z80: indicate NMI and INT cycles when single stepping
Change-Id: Iafef4059bd136dd9f3aebf2b03ab5ac186e035a6
2019-10-29 15:48:43 +00:00
David Banks
4818f026b2 Removed unused h44780 support (free AVR PortA)
Change-Id: Iadde3718cfd6e8be08b680796d8c9cd01016e694
2019-10-29 14:56:16 +00:00
David Banks
b6abb6964a Z80: Update all builds to 8 comparators and 16KB code
Change-Id: I8adc986caab323de395301ba397f4c7874e50d49
2019-10-27 17:32:29 +00:00
David Banks
ab80df2406 Z80: give a tad more address delay time (Acorn 2nd Proc issue)
Change-Id: I4872f8cc25d68978e856610ca7abaf4a12520028
2019-10-27 16:27:35 +00:00
David Banks
e76bdc6da2 Z80: Stop T80 in T3 not T2 (work in progress)
Change-Id: I19fa754cc09a068b628116b9636a995c162ad964
2019-10-27 14:52:42 +00:00
David Banks
d479dedf4b Z80: fix bug when NOP mode disbled
Change-Id: I1853967582bf241a74f8fd8687deda2d5555b153
2019-10-27 10:14:35 +00:00
David Banks
2c4ad8363b Z80: corrected watch/breakpoint when wait is being used
Change-Id: Ifb464548650e82fc655524186c07f98ed188e957
2019-10-26 17:39:56 +01:00
David Banks
c39cf8649b Z80: Added mode input to control idle mode
Change-Id: I59c4696c9921ecad62be0785764fdf35ec9d82d5
2019-10-26 15:35:53 +01:00
David Banks
26f0bea110 Z80: Output NOPs when paused (inc M1)
Change-Id: I100fac021d68662497fbd2d0c7428dcaf9ef98a3
2019-10-26 15:19:44 +01:00
David Banks
ac521aad15 Z80: support interrupt masking in hardware
Change-Id: I97683cc03e9d65e496e5f9f2ee366cc0bc18087b
2019-10-25 17:14:27 +01:00
David Banks
a29aa3015a lx9_dave z80: increase code space to 32KB
Change-Id: I7ab22f8cca51184b94e709336b661b8685d02d0b
2019-10-25 17:11:13 +01:00
David Banks
89cd34c7db T80: comments only
Change-Id: Id680066f04c3ede403eea87b6c433c6c913f09a8
2019-10-25 17:07:27 +01:00
David Banks
c045ebd10c All 6809 designs now use MC6809CpuMonCore
Change-Id: I97ca73690c7e1258a5b359260d695af25c21ca54
2019-10-24 14:06:03 +01:00
David Banks
be8e23fdfb 6502/65C02: Add memory state machine that takes account of Rdy
Change-Id: I11ae008f630cb2803727204f5c383218656e6cfc
2019-10-18 10:47:50 +01:00
David Banks
b4402844ae 6502/65c02: Implement Rdy internally
Change-Id: I0ddc55cf7d4674c68760f7ad53fcea7d07629f8b
2019-10-17 15:55:49 +01:00
David Banks
9d0e74b94e 6502/65C02: Add power up reset generation (AlanD 65C02 core needs this)
Change-Id: I8e24d0f724dc353be296546815462feba8dffc4b
2019-10-17 11:25:32 +01:00
David Banks
1c44718f91 Seperate 6502 and 65c02 builds
Change-Id: I41af27c62e61a6490bda4da01da6e4f8740121fb
2019-10-16 20:40:15 +01:00
David Banks
131312e0e9 Multiboot: initial impl
Change-Id: I7efa2cf8079b4bfc1e89c5c26ecce30dfae34782
2019-10-16 15:49:58 +01:00
David Banks
ddaa266c12 z80: fix a T80 build error on Spartan 3
Change-Id: I6fca1eea44e1cc8e244d3d892ee25e0b7fea9eac
2019-10-15 16:28:55 +01:00
David Banks
f710f7a20f z80: updated T80 to version 350
Copyright (c) 2018 Sorgelig

Taken from https://github.com/EisernSchild/t80/commit/cbaa6450b

Changes I needed to make afterwards:
1. Fixup T80_Pack.vhd (missing params)
2. Replace T80a.vhd with my own version

Change-Id: I275153ffbddb0d9d5b2d8b1fdc2109468cafb256
2019-10-15 15:47:55 +01:00
David Banks
975ba22848 z80: temporarily disable IORQ_inhibit
The fixed unreliable IM2 interrupts on the Acorn Z80 Co Pro

Change-Id: Icd7e55a8a92391bd81218e9646bd243992677ce8
2019-10-15 11:48:32 +01:00
David Banks
5845409961 z80: added a resume state
This allows time for the paused instruction to be re-read

Without this, the Acorn Z80 Co Pro always seemed to be single
stepping NOP instructions.

Change-Id: I0bcb424293071efc0370b862854455a33f42faf2
2019-10-15 11:46:50 +01:00
David Banks
50658b358e z80: generate RFSH_n cycles when stopped
Change-Id: Ice9a78932bda74098cdde8d0a5571bc4bb784bb4
2019-10-14 20:26:04 +01:00
David Banks
d9d552475a z80: rework wait state / break point logic
Change-Id: I2b41c014165e8d753693d3ed7806087e85202a6e
2019-10-14 17:33:32 +01:00
David Banks
4c746994cb z80: major rewrite of memory access state machine
Change-Id: Icc5c7c991120ed155691c1e74517ac02f8ea2ada
2019-10-14 13:35:13 +01:00
David Banks
2a79bc6819 6809: Added special command to inhibit IRQ/FIRQ/NMI
Change-Id: I9b94fec5f464ecdb6bb0a4cd2a430401a182c929
2019-10-01 15:21:28 +01:00