Rafael Espindola
36ea4f0206
Add 132187 back now that the real problem is fixed.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132238 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-28 00:24:37 +00:00
Cameron Zwarich
de64aaf6c8
Fix the remaining atomic intrinsics to use the right register classes on Thumb2,
...
and add some basic tests for them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132235 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 23:54:00 +00:00
Bruno Cardoso Lopes
be64b39431
ARM asm parser wasn't able to parse a "mov" instruction while in Thumb
...
mode (only the "mov.w" variant). Now, when parsing "mov" in thumb mode,
default to the Thumb 1 versions/encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132233 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 23:46:09 +00:00
Rafael Espindola
157371f376
It looks like 132187 might have broken the llvm-gcc bootstrap. Revert while I check.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132230 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 23:36:02 +00:00
Cameron Zwarich
f5e771db37
Add a GR32_NOREX_NOSP register class and fix a bug where getMatchingSuperRegClass()
...
was saying that the matching superregister class of GR32_NOREX in GR64_NOREX_NOSP
is GR64_NOREX, which drops the NOSP constraint. This fixes PR10032.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132225 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 22:26:04 +00:00
Rafael Espindola
5b23b7fe31
Make size computation less brittle.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132222 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 22:05:41 +00:00
Evan Cheng
4abce0c90b
Don't use movw / movt for iOS static codegen for now to workaround some tools issues. rdar://9514789
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132211 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 20:11:27 +00:00
Jakob Stoklund Olesen
11f6cc96bf
Delete MethodBodies that only filtered reserved registers.
...
The register allocators know to filter reserved registers from the allocation
orders, so we don't need all of this boilerplate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132199 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 18:27:13 +00:00
Eli Friedman
a4d487fc1e
Fix a silly mistake (which trips over an assertion) in r132099. rdar://9515076
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132194 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 18:02:04 +00:00
Rafael Espindola
25b15d8502
Remove DwarfRegNum from the individual bits of the condition register.
...
These should be DW_OP_bit_piece of CR (64).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132192 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 16:15:27 +00:00
Rafael Espindola
81a2745830
Remove DwarfRegNum from CARRY. I should be encoded with DW_OP_bit_piece.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132190 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 16:01:08 +00:00
Rafael Espindola
81e193cc1f
Remove dwarf numbers from subregs. We should use DW_OP_bit_piece to
...
refer to them.
I tested this with both check-all and the gdb testsuite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132187 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 15:08:24 +00:00
Eric Christopher
33281b2361
Make the branch encoding for tBcc more obvious that it's a 4-byte opcode
...
followed by a conditional and imm8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132179 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 03:50:53 +00:00
Eric Christopher
86bbcbf4b0
Fix comment.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132178 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 03:46:51 +00:00
Chad Rosier
62660310d9
Renamed llvm.x86.sse42.crc32 intrinsics; crc64 doesn't exist.
...
crc32.[8|16|32] have been renamed to .crc32.32.[8|16|32] and
crc64.[8|16|32] have been renamed to .crc32.64.[8|64].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26 23:13:19 +00:00
Akira Hatanaka
33458fedb6
Use MachineFrameInfo::hasCalls instead of MipsFunctionInfo::hasCall to check if
...
a function has any function calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132140 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26 20:30:31 +00:00
Rafael Espindola
a5e62019d7
Fix some dwarf register numbers.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132136 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26 19:25:47 +00:00
Akira Hatanaka
cf0cd8005c
Add support for C++ exception handling.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132131 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26 18:59:03 +00:00
Eric Christopher
32bfb2c513
Reorganize these slightly according to operand type.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132128 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26 18:22:26 +00:00
Akira Hatanaka
78e72d60ec
Set HasSetDirective to true.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132127 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26 18:16:18 +00:00
Stuart Hastings
2aa0f23e1c
Reverting 132105: it broke some LLVM-GCC DejaGNU tests.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132108 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26 04:09:49 +00:00
Cameron Zwarich
421b106872
Mark tBX as an indirect branch rather than a return.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132107 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26 03:41:12 +00:00
Stuart Hastings
aa4e6afc9b
Correctly handle a one-word struct passed byval on x86_64.
...
rdar://problem/6920088
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132105 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26 02:44:56 +00:00
Eli Friedman
76927d7303
Rewrite fast-isel integer cast handling to handle more cases, and to be simpler and more consistent.
...
The practical effects here are that x86-64 fast-isel can now handle trunc from i8 to i1, and ARM fast-isel can handle many more constructs involving integers narrower than 32 bits (including loads, stores, and many integer casts).
rdar://9437928 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132099 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 23:49:02 +00:00
Akira Hatanaka
37d22d92df
Define WeakRefDirective.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132098 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 23:30:30 +00:00
Cameron Zwarich
ad70f6d2b1
Convert tBX_CALL / tBXr9_CALL to actual pseudoinstructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132086 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 21:53:50 +00:00
Eric Christopher
7bb1c40549
Clean up comment a bit.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132083 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 21:19:19 +00:00
Eric Christopher
8f89463894
Implement the 'm' modifier. Note that it only works for memory operands.
...
Part of rdar://9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132081 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 20:51:58 +00:00
Akira Hatanaka
d85b3ecbb3
Remove MipsTargetLowering::LowerFP_TO_SINT. Patterns for fp_to_sint have already
...
been defined in MipsInstrFPU.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132076 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 20:08:05 +00:00
Akira Hatanaka
9c3d57c45e
Custom-lower FCOPYSIGN nodes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132074 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 19:32:07 +00:00
Eli Friedman
783c66414a
Prepare ARMFastISel::SelectSIToFP for getRegForValue returning registers for i8 and i16 values.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132073 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 19:09:45 +00:00
Akira Hatanaka
4c62f765a3
Update MaxCallFrameSize regardless of the relocation model selected.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132070 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 18:08:32 +00:00
Akira Hatanaka
f15f498507
Change initial value of MaxCallFrameSize. MipsFI::getMaxCallFrameSize() should
...
return 0 if there are no function calls made.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132065 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 17:52:48 +00:00
Akira Hatanaka
edacba83dc
Coding style fixes. Added comments.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132063 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 17:32:06 +00:00
Francois Pichet
1b47720391
Remove unused OpcodeMask enumerator.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132062 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 17:02:53 +00:00
Francois Pichet
d9e57c146d
Fix MSVC warning: "is out of range for enum constant"
...
MSVC doesn't support 64 bit enum.
OpcodeMask is not used anywhere in the code base.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132057 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 15:58:10 +00:00
Cameron Zwarich
da86a08284
Restore an accidentally removed comment.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132044 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 04:48:17 +00:00
Cameron Zwarich
8e9bace414
Move some code to a more logical place.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132043 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 04:45:29 +00:00
Cameron Zwarich
106acd4158
Make tTAILJMPr/tTAILJMPrND emit a tBX without a preceding MOV of PC to LR. This
...
fixes <rdar://problem/9495913>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132042 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 04:45:27 +00:00
Cameron Zwarich
328634598f
Change the order of tBX's operands so that the predicate operands come after the
...
target register, matching BX. I filed this bug because I was confused at first:
PR10007 - ARM branch instructions have inconsistent predicate operand placement
<http://llvm.org/bugs/show_bug.cgi?id=10007 >
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132041 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 04:45:23 +00:00
Cameron Zwarich
8f161c3a95
Rename tBX_Rm to tBX.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132040 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 04:45:20 +00:00
Cameron Zwarich
b36c1ae6d5
Rename the existing tBX/tBXr9 instructions to tBX_CALL/tBXr9_CALL to better
...
reflect their actual meaning and match the ARM instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132039 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 04:45:14 +00:00
Rafael Espindola
fc2bb8c444
Replace the -unwind-tables option with a per function flag. This is more
...
LTO friendly as we can now correctly merge files compiled with or without
-fasynchronous-unwind-tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132033 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 03:44:17 +00:00
Akira Hatanaka
053546c31e
Fix lowering of DYNAMIC_STACKALLOC nodes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132030 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 02:20:00 +00:00
Bruno Cardoso Lopes
56926a3961
Fix PR9762
...
Enable the parsing of the operand "cpsr_all" for the ARM msr instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132026 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 00:35:03 +00:00
Eric Christopher
4db7dec70b
Implement the arm 'L' asm modifier.
...
Part of rdar://9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132024 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 23:27:13 +00:00
Eric Christopher
e1739d598d
Implement the immediate part of the 'B' modifier.
...
Part of rdar://9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132023 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 23:15:43 +00:00
Eric Christopher
fef50062ea
Add more unimplemented asm modifiers and some documentation of what they
...
do.
Part of rdar://9119939.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132015 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 22:27:43 +00:00
Eric Christopher
0628d38085
Add support for the arm 'y' asm modifier.
...
Fixes part of rdar://9444657
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132011 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 22:10:34 +00:00
Akira Hatanaka
ce98deb9f5
Enable printing of immediates that do not fit in 16-bit. .cprestore can have
...
offsets that are larger than 0x10000.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132003 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 21:22:21 +00:00
Akira Hatanaka
4231c7ea6d
Implement byval structure argument passing. The following limitations or
...
deficiencies exist:
- Works only if ABI is o32.
- Zero-sized structures cannot be passed.
- There is a lot of redundancy in generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131986 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 19:18:33 +00:00
Devang Patel
8ec0c1c07b
Remove dead code.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131974 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 18:27:52 +00:00
Charles Davis
6b918b8466
Add a method to TargetRegisterInfo to get the register number that the Win64 EH
...
scheme uses internally. Implement it for x86 (the only architecture that LLVM
supports for which this matters right now).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131969 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 16:57:53 +00:00
Evan Cheng
b5a55d979c
- Teach SelectionDAG::isKnownNeverZero to return true (op x, c) when c is
...
non-zero.
- Teach X86 cmov optimization to eliminate the cmov from ctlz, cttz extension
when the source of X86ISD::BSR / X86ISD::BSF is proven to be non-zero.
rdar://9490949
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131948 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 01:48:22 +00:00
Akira Hatanaka
b4d8d31e59
Simplify offset calculation of stack frame objects for $gp restore location and
...
variable arguments in LowerCall and LowerFormalArguments. This should also fix
the bug in which handling of variable arguments is incorrect when the front-end
optimizes away unused fixed arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131942 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 00:23:52 +00:00
Akira Hatanaka
46da136ec7
Expand f64 FPOW.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131928 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-23 22:23:58 +00:00
Akira Hatanaka
f89532f8f6
Add pattern for double-to-integer conversion. Patch by Sasa Stankovic.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131927 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-23 22:16:43 +00:00
Akira Hatanaka
bdd2ce9741
Fixes related to coding style.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131922 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-23 21:13:59 +00:00
Akira Hatanaka
f8928c07e7
Fix MipsAsmPrinter::printSavedRegsBitmaskChange. Remove functions and variables
...
in MipsFunctionInfo that are no longer used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131917 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-23 20:34:30 +00:00
Chris Lattner
32232fc2b5
clarify this, apparently it is confusing :)
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131916 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-23 20:17:44 +00:00
Akira Hatanaka
69c19f7316
Change StackDirection from StackGrowsUp to StackGrowsDown.
...
The following improvements are accomplished as a result of applying this patch:
- Fixed frame objects' offsets (relative to either the virtual frame pointer or
the stack pointer) are set before instruction selection is completed. There is
no need to wait until Prologue/Epilogue Insertion is run to set them.
- Calculation of final offsets of fixed frame objects is straightforward. It is
no longer necessary to assign negative offsets to fixed objects for incoming
arguments in order to distinguish them from the others.
- Since a fixed object has its relative offset set during instruction
selection, there is no need to conservatively set its alignment to 4.
- It is no longer necessary to reorder non-fixed frame objects in
MipsFrameLowering::adjustMipsStackFrame.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131915 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-23 20:16:59 +00:00
Cameron Zwarich
d34d429401
Fix <rdar://problem/9476260> by having tail calls always generate 32-bit branches
...
in Darwin Thumb2 code. Tail calls are already disabled on Thumb1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131894 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-23 01:57:17 +00:00
Chris Lattner
92f920c109
add a missing alias to make us more bug compatible with gcc, PR9378
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131874 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-22 22:31:57 +00:00
Renato Golin
1ec11fb8b5
RTABI chapter 4.3.4 specifies __eabi_mem* calls. Specifically, __eabi_memset accepts parameters (ptr, size, value) in a different order than GNU's memset (ptr, value, size), therefore the special lowering in AAPCS mode. Implementation by Evzen Muller.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131868 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-22 21:41:23 +00:00
Chris Lattner
87943e3698
add a note.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131863 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-22 18:28:46 +00:00
Johnny Chen
75f4296c7c
Fix Bug 9386 - ARM disassembler failed to disassemble conditional bx
...
Modified the patch to .td file supplied by Jyun-Yan You. Add a test case and
modified ARMDisassemblerCore.cpp a little bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131859 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-22 17:51:04 +00:00
Chris Lattner
b6fcf4cfbc
move PR9408 here.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131841 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-22 05:45:06 +00:00
Chris Lattner
40f5fbcc5c
add a copy ctor to TargetLibraryInfo.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131806 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-21 20:09:13 +00:00
Benjamin Kramer
b22da2a72c
X86: smulo -> add is now done target-independently in DAGCombiner, remove the patterns.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131801 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-21 18:32:01 +00:00
Cameron Zwarich
37fed38ec1
Fix PR9978 by adding RIP to GR64_TC so it can be used as an address in PIC code. It
...
is already in GR64 for the same reasons. Since it isn't allocatable it can't cause
any problems.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131787 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-21 04:13:49 +00:00
Akira Hatanaka
52106e1e25
Use the correct register to access stack frame objects.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131785 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-21 03:01:03 +00:00
Akira Hatanaka
f346c69530
Insert instructions that copy $sp to or from $fp at the right locations.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131784 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-21 02:29:26 +00:00
Akira Hatanaka
43299776d7
Change the order fixed objects are created in MipsTargetLowering::LowerCall in
...
preparation for reversing StackDirection.
Fixed objects are created in the following order:
1. Incoming arguments passed on stack.
2. va_arg objects (include both arguments that are passed in registers and
pointer to the location of the first va_arg argument).
3. $gp restore slot.
4. Outgoing arguments passed on stack.
5. Pointer to alloca'd space.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131767 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 23:22:14 +00:00
Eli Friedman
c088345f13
Add fast-isel support for byval calls on x86.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131764 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 22:21:04 +00:00
Akira Hatanaka
d37776d1c1
In CC_MipsO32, allocate a stack space regardless of whether the argument is
...
passed in register or on the stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131758 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 21:39:54 +00:00
Akira Hatanaka
6ffbf82e22
Define functions that get/set maximum call frame size.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131752 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 20:11:17 +00:00
Rafael Espindola
b8adb8af0f
adds some attributes to attribute section when cpu is "xscale"
...
(this is what used in Android NDK, when architecture is ARMv5)
patch by Koan-Sin Tan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131751 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 20:10:34 +00:00
Rafael Espindola
298c8e12ea
fixes target address tBL and tBLX and sets relocation type
...
of tBL/tBLX to R_ARM_THM_CALL (ARM ELF 4.7.1.6)
Patch by koan-sin tan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131748 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 20:01:01 +00:00
Stuart Hastings
0e29ed081b
Re-commit 131641 with fixes; de-pseudoize MOVSX16rr8 and friends.
...
rdar://problem/8614450
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131746 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 19:04:40 +00:00
Akira Hatanaka
17a1e87751
Make $fp and $ra callee-saved registers and let PrologEpilogInserter handle
...
saving and restoring them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131745 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 18:39:33 +00:00
Evan Cheng
0b65599015
Revert accidental commit.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131739 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 17:38:48 +00:00
Benjamin Kramer
eb274e6bdd
Rename the "sandybridge" subtarget to "corei7-avx", for GCC compatibility.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131730 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 15:11:26 +00:00
Benjamin Kramer
6e35e4c8c1
Remove noisy semicolons.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131724 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 09:20:25 +00:00
Akira Hatanaka
cd0f90f831
Fix bug in which nodes that write to argument registers do not get glued with the JALR node. Patch by Sasa Stankovic
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131714 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 02:30:51 +00:00
Akira Hatanaka
d992f6c666
Remove code that creates unnecessary frame objects.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131711 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 01:45:06 +00:00
Akira Hatanaka
da0a3571d6
Define variables and functions in MipsFunctionInfo.
...
This is the first of a series of patches that attempt to simplify handling of
stack frame objects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131710 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 01:17:58 +00:00
Chad Rosier
a166089f36
Don't attempt to tail call optimize for Win64.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131709 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 00:59:28 +00:00
Evan Cheng
2e6496026f
Revert r131664 and fix it in instcombine instead. rdar://9467055
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131708 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 00:54:37 +00:00
Eli Friedman
dc51575a5f
Add fast-isel support for zeroext and signext ret instructions on x86.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131689 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 22:16:13 +00:00
Eric Christopher
2bbecd8f6d
Oddly people want to use the 'r' constraint for fp constants on x86.
...
Fixes rdar://9218925
Fixes PR9601
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131682 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 21:33:47 +00:00
Jason W Kim
861b9c6a39
This fixes one divergence between LLVM and binutils for ARM in the
...
text section.
Assume the following bit of annotated assembly:
.section .data.rel.ro,"aw",%progbits
.align 2
.LAlpha:
.long startval(GOTOFF)
.text
.align 2
.type main,%function
.align 4
main: ;;; assume "main" starts at offset 0x20
0x0 push {r11, lr}
0x4 movw r0, :lower16:(.LAlpha-(.LBeta+8))
;;; ==> (.AddrOf(.LAlpha) - ((.AddrOf(.LBeta) - .AddrOf(".")) + 8)
;;; ==> (??? - ((16-4) + 8) = -20
0x8 movt r0, :upper16:(.LAlpha-(.LBeta+8))
;;; ==> (.AddrOf(.LAlpha) - ((.AddrOf(.LBeta) - .AddrOf(".")) + 8)
;;; ==> (??? - ((16-8) + 8) = -16
0xc ... blah
.LBeta:
0x10 add r0, pc, r0
0x14 ... blah
.LGamma:
0x18 add r1, pc, r1
Above snippet results in the following relocs in the .o file for the
first pair of movw/movt instructions
00000024 R_ARM_MOVW_PREL_NC .LAlpha
00000028 R_ARM_MOVT_PREL .LAlpha
And the encoded instructions in the .o file for main: must be
00000020 <main>:
20: e92d4800 push {fp, lr}
24: e30f0fec movw r0, #65516 ; 0xffec i.e. -20
28: e34f0ff0 movt r0, #65520 ; 0xfff0 i.e. -16
However, llc (prior to this commit) generates the following sequence
00000020 <main>:
20: e92d4800 push {fp, lr}
24: e30f0fec movw r0, #65516 ; 0xffec - i.e. -20
28: e34f0fff movt r0, #65535 ; 0xffff - i.e. -1
What has to happen in the ArmAsmBackend is that if the relocation is PC
relative, the 16 bits encoded as part of movw and movt must be both addends,
not addresses. It makes sense to encode addresses by right shifting the value
by 16, but the result is incorrect for PIC.
i.e., the right shift by 16 for movt is ONLY valid for the NON-PCRel case.
This change agrees with what GNU as does, and makes the PIC code run.
MC/ARM/elf-movt.s covers this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131674 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 20:55:25 +00:00
Rafael Espindola
a3bff99f0a
ADD64ri32 sign extends its argument, so we need to use a R_X86_64_32S.
...
Fixes PR9934.
We really need to start tblgening the relocation info :-(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131669 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 20:32:34 +00:00
Akira Hatanaka
a1a7ba8382
Align i64 arguments to 64 bit boundaries.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131668 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 20:29:48 +00:00
Evan Cheng
0efaa5e6a1
crc32 with 64-bit output zeros upper 32-bits. rdar://9467055
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131664 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 18:57:12 +00:00
Akira Hatanaka
59d266029c
Increase number of available registers when target is MIPS32.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131660 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 18:25:03 +00:00
Akira Hatanaka
95b8ae190e
Simplify CC_MipsO32 and merge it with CC_MipsO32_VarArgs. Patch by Sasa Stankovic.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131657 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 18:06:05 +00:00
Stuart Hastings
d22f036c2a
Reverting 131641 to investigate 'bot complaint.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131654 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 17:54:42 +00:00
Jim Grosbach
6635b04a43
80 columns.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131649 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 17:34:53 +00:00
Akira Hatanaka
d48cfaec35
Fix data layout string. i64 is aligned to 64 bit boundaries.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131642 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 17:21:09 +00:00
Stuart Hastings
b6dcf3c514
Revise MOVSX16rr8/MOVZX16rr8 (and rm variants) to no longer be
...
pseudos. rdar://problem/8614450
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131641 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 16:59:50 +00:00