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264 Commits

Author SHA1 Message Date
Owen Anderson
cfd0e1f3ae Add correct NEON encodings for vtbl and vtbx. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117513 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 00:18:46 +00:00
Owen Anderson
3eff4af42d Add correct NEON encodings for vext, vtrn, vuzp, and vzip. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117512 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 23:56:39 +00:00
Owen Anderson
498ec20703 Provide correct encodings for NEON vcvt, which has its own special immediate encoding 
for specifying fractional bits for fixed point conversions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117501 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 22:49:00 +00:00
Owen Anderson
d2fbdb7f5c Provide correct encodings for the get_lane and set_lane variants of vmov. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117495 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 21:28:09 +00:00
Owen Anderson
f587a9352a Provide correct NEON encodings for vdup. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117475 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 19:25:54 +00:00
Owen Anderson
0745c389d9 Add correct NEON encodings for vsli and vsri. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117459 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 17:40:08 +00:00
Owen Anderson
dd31ed67e6 Add correct NEON encodings for vsra and vrsra. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117458 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 17:29:29 +00:00
Owen Anderson
86ed2324a6 Add correct NEON encodings for vqshl, vqshrn, vqshrun, vqrshl, vqshrn, and vqrshrun. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117411 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 22:50:46 +00:00
Owen Anderson
632c235a31 Correct NEON encodings for vshrn, vrshl, vrshr, vrshrn. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117402 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 21:58:41 +00:00
Owen Anderson
ac92262b61 Simplify classes for shift instructions, which are never commutable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117398 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 21:13:59 +00:00
Owen Anderson
3557d00a38 Provide correct NEON encodings for vshl, register and immediate forms. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117394 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 20:56:57 +00:00
Owen Anderson
bc4118bd36 Add correct NEON encoding for vpadal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117380 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 18:18:03 +00:00
Owen Anderson
a88ea03bf2 Add NEON encodings for vmov and vmvn of immediates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117374 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 17:40:54 +00:00
Owen Anderson
5258b61966 Add correct encodings for NEON vabal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117315 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 21:29:04 +00:00
Owen Anderson
410aebc670 Add correct NEON encodings for vaba. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117309 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 20:52:57 +00:00
Owen Anderson
31e6ed890a Attempt to provide correct encodings for NEON vbit and vbif, even though we can't test them at the moment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117294 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 20:17:22 +00:00
Owen Anderson
4110b4325d Provide correct NEON encodings for vbsl. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117293 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 20:13:13 +00:00
Owen Anderson
162875a9f3 Add correct instruction encodings for vbic, vorn, and vmvn. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117282 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 18:43:52 +00:00
Owen Anderson
d0c5b6170f Add NEON encoding tests for vcgt and vacgt. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117276 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 18:03:59 +00:00
Owen Anderson
10c15e5d58 Add tests for NEON encodings of vcge and vacge. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117274 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 17:49:32 +00:00
Owen Anderson
4fe20bbd66 Add a warning about our inability to test the encoding of vceq with immediate zero. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117273 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 17:33:02 +00:00
Owen Anderson
9b26497273 Add correct NEON encodings for vqdmlal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117134 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-22 19:35:48 +00:00
Owen Anderson
92205842ca Provide correct encodings for NEON vmlal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117131 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-22 19:05:25 +00:00
Owen Anderson
18341e9e31 Provide correct NEON encodings for vmla. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117126 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-22 18:54:37 +00:00
Owen Anderson
d451f888b8 ARM encodes Q registers as 2xregno (i.e. the number of the D register that corresponds to the lower 
half of the Q register), rather than with just regno.  This allows us to unify the encodings for
a lot of different NEON instrucitons that differ only in whether they have Q or D register operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117056 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 20:21:49 +00:00
Owen Anderson
1e93466c3a Add correct NEON encodings for vhadd and vrhadd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117047 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 18:55:04 +00:00
Owen Anderson
9d50559bae Add correct encodings for NEON vaddw.s* and vaddw.u*. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117040 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 18:20:25 +00:00
Owen Anderson
e0e6dc3f4e Provide correct NEON encodings for vaddl.u* and vaddl.s*. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117039 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 18:09:17 +00:00
Owen Anderson
d7795540d0 Implement correct encodings for NEON vadd, both integer and floating point. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116981 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 00:48:00 +00:00
Jim Grosbach
95369599c6 A few 80 column fixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116451 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 23:34:31 +00:00
Evan Cheng
08cec1ef27 More ARM scheduling itinerary fixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116266 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-11 23:41:41 +00:00
Evan Cheng
60ff87914f Proper VST scheduling itineraries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116251 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-11 22:03:18 +00:00
Evan Cheng
10dc63feeb Add VLD4 scheduling itineraries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116143 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-09 04:07:58 +00:00
Evan Cheng
84f69e8436 Finish vld3 and vld4. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116140 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-09 01:45:34 +00:00
Evan Cheng
d2ca813549 Correct some load / store instruction itinerary mistakes: 
1. Cortex-A8 load / store multiplies can only issue on ALU0.
2. Eliminate A8_Issue, A8_LSPipe will correctly limit the load / store issues.
3. Correctly model all vld1 and vld2 variants.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116134 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-09 01:03:04 +00:00
Evan Cheng
5a50ceeaea Model operand cycles of vldm / vstm; also fixes scheduling itineraries of vldr / vstr, etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115898 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 01:50:48 +00:00
Jim Grosbach
65dc30340c Change the NEON VDUPfdf and VDUPfqf pseudo-instructions to actually be 
pseudo instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115840 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 21:16:16 +00:00
Jim Grosbach
7cd2729d2a Add a 'pattern' arg to the ARM PseudoNeonI class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115831 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 20:36:55 +00:00
Jim Grosbach
78890f41f4 Nuke the rest of the :comment references 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115373 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 23:21:38 +00:00
Evan Cheng
ef0ccad725 Fix scheduling infor for vmovn and vshrn which I broke accidentially. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115354 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 21:48:06 +00:00
Evan Cheng
cae6a12a99 NEON scheduling info fix. vmov reg, reg are single cycle instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115344 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 20:50:58 +00:00
Bob Wilson
9d4ebc0eb8 Change VLDMQ and VSTMQ to be pseudo instructions. They are expanded after 
register allocation to VLDMD and VSTMD respectively.  This avoids using the
dregpair operand modifier.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114047 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 00:31:02 +00:00
Bob Wilson
168f382dc6 Use VLD1/VST1 pseudo instructions for loadRegFromStackSlot and 
storeRegToStackSlot.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113918 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-15 01:48:05 +00:00
Jim Grosbach
05ae0c6026 Reapply r113875 with additional cleanups. 
"The register specified for a dregpair is the corresponding Q register, so to
get the pair, we need to look up the sub-regs based on the qreg. Create a
lookup function since we don't have access to TargetRegisterInfo here to
be able to use getSubReg(ARM::dsub_[01])."

Additionaly, fix the NEON VLD1* and VST1* instruction patterns not to use
the dregpair modifier for the 2xdreg versions. Explicitly specifying the two
registers as operands is more correct and more consistent with the other
instruction patterns. This enables further cleanup of special case code in the
disassembler as a nice side-effect.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113903 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-14 23:54:06 +00:00
Bob Wilson
9d84fb3c91 Make NEON ld/st pseudo instruction classes take the instruction itinerary as 
an argument, so that we can distinguish instructions with the same register
classes but different numbers of registers (e.g., vld3 and vld4).  Fix some
of the non-pseudo NEON ld/st instruction itineraries to reflect the number
of registers loaded or stored, not just the opcode name.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113854 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-14 20:59:49 +00:00
Bob Wilson
bd916c54b7 Convert some VTBL and VTBX instructions to use pseudo instructions prior to 
register allocation.  Remove the NEONPreAllocPass, which is no longer needed.
Yeah!!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113818 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-13 23:55:10 +00:00
Bob Wilson
8466fa1842 Switch all the NEON vld-lane and vst-lane instructions over to the new 
pseudo-instruction approach.  Change ARMExpandPseudoInsts to use a table
to record all the NEON load/store information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113812 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-13 23:01:35 +00:00
Bob Wilson
0f1e9457a5 Fix NEON VLD pseudo instruction itineraries that were incorrectly copied from 
the VST pseudos.  The VLD/VST scheduling still needs work (see pr6722), but
at least we shouldn't confuse the loads with the stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113473 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-09 05:40:26 +00:00
Jim Grosbach
72db182438 VFP/NEON load/store multiple instructions are addrmode4, not 5. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113322 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 00:25:50 +00:00
Bob Wilson
f572191fe4 Finish converting the rest of the NEON VLD instructions to use pseudo- 
instructions prior to regalloc.  Since it's getting a little close to
the 2.8 branch deadline, I'll have to leave the rest of the instructions
handled by the NEONPreAllocPass for now, but I didn't want to leave half
of the VLD instructions converted and the other half not.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112983 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-03 18:16:02 +00:00