Benjamin Kramer
90869455b5
Eliminate some redundant llvm-as calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83837 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-12 09:31:55 +00:00
Anton Korobeynikov
436604d505
Add missed mem-mem move patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83812 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-11 23:03:53 +00:00
Anton Korobeynikov
afac8abfc0
Add MSP430 mem-mem insts support. Patch by Brian Lucas with some my refinements
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83811 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-11 23:03:28 +00:00
Anton Korobeynikov
aca471f3a5
Add bunch of MSP430 'feature' tests. Patch by Brian Lucas with some my refinements
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83809 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-11 23:02:38 +00:00
Anton Korobeynikov
95eb470ce1
Implement 'm' memory operand properly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83785 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-11 19:14:21 +00:00
Anton Korobeynikov
8f8e9f0830
It seems that OR operation does not affect status reg at all.
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Remove impdef of SRW. This fixes PR4779
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83739 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-10 22:17:47 +00:00
Dan Gohman
cda49a0b29
Update this test; the code is the same but it gets counted as one
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fewer remat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83690 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 23:31:04 +00:00
Dan Gohman
11596ed43c
Fix the x86 test-shrink optimization so that it doesn't shrink comparisons
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when one of the bits being tested would end up being the sign bit in the
narrower type, and a signed comparison is being performed, since this would
change the result of the signed comparison. This fixes PR5132.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83670 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 20:35:19 +00:00
Bob Wilson
83815aeb29
Merge a bunch of NEON tests into larger files so they run faster.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83667 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 20:20:54 +00:00
Bob Wilson
e8e72be33a
Convert some ARM tests with lots of greps to use FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83651 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 17:20:46 +00:00
Evan Cheng
3dc326ba83
Fix a logic error that caused non-rematable loop invariants loads to be licm'ed out of loop.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83622 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 06:21:52 +00:00
Bob Wilson
8795070d50
Commit one last NEON test to use FileCheck. That's all of them now!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83617 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 05:31:56 +00:00
Bob Wilson
0305dd745e
Convert more NEON tests to use FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83616 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 05:14:48 +00:00
Evan Cheng
35ca9203f2
Reset kill markers after live interval is reconstructed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83608 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 01:17:11 +00:00
Bob Wilson
5631139a69
Add codegen support for NEON vst4lane intrinsics with 128-bit vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83600 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 00:01:36 +00:00
Bob Wilson
8cdb269686
Add codegen support for NEON vst3lane intrinsics with 128-bit vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83598 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 23:51:31 +00:00
Bob Wilson
c5c6edb74f
Add codegen support for NEON vst2lane intrinsics with 128-bit vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83596 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 23:38:24 +00:00
Bob Wilson
4cf0189d5a
Convert more NEON tests to use FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83595 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 23:33:03 +00:00
Bob Wilson
62e053e5a1
Add codegen support for NEON vld4lane intrinsics with 128-bit vectors.
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Also fix some copy-and-paste errors in previous changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83590 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 22:53:57 +00:00
Bob Wilson
5d78275493
Convert more NEON tests to use FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83587 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 22:33:53 +00:00
Bob Wilson
0bf7d998b4
Add codegen support for NEON vld3lane intrinsics with 128-bit vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83585 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 22:27:33 +00:00
Anton Korobeynikov
632606c724
Use lower16 / upper16 imm modifiers to asmprint 32-bit imms splitted via movt/movw pair.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83572 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 20:43:22 +00:00
Bob Wilson
30aea9d96e
Add codegen support for NEON vld2lane intrinsics with 128-bit vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83568 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 18:56:10 +00:00
Richard Osborne
c96c8e0e81
Add some peepholes for signed comparisons using ashr X, X, 32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83549 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 15:38:17 +00:00
Bob Wilson
67a6103a34
Convert more NEON tests to use FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83528 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 06:02:10 +00:00
Bob Wilson
deb3141cf5
Add codegen support for NEON vst4 intrinsics with <1 x i64> vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83526 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 05:18:18 +00:00
Bob Wilson
5adf60c03b
Add codegen support for NEON vst3 intrinsics with <1 x i64> vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83518 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 00:28:28 +00:00
Bob Wilson
24e04c535f
Add codegen support for NEON vst2 intrinsics with <1 x i64> vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83513 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 00:21:01 +00:00
Bob Wilson
0ea38bb939
Add codegen support for NEON vld4 intrinsics with <1 x i64> vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83508 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 23:54:04 +00:00
Bob Wilson
fe27c512e8
Convert more NEON tests to use FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83507 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 23:47:21 +00:00
Bob Wilson
c67160c010
Add codegen support for NEON vld3 intrinsics with <1 x i64> vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83506 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 23:39:57 +00:00
Bob Wilson
a4288080e6
Add codegen support for NEON vld2 intrinsics with <1 x i64> vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83502 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 22:57:01 +00:00
Dale Johannesen
5f3663e51d
Fix handling of x86 'R' constraint.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83499 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 22:47:20 +00:00
Bob Wilson
b2cae81ac4
Convert more NEON tests to use FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83497 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 22:30:19 +00:00
Bob Wilson
99c372e723
Convert test to FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83487 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 20:51:42 +00:00
Bob Wilson
63c9063434
Add codegen support for NEON vst4 intrinsics with 128-bit vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83486 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 20:49:18 +00:00
Bob Wilson
66a70639da
Add codegen support for NEON vst3 intrinsics with 128-bit vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83484 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 20:30:08 +00:00
Bob Wilson
d285575f87
Add codegen support for NEON vst2 intrinsics with 128-bit vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83482 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 18:47:39 +00:00
Bob Wilson
7708c22baa
Add codegen support for NEON vld4 intrinsics with 128-bit vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83479 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 18:09:32 +00:00
Bob Wilson
ff8952e8a9
Add codegen support for NEON vld3 intrinsics with 128-bit vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83471 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 17:24:55 +00:00
Bob Wilson
967f87578d
Add tests for vld2 of 128-bit vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83468 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 17:19:13 +00:00
Bob Wilson
ec1d81c389
Update NEON struct names to match llvm-gcc changes.
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(This is not required for correctness but might help with sanity.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83415 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-06 21:16:19 +00:00
Dan Gohman
e3cc3f3c84
Instead of printing unnecessary basic block labels as labels in
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verbose-asm mode, print comments instead. This eliminates a non-comment
difference between verbose-asm mode and non-verbose-asm mode.
Also, factor out the relevant code out of all the targets and into
target-independent code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83392 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-06 17:38:38 +00:00
Evan Cheng
3825ce8c24
Fix tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83241 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-02 06:53:57 +00:00
Evan Cheng
892597943a
Forgot about ARM::tPUSH. It also has a new writeback operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83237 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-02 05:03:07 +00:00
Evan Cheng
62a1b5db44
Move load / store multiple before post-alloc scheduling.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83236 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-02 04:57:15 +00:00
David Goodwin
9843a93e83
Remove neonfp attribute and instead set default based on CPU string. Add -arm-use-neon-fp to override the default.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83218 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-01 22:19:57 +00:00
David Goodwin
471850ab84
Restore the -post-RA-scheduler flag as an override for the target specification. Remove -mattr for setting PostRAScheduler enable and instead use CPU string.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83215 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-01 21:46:35 +00:00
Evan Cheng
10469f8e48
ARM::tPOP and tPOP_RET each has an extra writeback operand now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83214 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-01 20:54:53 +00:00
Evan Cheng
48af260bb1
Forgot this test earlier.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83143 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-30 08:41:27 +00:00
David Goodwin
413738ee8c
Remove regression that requires post-RA scheduling from a target that does not use that scheduler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83128 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-30 00:23:57 +00:00
David Goodwin
0dad89fa94
Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83122 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-30 00:10:16 +00:00
David Goodwin
8971c4a30e
Post-RA regressions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83075 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-29 17:10:26 +00:00
Evan Cheng
fa1be5d991
Fix PR4687. Pre ARMv5te does not support ldrd / strd. Patch by John Tytgat.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83058 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-29 07:07:30 +00:00
Dan Gohman
8c050fadf6
Add a CHECK line to check the position of the second divsd.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83009 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-28 20:48:39 +00:00
Evan Cheng
5adb66a646
Make ARM and Thumb2 32-bit immediate materialization into a single 32-bit pseudo
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instruction. This makes it re-materializable.
Thumb2 will split it back out into two instructions so IT pass will generate the
right mask. Also, this expose opportunies to optimize the movw to a 16-bit move.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82982 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-28 09:14:39 +00:00
Evan Cheng
0e6b590b91
Coalescer should not delete extract_subreg, insert_subreg, and subreg_to_reg of
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physical registers. This is especially critical for the later two since they
start the live interval of a super-register. e.g.
%DO<def> = INSERT_SUBREG %D0<undef>, %S0<kill>, 1
If this instruction is eliminated, the register scavenger will not be happy as
D0 is not defined previously.
This fixes PR5055.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82968 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-28 05:28:43 +00:00
Anton Korobeynikov
6a2fa325c1
Use movt/movw pair to materialize 32 bit constants on ARMv6T2+.
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This should be better than single load from constpool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82948 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-27 23:52:58 +00:00
Evan Cheng
e298ab26b1
Enable pre-regalloc load / store multiple pass for Thumb2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82893 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-27 09:46:04 +00:00
Chris Lattner
eec96958cd
implement and document support for filecheck variables. This
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allows matching and remembering a string and then matching and
verifying that the string occurs later in the file.
Change X86/xor.ll to use this in some cases where the test was
checking for an arbitrary register allocation decision.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82891 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-27 07:56:52 +00:00
Evan Cheng
2fcf85efe7
Remove this test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82869 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-26 18:51:37 +00:00
Dan Gohman
11eab02b77
Convert comparisons like (x == infinity) to (x >= infinity) on targets
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where FCMP_OEQ is not legal and FCMP_OGE is, such as x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82861 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-26 15:24:17 +00:00
Daniel Dunbar
c8e9314a41
"Update" tests for -disable-if-conversion removal. I think branch.ll should just
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be removed, but I XFAIL'd it for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82847 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-26 05:29:36 +00:00
Evan Cheng
9fde6ca2c7
Convert test to filecheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82835 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-26 02:41:17 +00:00
Dan Gohman
a8fb336c2e
Unbreak MachineLICM for instructions that reference RIP on x86-64 too.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82825 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-25 23:58:45 +00:00
Dan Gohman
19778e7558
Fix MachineSink to be able to sink instructions that use physical registers
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which have no defs anywhere in the function. In particular, this fixes sinking
of instructions that reference RIP on x86-64, which is currently being modeled
as a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82815 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-25 22:53:29 +00:00
Evan Cheng
483011018e
Flip -disable-post-RA-scheduler to -post-RA-scheduler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82803 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-25 21:38:11 +00:00
Dan Gohman
c76909abfe
Improve MachineMemOperand handling.
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- Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions.
This eliminates MachineInstr's std::list member and allows the data to be
created by isel and live for the remainder of codegen, avoiding a lot of
copying and unnecessary translation. This also shrinks MemSDNode.
- Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated
fields for MachineMemOperands.
- Change MemSDNode to have a MachineMemOperand member instead of its own
fields with the same information. This introduces some redundancy, but
it's more consistent with what MachineInstr will eventually want.
- Ignore alignment when searching for redundant loads for CSE, but remember
the greatest alignment.
Target-specific code which previously used MemOperandSDNodes with generic
SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range
so that the SelectionDAG framework knows that MachineMemOperand information
is available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82794 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-25 20:36:54 +00:00
Dale Johannesen
1d73742ad9
Add readonly to some sin and cos calls; transformations
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being checked aren't valid without it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82786 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-25 18:15:29 +00:00
Chris Lattner
5d6a05f4d4
reimplement the regex matching strategy by building a single
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regex and matching it instead of trying to match chunks at a time.
Matching chunks at a time broke with check lines like
CHECK: foo {{.*}}bar
because the .* would eat the entire rest of the line and bar would
never match.
Now we just escape the fixed strings for the user, so that something
like:
CHECK: a() {{.*}}???
is matched as:
CHECK: {{a\(\) .*\?\?\?}}
transparently "under the covers".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82779 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-25 17:23:43 +00:00
Bob Wilson
0035f9c3b9
pr4926: ARM requires the stack pointer to be aligned, even for leaf functions.
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For the AAPCS ABI, SP must always be 4-byte aligned, and at any "public
interface" it must be 8-byte aligned. For the older ARM APCS ABI, the stack
alignment is just always 4 bytes. For X86, we currently align SP at
entry to a function (e.g., to 16 bytes for Darwin), but no stack alignment
is needed at other times, such as for a leaf function.
After discussing this with Dan, I decided to go with the approach of adding
a new "TransientStackAlignment" field to TargetFrameInfo. This value
specifies the stack alignment that must be maintained even in between calls.
It defaults to 1 except for ARM, where it is 4. (Some other targets may
also want to set this if they have similar stack requirements. It's not
currently required for PPC because it sets targetHandlesStackFrameRounding
and handles the alignment in target-specific code.) The existing StackAlignment
value specifies the alignment upon entry to a function, which is how we've
been using it anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82767 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-25 14:41:49 +00:00
Chris Lattner
5d7c79d9c6
convert testcases to filecheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82759 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-25 06:49:41 +00:00
Chris Lattner
0f427ac24c
remove a large unreduced testcase
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82756 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-25 06:37:22 +00:00
Bob Wilson
08ae76c042
Convert to FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82710 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-24 20:23:02 +00:00
Dan Gohman
3c98fefa35
Add nounwind to this test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82708 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-24 20:20:08 +00:00
Evan Cheng
393e277ecd
Fix PR5024 with a big hammer: disable the double-def assertion in the scavenger.
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LiveVariables add implicit kills to correctly track partial register kills. This works well enough and is fairly accurate. But coalescer can make it impossible to maintain these markers. e.g.
BL <ga:sss1>, %R0<kill,undef>, %S0<kill>, %R0<imp-def>, %R1<imp-def,dead>, %R2<imp-def,dead>, %R3<imp-def,dead>, %R12<imp-def,dead>, %LR<imp-def,dead>, %D0<imp-def>, ...
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%reg1031<def> = FLDS <cp#1>, 0, 14, %reg0, Mem:LD4[ConstantPool]
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%S0<def> = FCPYS %reg1031<kill>, 14, %reg0, %D0<imp-use,kill>
When reg1031 and S0 are coalesced, the copy (FCPYS) will be eliminated the the implicit-kill of D0 is lost. In this case it's possible to move the marker to the FLDS. But in many cases, this is not possible. Suppose
%reg1031<def> = FOO <cp#1>, %D0<imp-def>
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%S0<def> = FCPYS %reg1031<kill>, 14, %reg0, %D0<imp-use,kill>
When FCPYS goes away, the definition of S0 is the "FOO" instruction. However, transferring the D0 implicit-kill to FOO doesn't work since it is the def of D0 itself. We need to fix this in another time by introducing a "kill" pseudo instruction to track liveness.
Disabling the assertion is not ideal, but machine verifier is doing that job now. It's important to know double-def is not a miscomputation since it means a register should be free but it's not tracked as free. It's a performance issue instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82677 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-24 02:27:09 +00:00
Evan Cheng
ad934b821c
Clean up LiveVariables and change how it deals with partial updates and kills. This also eliminate the horrible check which scan forward to the end of the basic block. It should be faster and more accurate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82676 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-24 02:15:22 +00:00
Evan Cheng
79997912a7
Add nounwind.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82637 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-23 18:20:27 +00:00
Evan Cheng
296925dc16
Fix PR5024. LiveVariables physical register defs should *commit* only after all
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of the defs are processed.
Also fix a implicit_def propagation bug: a implicit_def of a physical register
should be applied to uses of the sub-registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82616 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-23 06:28:31 +00:00
Evan Cheng
f7cd853071
Fix a obvious logic error.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82610 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-23 05:23:19 +00:00
Evan Cheng
60c7df2c93
Fix PR5024. LiveVariables::FindLastPartialDef should return a set of sub-registers that were defined by the last partial def, not just a single sub-register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82535 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-22 08:34:46 +00:00
Evan Cheng
014d624a28
Fix a pasto. Also simplify for Bill's benefit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82505 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-22 01:48:19 +00:00
Evan Cheng
cf985a9545
Clean up spill weight computation. Also some changes to give loop induction
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variable increment / decrement slighter high priority.
This has major impact on some micro-benchmarks. On MultiSource/Applications
and spec tests, it's a minor win. It also reduce 256.bzip instruction count
by 8%, 55 on 164.gzip on i386 / Darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82485 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-21 21:12:25 +00:00
Dan Gohman
78a130a31c
Add a comment mentioning the rdar number associated with this test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82471 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-21 18:32:20 +00:00
Dan Gohman
4a0b3e170d
Add support for rematerializing FsFLD0SS and FsFLD0SD as constant-pool
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loads in order to reduce register pressure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82470 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-21 18:30:38 +00:00
Dan Gohman
670e53977b
Recognize SSE min and max opportunities in even more cases.
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And fix a bug with the behavior of min/max instructions formed from
fcmp uge comparisons.
Also, use FiniteOnlyFPMath() for this code instead of UnsafeFPMath,
as it is more specific.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82466 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-21 18:03:22 +00:00
Evan Cheng
b0f5973bee
Fix PR4986. "r1024 = insert_subreg r1024, undef, 2" cannot be turned in an implicit_def. Instead, it's an identity copy so it should be eliminated. Also make sure to update livevariable kill information.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82436 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-21 04:32:32 +00:00
Dale Johannesen
39faac2531
When computing live intervals for earlyclobber operands,
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we pushed the beginning of the interval back 1, so the
interval would overlap with inputs that die. We were
also pushing the end of the interval back 1, though,
which means the earlyclobber didn't overlap with other
output operands. Don't do this. PR 4964.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82342 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-20 00:36:41 +00:00
Evan Cheng
ce31910eae
Fix PR4926. When target hook EmitInstrWithCustomInserter() insert new basic blocks and update CFG, it should also inform sdisel of the changes so the phi source operands will come from the right basic blocks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82311 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-19 09:51:03 +00:00
Dan Gohman
d268e00938
Delete the label names from this test to make it less fragile.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82276 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-18 21:23:12 +00:00
Chris Lattner
228252f981
Make a new X8632_MachoTargetObjectFile TLOF implementation whose
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getSymbolForDwarfGlobalReference is smart enough to know that it
needs to register the stub it references with MachineModuleInfoMachO,
so that it gets emitted at the end of the file.
Move stub emission from X86ATTAsmPrinter::doFinalization to the
new X86ATTAsmPrinter::EmitEndOfAsmFile asmprinter hook. The important
thing here is that EmitEndOfAsmFile is called *after* the ehframes are
emitted, so we get all the stubs.
This allows us to remove a gross hack from the asmprinter where it would
"just know" that it needed to output stubs for personality functions.
Now this is all driven from a consistent interface.
The testcase change is just reordering the expected output now that the
stubs come out after the ehframe instead of before.
This also unblocks other changes that Bill wants to make.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82269 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-18 20:22:52 +00:00
Dale Johannesen
8dffc819c5
Model the carry bit on ppc32. Without this we could
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move a SUBFC (etc.) below the SUBFE (etc.) that consumed
the carry bit. Add missing ADDIC8, noticed along the way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82266 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-18 20:15:22 +00:00
Dan Gohman
e220c4b3d9
Add support for using the FLAGS result of or, xor, and and instructions
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on x86, to avoid explicit test instructions. A few existing tests changed
due to arbitrary register allocation differences.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82263 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-18 19:59:53 +00:00
Anton Korobeynikov
c6f729ed55
Allow symbols to start from the digit if target requests it. This allows, e.g. pinning
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variables to specified absolute address. Make use of this feature for MSP430.
This unbreaks PR4776.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82227 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-18 16:57:42 +00:00
Chris Lattner
4aebc9d8c7
make this testcase check darwin32 also
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82182 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-17 23:56:41 +00:00
Chris Lattner
7ea9890962
rename test
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82181 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-17 23:55:12 +00:00
Chris Lattner
20397179ad
convert to filecheck
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82179 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-17 23:54:26 +00:00
Chris Lattner
3aaf740424
rename file
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82178 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-17 23:42:06 +00:00
Daniel Dunbar
f194d627d5
Remove test cases using -regalloc=simple.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82130 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-17 06:37:07 +00:00
Evan Cheng
5cf732e3b1
Fix PR4910: Broken logic in coalescer means when a physical register liveness is being shortened, the sub-registers were not. The symptom is the register allocator could not find a free register for this particular test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82108 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-17 00:57:15 +00:00
Bob Wilson
9b379dc526
Convert more tests to FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81915 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 20:58:02 +00:00
Chris Lattner
dffb6e5aee
fix PR4984 by ensuring that fastisel adds properly sign extended GEP displacement
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values to machineinstrs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81886 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 18:27:02 +00:00
Chris Lattner
371b8fc41c
rename test
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81884 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 18:23:37 +00:00
Chris Lattner
25519ddc2d
convert to filecheck
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81882 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 18:23:23 +00:00
Sandeep Patel
85111a9c07
Fix superreg use in ARMAsmPrinter. Approved by Anton Korobeynikov.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81878 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 17:53:11 +00:00
Chris Lattner
db486a6d53
several major improvements to the sparc backend: support for weak linkage
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and PIC codegen. Patch by Venkatraman Govindaraju!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81877 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 17:46:24 +00:00
Dan Gohman
a5f4dbf111
Restore a comment that was lost in the merge.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81857 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 15:09:54 +00:00
Chris Lattner
c059f04758
this is failing on linux hosts, force a triple.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81833 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 04:27:29 +00:00
Chris Lattner
3d76d11866
merge one more in.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81824 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 02:27:23 +00:00
Chris Lattner
9f052ab161
merge some more cmov tests into cmov.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81823 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 02:25:21 +00:00
Chris Lattner
5f52cf8bb7
merge two cmov tests into one.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81822 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 02:22:47 +00:00
Dan Gohman
1e038a8494
Don't pull a load through a callseq_start if the load's chain
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has multiple uses, as one of the other uses may be on a path
to a different node above the callseq_start, because that
leads to a cyclic graph. This problem is exposed when
-combiner-global-alias-analysis is used. This fixes PR4880.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81821 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 01:22:01 +00:00
Dan Gohman
907355caf8
On x86-64, the 32-bit cmov doesn't actually clear the high 32-bit of
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its result if the condition is false.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81814 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 00:14:11 +00:00
Chris Lattner
4c66f729c9
merge the linux cpool/jtbl pic tests into pic.ll and convert to filecheck.
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Change the picbase symbol on non-darwin systems from ".Lllvm$4.$piclabel" to
".L4$pb". The actual name doesn't matter and the darwin name is shorter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81688 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-13 18:46:37 +00:00
Anton Korobeynikov
20c35ec427
Define proper subreg sets for arm - this should fix bunch of subtle problems
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with subreg - superreg mapping and also fix PR4965.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81657 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-13 00:59:43 +00:00
Dan Gohman
d11c4de5ce
Add -mattr=+sse2 to the -march=x86 version of this test. Without
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sse, this code falls back to SelectionDAG isel which uses an x87
instruction, which is fine, but not what this test is testing for.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81656 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-12 23:45:47 +00:00
Dan Gohman
55a7877cac
Remove an unnecessary -f.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81546 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-11 18:41:06 +00:00
Dan Gohman
b7c0b246da
Convert more tests to avoid llvm-as.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81545 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-11 18:36:27 +00:00
Dan Gohman
f2f6ce65b7
Change tests from "opt %s" to "opt < %s" so that opt doesn't see the
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input filename so that opt doesn't print the input filename in the
output so that grep lines in the tests don't unintentionally match
strings in the input filename.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81537 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-11 18:01:28 +00:00
Chris Lattner
4f8fb4973d
turn on -experimental-asm-printer for x86 / AT&T by default.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81532 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-11 17:07:27 +00:00
Evan Cheng
879caeadf3
Follow up to 81494. When the folded reload is narrowed to a 32-bit load then change the destination register to a 32-bit one or add a sub-register index.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81496 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-11 01:01:31 +00:00
Evan Cheng
9cef48eae9
It's not legal to fold a load from a narrower stack slot into a wider instruction. If done, the instruction does a 64-bit load and that's not
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safe. This can happen we a subreg_to_reg 0 has been coalesced. One
exception is when the instruction that folds the load is a move, then we
can simply turn it into a 32-bit load from the stack slot.
rdar://7170444
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81494 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-11 00:39:26 +00:00
Dan Gohman
5e5abb77fe
Reapply r81171 with a fix: don't try to use i64 when it
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isn't legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81492 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-11 00:34:46 +00:00
Bob Wilson
92ad363f58
Don't swap the operands of a subtraction when trying to create a
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post-decrement load/store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81464 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-10 22:09:31 +00:00
Bob Wilson
2a16e6b22c
Revert r81171 which was causing pr4927.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81415 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-10 00:49:22 +00:00
Bob Wilson
cd3b9a4f17
Fix pr4939: Change FPCCToARMCC to translate SETOLE to ARMCC::LS.
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See the bug report for details.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81397 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-09 23:14:54 +00:00
Dan Gohman
607a0508ba
When widening a vector load, use the correct chain. This fixes PR4891.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81343 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-09 14:22:57 +00:00
Torok Edwin
6e89b6f107
Add testcase for r81322 (PR4933).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81327 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-09 09:34:43 +00:00
Chris Lattner
58f875bbf6
add a testacse for the objc problem that required required r81305
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to be temporarily disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81320 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-09 06:19:34 +00:00
Chris Lattner
33c6aa6692
disable the new asmprinter by default. Both the Mangler and MCSymbol
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printing stuff are quoting symbols now, breaking objc testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81319 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-09 06:11:14 +00:00
Evan Cheng
28d63b1699
Cast MO.getImm() to unsigned before comparing with an unsigned limit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81318 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-09 06:05:16 +00:00
Chris Lattner
ab9642ff8f
turn the mcinst asmprinter on by default for x86, tweaking two tests to
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expect the slight syntax differences in the generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81305 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-09 00:41:36 +00:00
Chris Lattner
f43b45282f
this got merged into lea.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81298 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-09 00:22:31 +00:00
Chris Lattner
e1d8d831d2
filecheckize
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81297 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-09 00:19:46 +00:00
Dan Gohman
fce288fc91
Eliminate more uses of llvm-as and llvm-dis.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-09 00:09:15 +00:00
Dan Gohman
36a0947820
Eliminate more uses of llvm-as and llvm-dis.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81290 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 23:54:48 +00:00
Chris Lattner
fc227be725
update various tests for signedness changes in .s file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81289 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 23:51:06 +00:00
Chris Lattner
94d1077d99
adjust for signedness change. I'd appreciate it if an ARM flavored person
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could look at this: the top undefined bits of an immediate shouldn't affect
isel (cmp vs cmp.w)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81288 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 23:44:53 +00:00
Chris Lattner
543d57352c
merge thumb2-bic2.ll into thumb2-bic.ll and update for signedness changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81285 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 23:41:06 +00:00
Chris Lattner
08ab4fdb59
tweak this to pass on linux.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81273 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 23:32:40 +00:00
Chris Lattner
8429837a94
convert to filecheck syntax
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81267 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 23:16:26 +00:00
Chris Lattner
d842962e27
change selectiondag to add the sign extended versions of immediate operands
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to instructions instead of zero extended ones. This makes the asmprinter
print signed values more consistently. This apparently only really affects
the X86 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81265 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 23:05:44 +00:00
Anton Korobeynikov
2ba62ef7f2
Unbreak getOnesVector() / getZeroVector() to use valid ARM extended imm's.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81262 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 22:51:43 +00:00
Chris Lattner
8047d763a5
filecheckize some tests
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81259 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 22:38:46 +00:00
Dan Gohman
3e054fe9ef
Use opt -S instead of piping bitcode output through llvm-dis.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81257 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 22:34:10 +00:00
Dan Gohman
b1e1e82c54
Change these tests to feed the assembly files to opt directly, instead
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of using llvm-as, now that opt supports this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81226 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 16:50:01 +00:00
Anton Korobeynikov
6ca0b9e722
Add NEON 'laned' operations. This fixes another bunch of gcc testsuite fails and
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makes the code faster.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81220 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 15:22:32 +00:00
Anton Korobeynikov
7d16da42ba
Unbreak
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81205 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 07:30:03 +00:00
Evan Cheng
8bdb0de2bd
When remat'ing and destination virtual register has a sub-register index. Make sure the sub-register class matches the register class of the remat'ed instruction definition register class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81204 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 06:39:07 +00:00
Chris Lattner
467036058b
disable some irrelevant eh emission
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81200 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 06:26:40 +00:00