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1631 Commits

Author SHA1 Message Date
Evan Cheng
63476a8040 Reference to hidden symbols do not have to go through non-lazy pointer in non-pic mode. rdar://7187172. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80904 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-03 07:04:02 +00:00
Anton Korobeynikov
69d1c1aebf More missed vdup patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80838 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-02 21:21:28 +00:00
Sandeep Patel
65c3c8f323 Retype from unsigned to CallingConv::ID accordingly. Approved by Bob Wilson. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80773 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-02 08:44:58 +00:00
Jim Grosbach
ee793a6c19 reduce size of SmallString to something more reasonable 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80710 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-01 18:55:08 +00:00
Bob Wilson
8a3198b770 Add support for generating code for vst{234}lane intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80707 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-01 18:51:56 +00:00
Jim Grosbach
c40d9f9bae Use raw_ostream instead of sstream 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80704 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-01 18:49:12 +00:00
David Goodwin
ca01a8d4ab RRX reads CPSR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80699 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-01 18:32:09 +00:00
Bob Wilson
243fcc5a69 Generate code for vld{234}_lane intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80656 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-01 04:26:28 +00:00
Jim Grosbach
27830e39c4 Fix compiler warnings 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80650 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-01 02:05:03 +00:00
Jim Grosbach
3fb2b1ede3 Clean up LSDA name generation and use for SJLJ exception handling. This 
makes an eggregious hack somewhat more palatable. Bringing the LSDA forward
and making it a GV available for reference would be even better, but is
beyond the scope of what I'm looking to solve at this point.

Objective C++ code could generate function names that broke the previous
scheme. This fixes that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80649 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-01 01:57:56 +00:00
Evan Cheng
029599bf01 Remove .n suffix for some 16-bit opcodes now that Darwin assembler is fixed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80615 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-31 20:14:07 +00:00
Benjamin Kramer
b4f770b68a Normalize makefile comments and sort cmake file lists. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80584 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-31 13:05:24 +00:00
Anton Korobeynikov
d91aafd005 Add missed pattern 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80502 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-30 19:06:39 +00:00
Anton Korobeynikov
b00c03bb35 EXTRACT_VECTOR_ELEMENT can have result type different from element type. 
Remove the assertion and generalize the code for ARM NEON stuff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80498 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-30 17:14:54 +00:00
Anton Korobeynikov
71624cc786 Do not assert on too wide splats we don't support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80409 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-29 00:08:18 +00:00
Anton Korobeynikov
2324bdc1ee Add missed extract_element pattern 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80408 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-28 23:41:26 +00:00
Evan Cheng
e4e4ed3b56 Let Darwin linker auto-synthesize stubs and lazy-pointers. This deletes a bunch of nasty code in ARM asm printer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80404 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-28 23:18:09 +00:00
Daniel Dunbar
19bb87d0f8 Fix -Asserts warning, round two. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80354 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-28 08:08:22 +00:00
Evan Cheng
d17479e845 Print a nl before pic labels so they start at a new line. This makes assembly more readable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80350 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-28 06:59:37 +00:00
Daniel Dunbar
ca7943226e Fix -Asserts warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80338 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-28 05:47:56 +00:00
Evan Cheng
0e87e23f6e v4, v5 does not support sxtb / sxth. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80322 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-28 00:31:43 +00:00
Anton Korobeynikov
b5fb4282cd Hopefully the final missing part :( 
scalar_to_vector is fully legal now

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80251 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-27 16:25:49 +00:00
Anton Korobeynikov
b5cdf873bc Forgot about actual change :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80250 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-27 16:10:17 +00:00
Anton Korobeynikov
fdf189ac97 Transform float scalar_to_vector into subreg accesses. 
No idea whether this is profitable or not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80245 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-27 14:38:44 +00:00
Misha Brukman
bf16f1ddc4 STRD and LDRD require ARMv5TE, not just ARMv5T. 
See http://llvm.org/PR4687 for more info and links.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80244 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-27 14:14:21 +00:00
Evan Cheng
cdbb3f5d33 Fix PR4789. Teach eliminateFrameIndex how to handle VLDRQ and VSTRQ which cannot fold any immediate offset. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80191 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-27 01:23:50 +00:00
Bob Wilson
31fb12f93a Remove unneeded ARM-specific DAG nodes for VLD* and VST* Neon operations. 
The instructions can be selected directly from the intrinsics.  We will need
to add some ARM-specific nodes for VLD/VST of 3 and 4 128-bit vectors, but
those are not yet implemented.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80117 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-26 17:39:53 +00:00
Anton Korobeynikov
1cb852b0ea Expand scalar_to_vector - we don't have any isel logic for it now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80107 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-26 16:26:09 +00:00
Bob Wilson
a123239a5f Remove some unused SDNode definitions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80015 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-25 17:52:39 +00:00
Bob Wilson
2a9df47abd Expose the instruction contraint string as an argument to the NLdSt class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80011 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-25 17:46:06 +00:00
Dale Johannesen
a60e51f7e8 Make linkerprivate work for ARM and PPC. Testcase covers 
all Darwin targets; could be split into separate tests for
the chip subdirectories, but from Chris' last mail on testing
I assume he'd rather have only one test.  Generic seems to be
the best available, maybe there should be a Darwin subdirectory?



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79877 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-24 01:03:42 +00:00
Chris Lattner
dbe89cd2f0 remove the last uses of Config/alloca.h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79873 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-23 22:57:38 +00:00
Benjamin Kramer
072a56e37d Remove Streams.h from the targets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79853 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-23 11:52:17 +00:00
Chris Lattner
893e1c90a0 eliminate the last DOUTs from the targets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79833 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-23 06:49:22 +00:00
Chris Lattner
705e07f578 remove various std::ostream version of printing methods from 
MachineInstr and MachineOperand.  This required eliminating a
bunch of stuff that was using DOUT, I hope that bill doesn't
mind me stealing his fun. ;-)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79813 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-23 03:41:05 +00:00
Benjamin Kramer
f682f3d019 Forgot to update some CMakeLists. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79780 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-22 22:20:11 +00:00
Chris Lattner
33adcfb4d2 rename TAI -> MAI, being careful not to make MAILJMP instructions :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79777 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-22 21:43:10 +00:00
Chris Lattner
2807afa664 rename COFFMCAsmInfo -> MCAsmInfoCOFF, likewise for darwin. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79773 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-22 21:03:30 +00:00
Chris Lattner
af76e592c7 Rename TargetAsmInfo (and its subclasses) to MCAsmInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79763 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-22 20:48:53 +00:00
Devang Patel
24f20e0832 Record variable debug info at ISel time directly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79742 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-22 17:12:53 +00:00
Eli Friedman
ce392eb3ea Make x86 test actually test x86 code generation. Fix the 
construct on ARM, which was breaking by coincidence, and add a similar 
testcase for ARM.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79719 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-22 03:13:10 +00:00
Bob Wilson
4f38b383d5 Rename ARM "lane_cst" operands to "nohash_imm" since they are used for 
several things other than Neon vector lane numbers.  For inline assembly
operands with a "c" print code, check that they really are immediates.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79676 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-21 21:58:55 +00:00
Bob Wilson
c692cb77aa Match VTRN, VZIP, and VUZP shuffles. Restore the tests for these operations, 
now using shuffles instead of intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79673 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-21 20:54:19 +00:00
Anton Korobeynikov
051cfd683f Fix some typos and use type-based isel for VZIP/VUZP/VTRN 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79625 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-21 12:41:42 +00:00
Anton Korobeynikov
1c8e581832 Add lowering of ARM 4-element shuffles to multiple instructios via perfectshuffle-generated table. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79624 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-21 12:41:24 +00:00
Anton Korobeynikov
62e84f177d Add nodes & dummy matchers for some v{zip,uzp,trn} instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79622 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-21 12:40:50 +00:00
Anton Korobeynikov
8e6c2b9041 Expand EXTRACT_SUBVECTOR 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79621 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-21 12:40:35 +00:00
Anton Korobeynikov
5da894f5c4 Provide vext.{16,32} 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79620 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-21 12:40:21 +00:00
Anton Korobeynikov
d0ac234b1b Use masks not nodes for vector shuffle predicates. Provide set of 'legal' masks, so legalizer won't infinite cycle 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79619 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-21 12:40:07 +00:00
Bob Wilson
d4b4cf524b Remove Neon intrinsics for VZIP, VUZP, and VTRN. We will represent these as 
vector shuffles.  Temporarily remove the tests for these operations until the
new implementation is working.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79579 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-21 00:01:42 +00:00
Evan Cheng
89d177f017 Fix an obvious copy-n-paste bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79535 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-20 17:01:04 +00:00
David Goodwin
5d598aaf3d Update Cortex-A8 instruction itineraries for integer instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79436 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-19 18:00:44 +00:00
Bob Wilson
de95c1b88b Add support for Neon VEXT (vector extract) shuffles. 
This is derived from a patch by Anton Korzh.  I modified it to recognize
the VEXT shuffles during legalization and lower them to a target-specific
DAG node.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79428 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-19 17:03:43 +00:00
Chris Lattner
6c2f9e14fd eliminate AsmPrinter::SwitchToSection and just have clients 
talk to the MCStreamer directly instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79405 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-19 05:49:37 +00:00
Jakob Stoklund Olesen
c0823fe7c6 Simplify RegScavenger::FindUnusedReg. 
- Drop the Candidates argument and fix all callers. Now that RegScavenger
  tracks available registers accurately, there is no need to restict the
  search.
- Make sure that no aliases of the found register are in use. This was a potential bug.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79369 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-18 21:14:54 +00:00
Evan Cheng
51f39961c3 Fix revsh pattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79318 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-18 05:43:23 +00:00
Benjamin Kramer
9ae7d44d95 Fix use after free in Thumb2SizeReduction (PR4707). A MachineInstr was used after erasure. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79189 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-16 11:56:42 +00:00
Bill Wendling
af56634058 Reapply r79127. It was fixed by d0k. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79136 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 21:21:19 +00:00
Bill Wendling
f865ea85bd Revert r79127. It was causing compilation errors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79135 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 21:14:01 +00:00
Evan Cheng
088880cb19 Change allowsUnalignedMemoryAccesses to take type argument since some targets 
support unaligned mem access only for certain types. (Should it be size
instead?)

ARM v7 supports unaligned access for i16 and i32, some v6 variants support it
as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79127 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 19:23:44 +00:00
Evan Cheng
bc9b754091 Turn on if-conversion for thumb2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79084 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 07:59:10 +00:00
Evan Cheng
010b1b9e7b Do not use frame register to reference fixed stack objects if the function is frameless. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79067 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 02:05:35 +00:00
Evan Cheng
98a0104014 Leaf functions which do not save CSRs can be frameless even with -disable-fp-elim. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79039 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 20:48:13 +00:00
Anton Korobeynikov
72977a45a8 Allow targets to specify their choice of calling conventions per 
libcall. Take advantage of this in the ARM backend to rectify broken
choice of CC when hard float is in effect. PIC16 may want to see if
it could be of use in MakePIC16Libcall, which works unchanged.

Patch by Sandeep!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79033 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 20:10:52 +00:00
Evan Cheng
e6c835f424 Add Thumb2 lsr hooks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79032 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 20:09:37 +00:00
Evan Cheng
59bc0604e5 80 col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79026 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 19:11:20 +00:00
Evan Cheng
bba9f5f378 Indentation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79022 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 19:01:37 +00:00
Evan Cheng
31b99dd760 Also shrink immediate branches; also more assembler workarounds. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79014 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 18:31:44 +00:00
Bob Wilson
22cac0d9b3 Now that all the legal Neon shuffles (or at least the ones that have been 
implemented so far) are recognized during legalization, it is easy to fall
back to the default expansion for other shuffles.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78995 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 05:16:33 +00:00
Bob Wilson
c1d287b4b7 Create a new ARM-specific DAG node, VDUP, to represent a splat from a 
scalar_to_vector.  Generate these VDUP nodes during legalization instead
of trying to recognize the pattern during selection.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78994 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 05:13:08 +00:00
Bob Wilson
0ce3710825 During legalization, change Neon vdup_lane operations from shuffles to 
target-specific VDUPLANE nodes.  This allows the subreg handling for the
quad-register version to be done easily with Pats in the .td file, instead
of with custom code in ARMISelDAGToDAG.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78993 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 05:08:32 +00:00
Evan Cheng
a1efbbdbf3 Shrink ADR and LDR from constantpool late during constantpool island pass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78970 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 00:32:16 +00:00
Evan Cheng
1135a232eb New entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78968 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 00:16:47 +00:00
Owen Anderson
1d0be15f89 Push LLVMContexts through the IntegerType APIs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78948 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 21:58:54 +00:00
Daniel Dunbar
b42dad4761 Revert 78892 and 78895, these break generating working executables on 
x86_64-apple-darwin10.

--- Reverse-merging r78895 into '.':
U    test/CodeGen/PowerPC/2008-12-12-EH.ll
U    lib/Target/DarwinTargetAsmInfo.cpp
--- Reverse-merging r78892 into '.':
U    include/llvm/Target/DarwinTargetAsmInfo.h
U    lib/Target/X86/X86TargetAsmInfo.cpp
U    lib/Target/X86/X86TargetAsmInfo.h
U    lib/Target/ARM/ARMTargetAsmInfo.h
U    lib/Target/ARM/ARMTargetMachine.cpp
U    lib/Target/ARM/ARMTargetAsmInfo.cpp
U    lib/Target/PowerPC/PPCTargetAsmInfo.cpp
U    lib/Target/PowerPC/PPCTargetAsmInfo.h
U    lib/Target/PowerPC/PPCTargetMachine.cpp
G    lib/Target/DarwinTargetAsmInfo.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78919 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 17:03:38 +00:00
Jim Grosbach
f35d21617e Add missing defs of R2 and D1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78918 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 16:59:44 +00:00
David Goodwin
6d3d9c3fc3 Finalize itineraries for cortex-a8 integer multiply 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78908 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 15:51:13 +00:00
Jim Grosbach
8db5cce021 Remove unnecessary newline 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78905 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 15:12:16 +00:00
Jim Grosbach
1add659b0a Correct comment wording 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78904 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 15:11:43 +00:00
Evan Cheng
48bd7e3bbc tPOP_RET now has predicate operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78898 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 06:05:07 +00:00
Bob Wilson
bfcbb507c2 Add a fixme message about canonicalizing floating-point vector types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78897 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 06:01:30 +00:00
Bob Wilson
bab812b4b0 Revert r78852 for now. I want to do this differently, but I don't have time 
to fix it tonight.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78896 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 05:58:56 +00:00
Evan Cheng
86e5f7b6f8 It's ok to spill a tGPR register as long as it's still allocated a low register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78893 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 05:40:51 +00:00
Chris Lattner
b2d3169d96 fix a minor fixme. When building with SL and later tools, the ".eh" symbols 
don't need to be exported from the .o files.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78892 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 05:30:22 +00:00
Bruno Cardoso Lopes
b808588a3a Change MCSectionELF to represent a section semantically instead of 
syntactically as a string, very similiar to what Chris did with MachO.
The parsing support and validation is not introduced yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78890 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 05:07:35 +00:00
Bob Wilson
28865062c1 Add a comment to describe why vector shuffles are legalized to custom DAG nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78884 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 02:13:04 +00:00
Bob Wilson
d06791f6d0 Use cast<> instead of dyn_cast<> in places where the type is known. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78881 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 01:57:47 +00:00
Dan Gohman
cf20ac4fd1 Various AsmWriter output cleanups. Use WriteAsOperand instead of 
PrintUnmangledNameSafely.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78878 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 01:36:44 +00:00
Bob Wilson
af385baa1d Recognize Neon VDUP shuffles during legalization instead of selection. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78852 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 22:54:19 +00:00
Bob Wilson
d8e1757eac Recognize Neon VREV shuffles during legalization instead of selection. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78850 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 22:31:50 +00:00
Dan Gohman
a9ad04191c This void is implicit in C++. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78848 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 22:10:57 +00:00
Bob Wilson
114a266c94 Generate Neon VTBL and VTBX instructions from the corresponding intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78835 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 20:51:55 +00:00
Evan Cheng
3aaccffbce PredCC is meant to be 2 bits wide, like PredCC1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78829 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 18:35:50 +00:00
David Goodwin
1a8f36e3ce Enhance the InstrStage object to enable the specification of an Itinerary with overlapping stages. The default is to maintain the current behavior that the "next" stage immediately follows the previous one. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78827 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 18:31:53 +00:00
Jim Grosbach
bff392384d Add catch block handling to SjLj exception handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78817 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 17:38:44 +00:00
Bob Wilson
9f7d60f460 Fix TableGen warnings. This partly reverts my previous change to this file, 
leaving the mayLoad and mayStore settings around only the load/store
instructions where those can't be inferred from the patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78815 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 17:04:56 +00:00
Jim Grosbach
378756c0f2 register naming cleanup (s/ip/r12/) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78806 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 15:21:13 +00:00
Chris Lattner
a7ac47cee1 Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple 
pair instead of from a virtual method on TargetMachine.  This cuts the final
ties of TargetAsmInfo to TargetMachine, meaning that MC can now use 
TargetAsmInfo.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78802 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 07:22:17 +00:00
Evan Cheng
007ea274f4 Shrink Thumb2 movcc instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78790 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 05:17:19 +00:00
Evan Cheng
e0d7fe8550 Remove another Darwin assembler workaround. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78779 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 02:07:19 +00:00
Evan Cheng
c972165b11 80 col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78778 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 02:03:03 +00:00
Evan Cheng
ea253b99e9 Remove an Darwin assembler workaround. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78777 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 01:56:42 +00:00
Evan Cheng
05c269c645 Shrink ADDS, ADC, RSB, and SUBS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78776 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 01:49:45 +00:00
Bob Wilson
dbd3c0e06d Add missing chain operands for VLD* and VST* instructions. 
Set "mayLoad" and "mayStore" on the load/store instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78761 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 00:49:01 +00:00
Evan Cheng
b89030ab65 Shrinkify Thumb2 r = add sp, imm. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78745 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 23:00:31 +00:00
Chris Lattner
e2b060161c Change the asmprinter to print the comment character before the 
"inlineasmstart/end" strings so that the contents of the directive
are separate from the comment character.  This lets elf targets
get #APP/#NOAPP for free even if they don't use "#" as the comment
character.  This also allows hoisting the darwin stuff up to the
shared TAI class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78737 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 22:39:40 +00:00
David Goodwin
546952fd60 Allow a zero cycle stage to reserve/require a FU without advancing the cycle counter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78736 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 22:38:43 +00:00
Chris Lattner
e28a2e8b70 factorize more darwin TAI stuff. Note that this gives 
darwin/arm support for .no_dead_strip


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78734 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 22:31:42 +00:00
Chris Lattner
e2811a7480 factorize darwin ProtectedDirective and SetDirective. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78732 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 22:22:44 +00:00
Chris Lattner
b6ba9c36db all darwin targets have .space and .zerofill, pull up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78730 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 22:17:31 +00:00
Chris Lattner
5f28ffe6c2 eliminate template from arm TAI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78729 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 22:14:59 +00:00
Chris Lattner
c89ecc5c2f move LCOMMDirective = "\t.lcomm\t" up to DarwinTAI, eliminate 
template in PPC backend for TAI.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78727 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 22:06:07 +00:00
Evan Cheng
4b322e58b7 Shrinkify Thumb2 load / store multiple instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78717 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 21:11:32 +00:00
Owen Anderson
825b72b057 Split EVT into MVT and EVT, the former representing _just_ a primitive type, while 
the latter is capable of representing either a primitive or an extended type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78713 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 20:47:22 +00:00
Chris Lattner
0a31d2f645 pass the TargetTriple down from each target ctor to the 
LLVMTargetMachine ctor.  It is currently unused.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78711 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 20:42:37 +00:00
Chris Lattner
dfab291702 split "JumpTableDirective" (an existing hack) into a PIC and nonPIC 
version.  This allows TAI implementations to specify the directive to use
based on the mode being codegen'd for.

The real fix for this is to remove JumpTableDirective, but I don't feel
like diving into the jumptable snarl just now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78709 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 20:30:58 +00:00
Jim Grosbach
5aa1684e5d Add Thumb2 eh_sjlj_setjmp implementation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78701 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 19:42:21 +00:00
Jim Grosbach
cdc17ebc2b fix GetInstSizeInBytes for eh_sjlj_setjmp 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78683 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 17:08:15 +00:00
Benjamin Kramer
327365e58f This void is implicit in C++. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78678 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 16:03:08 +00:00
Jim Grosbach
764ab52dd8 Whitespace cleanup. Remove trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78666 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 15:33:49 +00:00
Jim Grosbach
f128787f94 Move ~ARMConstantPoolValue() to the .cpp file to avoid needing to include <cstdlib> in the header. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78665 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 15:26:27 +00:00
Evan Cheng
195c71b472 Fix the previous accidental commit. Now shrinking common Thumb2 load / store instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78659 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 09:37:40 +00:00
Evan Cheng
3a21425dbe Fix Thumb2 load / store addressing mode matching code. Do not use so_reg form to 
match base only address, i.e. [r] since Thumb2 requires a offset register field.
For those, use [r + imm12] where the immediate is zero.
Note the generated assembly code does not look any different after the patch.
But the bug would have broken the JIT (if there is Thumb2 support) and it can
break later passes which expect the address mode to be well-formed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78658 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 08:52:18 +00:00
Evan Cheng
1cf5783dd7 80 column violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78657 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 08:47:46 +00:00
Evan Cheng
4a8ea215e6 Cosmetic changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78655 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 07:36:14 +00:00
Evan Cheng
7fb8c3ffc0 Adding a blank line back. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78654 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 07:32:58 +00:00
Bob Wilson
b0abb4dc42 Use vAny type to get rid of Neon intrinsics that differed only in whether 
the overloaded vector types allowed floating-point or integer vector elements.
Most of these operations actually depend on the element type, so bitcasting
was not an option.

If you include the vpadd intrinsics that I updated earlier, this gets rid
of 20 intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78646 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 05:39:44 +00:00
Bob Wilson
f24bd401eb Use new EVT::vAny type to combine Neon intrinsics for VPADD. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78632 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 01:15:26 +00:00
David Goodwin
f35290ce8d Fix bug in NEON convert for single-precision FP. This also fixes the tblgen warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78629 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 01:07:38 +00:00
Jim Grosbach
3034e8fb1f Add stdlib.h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78627 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 00:20:00 +00:00
Jim Grosbach
1b747ad8a0 SjLj based exception handling unwinding support. This patch is nasty, brutish 
and short. Well, it's kinda short. Definitely nasty and brutish.

The front-end generates the register/unregister calls into the SjLj runtime,
call-site indices and landing pad dispatch. The back end fills in the LSDA
with the call-site information provided by the front end. Catch blocks are
not yet implemented.

Built on Darwin and verified no llvm-core "make check" regressions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78625 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 00:09:57 +00:00
Evan Cheng
3a1f0f6785 Enable Thumb2 instruction shrinking (32-bit to 16-bit) pass. Convert a bunch of thumb2 tests to FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78622 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 23:56:04 +00:00
Dan Gohman
a407ca16c2 Fix a bug where DAGCombine was producing an illegal ConstantFP 
node after legalize, and remove the workaround code from the
ARM backend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78615 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 23:15:10 +00:00
Owen Anderson
e50ed30282 Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78610 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 22:56:29 +00:00
David Goodwin
338268c67f Use NEON for single-precision int<->FP conversions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78604 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 22:17:39 +00:00
Owen Anderson
d6662add68 SimpleValueType-ify a few more methods on TargetLowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78595 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 20:46:15 +00:00
Evan Cheng
e2b861f7d9 Handle the constantfp created during post-legalization dag combiner phase. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78594 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 20:25:59 +00:00
Owen Anderson
70671845ad Continue the SimpleValueType-ification. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78593 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 20:18:46 +00:00
Chris Lattner
f9bdeddb96 split MachO section handling stuff out to its out .h/.cpp file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78576 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 18:15:01 +00:00
Chris Lattner
f3231de60b arm only needs to emit one .align directive for hidden nlp's, not one 
per pointer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78574 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 18:02:16 +00:00
Chris Lattner
c076a97939 make sure that arm nonlazypointers are aligned properly 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78573 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 18:01:34 +00:00
David Goodwin
bcf81629b8 Checkpoint scheduling itinerary changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78564 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 15:56:13 +00:00
Evan Cheng
65f2e7887a Watch out for empty BB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78562 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 08:10:13 +00:00
Evan Cheng
8442d00a0e rev, rev16, and revsh do not set CPSR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78561 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 07:58:45 +00:00
Evan Cheng
0d3007bb32 Duh. Most 16-bit Thumb rr instructions are two-address. Fix table. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78560 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 07:20:37 +00:00
Evan Cheng
26cc252a43 CPSR can be livein; transfer predicate operands correctly; tMUL is two-address. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78559 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 06:57:42 +00:00
Evan Cheng
19068ba71a Add support for folding loads / stores into 16-bit moves used by Thumb2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78558 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 06:32:05 +00:00
Evan Cheng
2294645642 80 col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78557 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 05:51:48 +00:00
Evan Cheng
052053bbe3 Use tMOVgpr2gpr instead of t2MOVr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78556 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 05:49:43 +00:00
Evan Cheng
e8af1f9afe Add support to reduce most of 32-bit Thumb2 arithmetic instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78550 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-10 02:37:24 +00:00