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1053 Commits

Author SHA1 Message Date
Akira Hatanaka
ef43c2de86 32-to-64-bit sext_inreg pattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147004 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-20 22:40:40 +00:00
Akira Hatanaka
acb5a06f7a Add 64-bit extload patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147003 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-20 22:36:08 +00:00
Akira Hatanaka
ab05b6c227 Add patterns for matching extloads with 64-bit address. The patterns are enabled 
only when the target ABI is N64.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147001 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-20 22:33:53 +00:00
Akira Hatanaka
990d639f55 Add code in MipsDAGToDAGISel for selecting constant +0.0. 
MIPS64 can generate constant +0.0 with a single DMTC1 instruction. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146999 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-20 22:25:50 +00:00
Akira Hatanaka
05c585319b Revert part of r146995 that was accidentally commmitted. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146996 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-20 22:09:36 +00:00
Akira Hatanaka
403992dc58 32-to-64-bit sign extension pattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146995 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-20 22:06:20 +00:00
Akira Hatanaka
caace8abdf Add a pattern for matching zero-store with 64-bit address. The pattern is enabled 
only when the target ABI is N64. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146992 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-20 21:50:49 +00:00
Chandler Carruth
cfb75fba73 Fix up the CMake build for the new files added in r146960, they're 
likely to stay either way that discussion ends up resolving itself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146966 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-20 08:42:11 +00:00
David Blaikie
2d24e2a396 Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146960 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-20 02:50:00 +00:00
Akira Hatanaka
f06cb2b207 Add patterns for matching immediates whose lower 16-bit is cleared. These 
patterns emit a single LUi instruction instead of a pair of LUi and ORi.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146900 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-19 20:21:18 +00:00
Akira Hatanaka
8209968306 Tidy up. Simplify logic. No functional change intended. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146896 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-19 19:52:25 +00:00
Akira Hatanaka
ee973147ac Remove definitions of double word shift plus 32 instructions. Assembler or 
direct-object emitter should emit the appropriate shift instruction depending
on the shift amount.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146893 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-19 19:44:09 +00:00
Akira Hatanaka
ed538b5271 Remove unused predicate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146889 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-19 19:32:20 +00:00
Akira Hatanaka
89dc8d790d Remove the restriction on the first operand of the add node in SelectAddr. 
This change reduces the number of instructions generated.

For example, 
(load (add (sub $n0, $n1), (MipsLo got(s))))

results in the following sequence of instructions:
1. sub $n2, $n0, $n1
2. lw got(s)($n2)

Previously, three instructions were needed.
1. sub $n2, $n0, $n1
2. addiu $n3, $n2, got(s)
3. lw 0($n3)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146888 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-19 19:28:37 +00:00
Akira Hatanaka
3faac0a78c Add support for local dynamic TLS model in LowerGlobalTLSAddress. Direct object 
emission is not supported yet, but a patch that adds the support should follow
soon.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146572 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-14 18:26:41 +00:00
Akira Hatanaka
044a784fa5 Expand .cprestore directive to multiple instructions if the offset does not fit 
in a 16-bit field.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146469 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-13 03:09:05 +00:00
Chandler Carruth
63974b2144 Initial CodeGen support for CTTZ/CTLZ where a zero input produces an 
undefined result. This adds new ISD nodes for the new semantics,
selecting them when the LLVM intrinsic indicates that the undef behavior
is desired. The new nodes expand trivially to the old nodes, so targets
don't actually need to do anything to support these new nodes besides
indicating that they should be expanded. I've done this for all the
operand types that I could figure out for all the targets. Owners of
various targets, please review and let me know if any of these are
incorrect.

Note that the expand behavior is *conservatively correct*, and exactly
matches LLVM's current behavior with these operations. Ideally this
patch will not change behavior in any way. For example the regtest suite
finds the exact same instruction sequences coming out of the code
generator. That's why there are no new tests here -- all of this is
being exercised by the existing test suite.

Thanks to Duncan Sands for reviewing the various bits of this patch and
helping me get the wrinkles ironed out with expanding for each target.
Also thanks to Chris for clarifying through all the discussions that
this is indeed the approach he was looking for. That said, there are
likely still rough spots. Further review much appreciated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146466 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-13 01:56:10 +00:00
Daniel Dunbar
b0c594fd42 LLVMBuild: Introduce a common section which currently has a list of the 
subdirectories to traverse into.
 - Originally I wanted to avoid this and just autoscan, but this has one key
   flaw in that new subdirectories can not automatically trigger a rerun of the
   llvm-build tool. This is particularly a pain when switching back and forth
   between trees where one has added a subdirectory, as the dependencies will
   tend to be wrong. This will also eliminates FIXME implicitly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146436 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-12 22:45:54 +00:00
Akira Hatanaka
6e55ff56b8 Emit B (unconditional branch) when -relocation-model=pic and J (jump) when 
-relocation-model=static.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146432 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-12 22:39:35 +00:00
Akira Hatanaka
bfcb83fa32 Fix indentation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146431 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-12 22:38:19 +00:00
Daniel Dunbar
4ab406d7fc LLVMBuild: Remove trailing newline, which irked me. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146409 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-12 19:48:00 +00:00
Benjamin Kramer
5eccf67492 Mips: Don't create a dangling IR function just to get the address of a symbol. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146340 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-11 12:21:34 +00:00
Akira Hatanaka
6df7e23f0c Rename WrapperPIC. It is now used for both pic and static. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146232 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-09 01:53:17 +00:00
Akira Hatanaka
0dca9456c5 jalr should use t9 ($25) for indirect calls regardless of the relocation model 
specified.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146229 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-09 01:45:12 +00:00
Akira Hatanaka
7a7194b529 Pass a GlobalAddress instead of an ExternalSymbol to LowerCallTo in 
MipsTargetLowering::LowerGlobalTLSAddress. This is necessary to have
call16(__tls_get_addr) emitted instead of got_disp(__tls_get_addr) when the
target is Mips64.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146183 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 21:05:38 +00:00
Akira Hatanaka
ca0747917d Implement 64-bit support for thread local storage handling. 
- Modify lowering of global TLS address nodes.
- Modify isel of ThreadPointer.
- Wrap target global TLS address nodes that are operands of loads with WrapperPIC. 
- Remove Mips-specific DAG nodes TlsGd, TprelHi and TprelLo, which can be
  substituted with other existing nodes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146175 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 20:34:32 +00:00
Akira Hatanaka
08a7d92da6 Modify class ReadHardware and add definition of 64-bit version of instruction 
RDHWR. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146101 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-07 23:31:26 +00:00
Akira Hatanaka
f99c1e5a19 Add newline. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146100 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-07 23:26:03 +00:00
Akira Hatanaka
be7b67368c Add 64-bit HWR29 register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146099 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-07 23:23:52 +00:00
Akira Hatanaka
da86fa14f0 32 to 64-bit anyext pattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146097 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-07 23:21:19 +00:00
Akira Hatanaka
0a18cdc372 32 to 64-bit zext pattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146096 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-07 23:14:41 +00:00
Bruno Cardoso Lopes
d1bcf0dbc1 Variable cleanup. Based on past patch submittals variable names have 
been normalized and more descriptive comments added. Patch by Reed
Kotler and Jack Carter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146088 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-07 22:35:30 +00:00
Akira Hatanaka
2c78be01f6 64-bit WrapperPICPat patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146086 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-07 22:11:43 +00:00
Akira Hatanaka
20aa12ae5c Define base class for WrapperPICPat. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146081 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-07 21:54:54 +00:00
Akira Hatanaka
7398bf01c2 Modify LowerFCOPYSIGN to handle Mips64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146080 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-07 21:48:50 +00:00
Akira Hatanaka
bd15090aa2 Fix comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146063 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-07 20:15:01 +00:00
Akira Hatanaka
3bdc03a592 Fix comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146062 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-07 20:13:53 +00:00
Akira Hatanaka
4d0eb637f0 Fix 64-bit immediate patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146059 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-07 20:10:24 +00:00
Evan Cheng
5a96b3dad2 Add bundle aware API for querying instruction properties and switch the code 
generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.

For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146026 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-07 07:15:52 +00:00
Bruno Cardoso Lopes
e3d3572e28 Add a few moreLocal/Global R_MIPS_GOT related fixups and 
make the addend fixup code a bit more generic

Patch by Jack Carter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145998 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-07 00:28:57 +00:00
Evan Cheng
7c2a4a30e0 First chunk of MachineInstr bundle support. 
1. Added opcode BUNDLE
2. Taught MachineInstr class to deal with bundled MIs
3. Changed MachineBasicBlock iterator to skip over bundled MIs; added an iterator to walk all the MIs
4. Taught MachineBasicBlock methods about bundled MIs


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145975 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 22:12:01 +00:00
Bruno Cardoso Lopes
ff452f5349 Use branches instead of jumps + variable cleanup. Testcase coming next. Patch by Jack Carter 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145912 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 03:34:48 +00:00
Bruno Cardoso Lopes
2bcc789a9d Add register HWR29 numbering. Patch by Jack Carter 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145910 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 03:34:36 +00:00
NAKAMURA Takumi
6482e91149 MipsAsmBackend.cpp, PPCAsmBackend.cpp: Fix -Asserts build to appease msvc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145894 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 01:48:32 +00:00
Jim Grosbach
370b78d795 Move target-specific logic out of generic MCAssembler. 
Whether a fixup needs relaxation for the associated instruction is a
target-specific function, as the FIXME indicated. Create a hook for that
and use it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145881 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 00:47:03 +00:00
Akira Hatanaka
d6bc5237d8 Add definitions of 64-bit extract and insert instrucions and make 
PerformANDCombine and PerformOrCombine aware of them. Test cases are included
too.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145853 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-05 21:26:34 +00:00
Akira Hatanaka
cee46abc16 Split ExtIns into two base classes and have instructions EXT and INS derive from 
them.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145852 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-05 21:14:28 +00:00
Akira Hatanaka
2bf08ec854 Have LowerJumpTable support Mips64. Modify 2010-07-20-Switch.ll to test N64 and 
O32 with relocation-model=pic too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145850 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-05 21:03:03 +00:00
Nick Lewycky
8a8d479214 Move global variables in TargetMachine into new TargetOptions class. As an API 
change, now you need a TargetOptions object to create a TargetMachine. Clang
patch to follow.

One small functionality change in PTX. PTX had commented out the machine
verifier parts in their copy of printAndVerify. That now calls the version in
LLVMTargetMachine. Users of PTX who need verification disabled should rely on
not passing the command-line flag to enable it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145714 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-02 22:16:29 +00:00
Akira Hatanaka
ed2a7d2780 Change names for MIPS "generic" processors defined in Mips.td to match what GNU 
tools use. Patch by Simon Atanasyan.

"mips32r1" => "mips32"
"4ke" => mips32r2"
"mips64r1" => "mips64"



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145451 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-29 23:08:41 +00:00
Daniel Dunbar
d782bae970 build/CMake: Finish removal of add_llvm_library_dependencies. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145420 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-29 19:25:30 +00:00
Akira Hatanaka
421455f1ea This patch makes the following changes necessary for MIPS' direct code emission. 
- lower unaligned loads/stores.
- encode the size operand of instructions INS and EXT.
- emit relocation information needed for JAL (jump-and-link).  


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145113 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-23 22:19:28 +00:00
Akira Hatanaka
84bfc2f090 This patch addresses gp relative fixups/relocations for jump tables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145112 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-23 22:18:04 +00:00
Akira Hatanaka
620db8947a Lower 64-bit constant pool node. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144849 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 22:44:38 +00:00
Akira Hatanaka
9b944a8da2 Lower 64-bit block address. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144847 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 22:42:10 +00:00
Akira Hatanaka
74c76347d3 Add patterns for 64-bit tglobaladdr, tblockaddress, tjumptable and tconstpool 
nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144841 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 22:39:56 +00:00
Akira Hatanaka
4fd40b3604 64-bit jump register instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144840 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 22:36:01 +00:00
Evan Cheng
b95fc31aa2 Sink codegen optimization level into MCCodeGenInfo along side relocation model 
and code model. This eliminates the need to pass OptLevel flag all over the
place and makes it possible for any codegen pass to use this information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144788 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-16 08:38:26 +00:00
Akira Hatanaka
1b71950812 Fix functions in MipsFrameLowering.cpp and MipsRegisterInfo.cpp. Use 64-bit 
registers and instructions when ABI is N64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144666 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 18:53:55 +00:00
Akira Hatanaka
ac20aad81c Set nomacro before emitting the sequence of instructions that set global pointer 
register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144665 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 18:44:44 +00:00
Akira Hatanaka
160408546c Simplify function PassByValArg64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144664 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 18:42:25 +00:00
Akira Hatanaka
870b3b2dd4 Delete files. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144655 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 18:22:48 +00:00
Akira Hatanaka
73c38f0aa2 Remove MipsMCSymbolRefExpr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144654 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-15 18:20:08 +00:00
Benjamin Kramer
6296ee3ee2 Unbreak Release builds. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144560 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-14 19:51:48 +00:00
Akira Hatanaka
788dc0f4e5 32-to-64-bit extended load. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144554 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-14 19:06:14 +00:00
Akira Hatanaka
4961709688 AnalyzeCallOperands function for N32/64. 
N32/64 places all variable arguments in integer registers (or on stack),
regardless of their types, but follows calling convention of non-vaarg function
when it handles fixed arguments.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144553 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-14 19:02:54 +00:00
Akira Hatanaka
bad53f41c2 Modify LowerFormalArguments to correctly handle vaarg arguments for Mips64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144552 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-14 19:01:09 +00:00
Akira Hatanaka
47a4ab84fe Remove variable that keeps the size of area used to save byval or variable 
argument registers on the callee's stack frame, along with functions that set
and get it.
    
It is not necessary to add the size of this area when computing stack size in
emitPrologue, since it has already been accounted for in
PEI::calculateFrameObjectOffsets.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144549 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-14 18:56:20 +00:00
Akira Hatanaka
7386612a16 Fix typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144453 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-12 02:38:12 +00:00
Akira Hatanaka
6df3e7b162 Implement Mips64's handling of byval arguments in LowerCall. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144452 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-12 02:34:50 +00:00
Akira Hatanaka
3a5257de21 Implement Mips64's handling of byval arguments in LowerFormalArguments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144449 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-12 02:29:58 +00:00
Akira Hatanaka
deab22a556 64-bit arbitrary immediate pattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144448 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-12 02:25:00 +00:00
Akira Hatanaka
2c5d65202e Function for handling byval arguments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144447 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-12 02:20:46 +00:00
Daniel Dunbar
b8ebca83f4 build: Attempt to rectify inconsistencies between CMake and LLVMBuild versions of explicit dependencies. 
- The hope is that we have a tool/test to verify these are accurate (and tight) soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144444 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-12 02:10:57 +00:00
Daniel Dunbar
b12f97534c CMake: Fix CMake build for new Mips tblgen file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144423 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-11 23:12:56 +00:00
Bruno Cardoso Lopes
47b92f3d83 Mips MC object code emission improvements: 
"With this patch we can now generate runnable Mips code through LLVM
direct object emission. We have run numerous simple programs, both C
and C++ and with -O0 and -O3 from the output. The code is not production
ready, but quite useful for experimentation." Patch and message by
Jack Carter

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144414 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-11 22:58:42 +00:00
Akira Hatanaka
e184fec550 Do not try to detect DAG combine patterns for integer multiply-add/sub if value 
type is not i32. MIPS does not have 64-bit integer multiply-add/sub
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144373 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-11 04:18:21 +00:00
Akira Hatanaka
59068067cb 64-bit atomic instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144372 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-11 04:14:30 +00:00
Akira Hatanaka
46ac4399b1 Modify LowerFRAMEADDR. Use 64-bit register FP_64 when ABI is N64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144371 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-11 04:11:56 +00:00
Akira Hatanaka
c742e4fc90 Add 64-bit versions of LEA_ADDiu and DynAlloc. Modify LowerDYNAMIC_STACKALLOC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144370 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-11 04:06:38 +00:00
Akira Hatanaka
642b109713 64-bit versions of jal, jalr and bal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144368 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-11 04:03:54 +00:00
Akira Hatanaka
a1fa08f66a Emit Mips64's sequence of instructions that set global register in prologue. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144367 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-11 04:00:29 +00:00
Akira Hatanaka
d5cf5a631f Fix printing of MCSymbolRegExpr. Needs three closing parentheses for 
VK_Mips_GPOFF_HI/LO.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144366 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-11 03:58:36 +00:00
Daniel Dunbar
5ed5506f18 LLVMBuild: Add explicit information on whether targets define an assembly printer, assembly parser, or disassembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144344 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-11 00:23:56 +00:00
Daniel Dunbar
affc6cf9d2 llvm-build: Add --native-target and --enable-targets options, and add logic to 
handle defining the "magic" target related components (like native,
nativecodegen, and engine).
 - We still require these components to be in the project (currently in
   lib/Target) so that we have a place to document them and hopefully make it
   more obvious that they are "magic".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144253 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-10 00:50:07 +00:00
Daniel Dunbar
c352caf168 llvm-build: Add an explicit component type to represent targets. 
- Gives us a place to hang target specific metadata (like whether the target has a JIT).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144250 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-10 00:49:51 +00:00
Bruno Cardoso Lopes
ce1a538ab5 Properly handle Mips MC relocations and lower cpload and cprestore macros to MCInsts. 
Patch by Jack Carter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144139 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-08 22:26:47 +00:00
Pete Cooper
d752e0f7e6 Added invariant field to the DAG.getLoad method and changed all calls. 
When this field is true it means that the load is from constant (runt-time or compile-time) and so can be hoisted from loops or moved around other memory accesses


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144100 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-08 18:42:53 +00:00
Bruno Cardoso Lopes
ad6eef4a65 This patch handles unaligned loads and stores in Mips JIT. Mips backend 
implements unaligned loads and stores with assembler macro-instructions
ulw, usw, ulh, ulhu, ush, and this patch emits corresponding instructions
instead of these macros. Since each unaligned load/store is expanded
into two corresponding loads/stores where offset for second load/store is
modified by +3 (for words) or +1 (for halfwords).

Patch by Petar Jovanovic and Sasa Stankovic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144081 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-08 12:47:11 +00:00
Akira Hatanaka
4cae74bd74 Various Mips64 floating point instruction patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144019 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-07 21:38:58 +00:00
Akira Hatanaka
c370619bac Add definition of the base class for floating point comparison instructions 
and add Mips64's version too.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144018 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-07 21:37:33 +00:00
Akira Hatanaka
29d525a3ed Add code needed for copying between 64-bit integer and floating pointer 
registers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144017 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-07 21:35:45 +00:00
Akira Hatanaka
e7126ebd54 Add definitions of 64-bit instructions which move data between integer and 
floating pointer registers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144016 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-07 21:32:58 +00:00
Akira Hatanaka
d83d98d4eb Add definition of 64-bit load upper immediate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143994 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-07 19:10:49 +00:00
Akira Hatanaka
f83ba3293f Include RegSaveAreaSize in the computation of stack size. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143993 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-07 19:07:35 +00:00
Akira Hatanaka
213b2a2188 Define functions that get or set the size of area on callee's stack frame which 
is used to save va_arg or byval arguments passed in registers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143992 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-07 19:06:10 +00:00
Akira Hatanaka
c4d6fd569d Use array_lengthof to compute the number of iterations of a loop. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143991 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-07 19:03:40 +00:00
Akira Hatanaka
7784046012 Fix patterns for unaligned 32-bit load. DSLL32 or DSRL32 should be emitted 
when shift amount is larger than 32.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143990 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-07 19:01:49 +00:00
Akira Hatanaka
68698cc20d Make the type of shift amount i32 in order to reduce the number of shift 
instruction definitions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143989 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-07 18:59:49 +00:00
Akira Hatanaka
bce22b48fe Add 64-bit to 32-bit trunc pattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143988 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-07 18:57:41 +00:00
Benjamin Kramer
5908536673 Replace (Lower|Upper)caseString in favor of StringRef's newest methods. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143891 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-06 20:37:06 +00:00
Daniel Dunbar
b0d9ce567f build/cmake: Use tblgen macro directly instead of llvm_tablegen, which just 
added a layer of indirection with no value (not even conciseness).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143727 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-04 19:04:23 +00:00
Daniel Dunbar
a3a2dfd4a2 build: Add initial cut at LLVMBuild.txt files. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143634 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-03 18:53:17 +00:00
Akira Hatanaka
feaa4c316f Make changes necessary in LowerFormalArguments to support Mips64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143218 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-28 19:55:48 +00:00
Akira Hatanaka
e42f33bd15 Make changes necessary in LowerCall to support Mips64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143217 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-28 19:49:00 +00:00
Akira Hatanaka
2ec69faf26 Add variable IsO32 to MipsTargetLowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143213 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-28 18:47:24 +00:00
Bruno Cardoso Lopes
02dc51806e Corrects previously incorrect $sp change in MipsCompilationCallback. 
The address for $sp, and addresses for sdc1/ldc1 must be 8-byte aligned

Patch by Petar Jovanovic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142930 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-25 17:30:47 +00:00
Bruno Cardoso Lopes
c3f16b316a Final patch that completes old JIT support for Mips: 
-Fix binary codes and rename operands in .td files so that automatically
generated function MipsCodeEmitter::getBinaryCodeForInstr gives correct
encoding for instructions.
-Define new class FMem for instructions that access memory.
-Define new class FFRGPR for instructions that move data between GPR and
FPU general and control registers.
-Define custom encoder methods for memory operands, and also for size
operands of ext and ins instructions.
-Only static relocation model is currently implemented.

Patch by Sasa Stankovic

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142378 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-18 17:50:36 +00:00
Bill Wendling
40825fbb40 Coding style cleanups. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142341 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-18 07:40:22 +00:00
Eli Friedman
0851a29b6d Fix misc warnings. Patch by Joe Abbey. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142332 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-18 03:17:34 +00:00
Akira Hatanaka
8ae330ac90 Add definitions of conditional moves with 64-bit operands. Comment out code for 
expanding conditional moves, which is not needed since architectures that lack
support for conditional moves have been removed. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142226 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 18:53:29 +00:00
Akira Hatanaka
8f3af87e99 Move class and instruction definitions for conditional moves to a seperate file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142220 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 18:43:19 +00:00
Akira Hatanaka
eea367ec97 Revert change made in r142205. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142217 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 18:33:24 +00:00
Akira Hatanaka
bdfd98a080 Redefine count-leading 0s and 1s instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142216 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 18:26:37 +00:00
Akira Hatanaka
89d306669e Redefine mfhi/lo and mthi/lo instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142214 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 18:24:15 +00:00
Akira Hatanaka
f1fddcd9e0 Redefine multiply and divide instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142211 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 18:21:24 +00:00
Akira Hatanaka
2d0a61da62 Add definition of a base class for logical shift/rotate instructions with two 
source registers and redefine 32-bit and 64-bit instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142210 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 18:17:58 +00:00
Akira Hatanaka
363934665d Add definition of a base class for logical shift/rotate immediate instructions 
and have 32-bit and 64-bit instructions derive from it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142207 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 18:06:56 +00:00
Akira Hatanaka
a01820a508 Add definition of immZExt5_64 and redefine immZExt5 as an ImmLeaf. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142205 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 18:01:00 +00:00
Akira Hatanaka
1ce2668c84 Add f128 to datalayout string. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141978 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-14 19:14:50 +00:00
Akira Hatanaka
008b58c4ae Revert r141932, r141936 and r141937. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141959 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-14 17:16:39 +00:00
Akira Hatanaka
91d2cc9cdd Definition of function getMipsRegisterNumbering. 
Patch by Jack Carter and Reed Kotler at Mips. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141938 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-14 03:04:24 +00:00
Akira Hatanaka
2891662cc2 Add definition of class MipsELFWriterInfo. 
Patch by Jack Carter and Reed Kotler at Mips. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141937 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-14 02:55:47 +00:00
Akira Hatanaka
51f72c5a3f Add missing relocation types. 
Patch by Jack Carter and Reed Kotler at Mips. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141936 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-14 02:47:50 +00:00
Akira Hatanaka
36004b93ef Fixup enumerations. 
Patch by Jack Carter at Mips. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141934 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-14 02:38:56 +00:00
Akira Hatanaka
93d2a0a1fa Add more Mips relocation types. 
Patch by Jack Carter at Mips. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141932 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-14 02:17:30 +00:00
Akira Hatanaka
41f9a430cb Define base class LogicNOR and make 32-bit and 64-bit NOR derive from it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141761 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 01:05:13 +00:00
Akira Hatanaka
6baabc1dd0 Fix encoding of 32-bit integer instructions. Change names of operands and nodes. 
Remove unused classes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141757 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 00:56:06 +00:00
Akira Hatanaka
80eb994929 Change name of class to ArithOverflowR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141743 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 23:43:48 +00:00
Akira Hatanaka
2dfd3a9789 Define class ArithLogicI. Make 32-bit and 64-bit arithmetic and logical 
instructions with two register operands derive from it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141742 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 23:38:52 +00:00
Akira Hatanaka
76d9f1c022 Fix comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141737 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 23:12:12 +00:00
Akira Hatanaka
c2f3ac9de2 Define classes ArithLogicR and ArithLogicOfR and make 32-bit and 64-bit 
arithmetic and logical instructions with three register operands derive from
them. Fix instruction encoding too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141736 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 23:05:46 +00:00
Akira Hatanaka
68ad5673e8 Fix function isUnalignedLoadStore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141722 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 22:04:01 +00:00
Akira Hatanaka
d8212b2916 Remove unused PatLeaf. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141720 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 21:53:08 +00:00
Akira Hatanaka
7cc037a137 Change the names of 64-bit logical instructions so that they match the names of 
the real instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141718 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 21:48:01 +00:00
Akira Hatanaka
395d76c5a3 Remove redundancy in setcc patterns using multiclass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141715 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 21:40:01 +00:00
Akira Hatanaka
b07a3d6897 Use sltiu instead of sltu when a register operand and immediate are compared. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141708 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 20:44:43 +00:00
Akira Hatanaka
06f8231bfb Add patterns for conditional branches with 64-bit register operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141696 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 19:09:09 +00:00
Akira Hatanaka
8191f34797 Add support for 64-bit set-on-less-than instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141695 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 18:53:46 +00:00
Akira Hatanaka
3e3427a5c3 Add support for conditional branch instructions with 64-bit register operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141694 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 18:49:17 +00:00
Akira Hatanaka
1acb7df498 Make changes necessary for supporting floating point load and store instructions 
that have 64-bit pointers or access the 32 x 64-bit floating pointer register
file. Update functions in MipsInstrInfo.cpp too.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141623 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 01:12:52 +00:00
Akira Hatanaka
a5903acd6b Modify lowering of GlobalAddress so that correct code is emitted when target is 
Mips64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141618 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 00:55:05 +00:00
Akira Hatanaka
381e97dcf6 Modify MipsDAGToDAGISel::SelectAddr so that it can handle 64-bit pointers too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141615 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 00:44:20 +00:00
Akira Hatanaka
43aed32e20 Simplify and update functions storeRegToStackSlot and loadRegFromStackSlot. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141613 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 00:37:28 +00:00
Akira Hatanaka
7bd19bd519 Add definitions of 64-bit loads and stores. Add a patterns for unaligned 
zextloadi32 for which there is no corresponding pseudo or real instruction. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141608 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 00:27:28 +00:00
Akira Hatanaka
d55bb38ddc Change definitions of classes LoadM and StoreM in preparation for adding support 
for 64-bit load and store instructions. Add definitions of 64-bit memory operand
and 16-bit immediate operand.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141603 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 00:11:12 +00:00
Akira Hatanaka
4391bb75ec Simplify definition of FP move instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141476 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-08 03:50:18 +00:00
Akira Hatanaka
c9289f6a71 Define classes and multiclasses for FP binary instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141475 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-08 03:38:41 +00:00
Akira Hatanaka
bfca0798cf Define multiclasses for FP-to-FP instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141474 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-08 03:29:22 +00:00
Akira Hatanaka
a8de1c1be0 Define classes for FP unary instructions and multiclasses for FP-to-fixed point 
conversion instructions. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141473 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-08 03:19:38 +00:00