6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-11-15 04:08:07 +00:00
Code Issues Projects Releases Wiki Activity
66,522 Commits 39 Branches 0 Tags 277 MiB
7be2c33193
Commit Graph

42789 Commits

Author SHA1 Message Date
Devang Patel
3cabc9d2c9 Technically DIFile scope should also be handled here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117563 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 17:30:52 +00:00
Chris Lattner
c0ddfaa134 rearrange ParseRegisterList. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117560 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 17:23:41 +00:00
Chris Lattner
3a69756e39 refactor some code to simplify it, eliminating some owningptr's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117559 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 17:20:03 +00:00
Bob Wilson
0f1db1a6c6 Teach the DAG combiner to fold a splat of a splat. Radar 8597790. 
Also do some minor refactoring to reduce indentation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117558 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 17:06:14 +00:00
Roman Divacky
f9d1752104 Use the IDVal directly as there's no need to convert to std::string. 
Pointed out by Chris!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117557 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 16:57:58 +00:00
Roman Divacky
50e7a78709 Implement .equ directive as a synonym to .set. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117553 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 16:22:58 +00:00
Duncan Sands
f22b74608e Fix PR8494: when reading invalid bitcode, getTypeByID may return 
a null pointer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117551 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 15:47:26 +00:00
Rafael Espindola
aa8f1f0135 Implement R_X86_64_DTPOFF32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117548 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 15:11:03 +00:00
Rafael Espindola
b4d1721eff Implement TLSLD. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117547 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 15:02:40 +00:00
Rafael Espindola
0cf15d61b7 Implement DTPOFF. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117546 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 14:48:59 +00:00
Rafael Espindola
a264f72d3f Implement TLSLDM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117544 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 14:37:09 +00:00
Rafael Espindola
a0a2f8734c Implement VK_GOTNTPOFF and switch RelocNeedsGOT to use VariantKind. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117543 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 14:22:44 +00:00
Mikhail Glushenkov
6d8ac5ac6d Reindent. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117538 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 08:25:44 +00:00
Evan Cheng
7e2fe9150f Re-commit 117518 and 117519 now that ARM MC test failures are out of the way. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117531 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 06:47:08 +00:00
Evan Cheng
9e08ee5d16 Revert 117518 and 117519 for now. They changed scheduling and cause MC tests to fail. Ugh. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117520 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 02:00:25 +00:00
Evan Cheng
0104d9de04 - Assign load / store with shifter op address modes the right itinerary classes. 
- For now, loads of [r, r] addressing mode is the same as the
  [r, r lsl/lsr/asr #] variants. ARMBaseInstrInfo::getOperandLatency() should
  identify the former case and reduce the output latency by 1.
- Also identify [r, r << 2] case. This special form of shifter addressing mode
  is "free".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117519 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 01:49:06 +00:00
Evan Cheng
7c88cdcc3b Fix a major bug in operand latency computation. The use index must be adjusted 
by the number of defs first for it to match the instruction itinerary.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117518 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 01:46:29 +00:00
Dale Johannesen
e49406fd63 Fix pastos in handling of AVX cvttsd2si, PR8491. 
Bruno, please review, but I'm pretty sure this is right.
Patch by Alex Mac!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117514 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 00:35:54 +00:00
Owen Anderson
cfd0e1f3ae Add correct NEON encodings for vtbl and vtbx. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117513 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 00:18:46 +00:00
Owen Anderson
3eff4af42d Add correct NEON encodings for vext, vtrn, vuzp, and vzip. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117512 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 23:56:39 +00:00
Bob Wilson
1fa9d301a8 Fix compiler warnings about signed/unsigned comparisons. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117511 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 23:49:00 +00:00
Dale Johannesen
f514f52790 Teach InstCombine not to use Add and Neg on FP. PR 8490. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117510 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 23:45:18 +00:00
Evan Cheng
f40deed62f Shifter ops are not always free. Do not fold them (especially to form 
complex load / store addressing mode) when they have higher cost and
when they have more than one use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117509 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 23:41:30 +00:00
Evan Cheng
de5fa932b9 Putting r117193 back except for the compile time cost. Rather than assuming fallthroughs uses all registers, just gather the union of all successor liveins. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117506 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 23:17:17 +00:00
Jim Grosbach
7e3383c007 Refactor ARM STR/STRB instruction patterns into STR{B}i12 and STR{B}rs, like 
the LDR instructions have. This makes the literal/register forms of the
instructions explicit and allows us to assign scheduling itineraries
appropriately. rdar://8477752

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117505 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 23:12:14 +00:00
Owen Anderson
498ec20703 Provide correct encodings for NEON vcvt, which has its own special immediate encoding 
for specifying fractional bits for fixed point conversions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117501 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 22:49:00 +00:00
Jim Grosbach
6b15639e26 Trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117496 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 21:39:08 +00:00
Owen Anderson
d2fbdb7f5c Provide correct encodings for the get_lane and set_lane variants of vmov. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117495 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 21:28:09 +00:00
Rafael Espindola
3cede2d0b2 Add support for R_386_TLS_GD, R_386_TLS_LE_32, R_386_TLS_IE and R_386_TLS_LE. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117494 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 21:23:52 +00:00
Kevin Enderby
529b1a4398 Added the x86 instruction ud2b (2nd official undefined instruction). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117485 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 20:46:49 +00:00
Jim Grosbach
ccf72caa92 JIT imm12 encoding for constant pool entry references. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117483 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 20:39:40 +00:00
Bob Wilson
f20700ca77 SelectionDAG shuffle nodes do not allow operands with different numbers of 
elements than the result vector type.  So, when an instruction like:

%8 = shufflevector <2 x float> %4, <2 x float> %7, <4 x i32> <i32 1, i32 0, i32 3, i32 2>

is translated to a DAG, each operand is changed to a concat_vectors node that appends 2 undef elements.  That is:

shuffle [a,b], [c,d] is changed to:
shuffle [a,b,u,u], [c,d,u,u]

That's probably the right thing for x86 but for NEON, we'd much rather have:

shuffle [a,b,c,d], undef

Teach the DAG combiner how to do that transformation for ARM.  Radar 8597007.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117482 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 20:38:28 +00:00
Rafael Espindola
bc82d8b84f Implement R_X86_64_GOTTPOFF, R_X86_64_TLSGD and R_X86_64_TPOFF32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117481 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 20:28:07 +00:00
Jim Grosbach
f31430f6ec ARM JIT fix for LDRi12 and company. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117478 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 19:55:59 +00:00
Benjamin Kramer
07ee63283c Replace pointer arithmetic with StringRef::substr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117477 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 19:53:52 +00:00
Owen Anderson
f587a9352a Provide correct NEON encodings for vdup. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117475 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 19:25:54 +00:00
Michael J. Spencer
6dad10ed66 x86-Win32: Switch ftol2 calling convention from stdcall to C. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117474 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 18:52:38 +00:00
Michael J. Spencer
3931b54a5f COFF: Add IMAGE_SCN_MEM_READ to text sections. 
There are currently 100 references to COFF::IMAGE_SCN in 6 files
and 11 different functions. Section to attribute mapping really
needs to happen in one place to avoid problems like this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117473 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 18:52:29 +00:00
Michael J. Spencer
579d7a3dcc Fix whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117472 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 18:52:20 +00:00
Rafael Espindola
4fa3478fc2 Set default type and flags for .init and .fini. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117471 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 18:45:20 +00:00
Rafael Espindola
83ff4d2b0d Produce an error for an invalid use of .symver. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117462 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 17:56:18 +00:00
Jim Grosbach
093177d5cd The new LDR* instruction patterns should handle the necessary encoding of 
operands in the TableGen'erated bits, so we don't need to do the additional
magic explicitly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117461 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 17:52:51 +00:00
Owen Anderson
0745c389d9 Add correct NEON encodings for vsli and vsri. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117459 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 17:40:08 +00:00
Owen Anderson
dd31ed67e6 Add correct NEON encodings for vsra and vrsra. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117458 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 17:29:29 +00:00
Jim Grosbach
063efbf569 The immediate operands of an LDRi12 instruction doesn't need the addrmode2 
encoding tricks. Handle the 'imm doesn't fit in the insn' case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117454 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 16:50:31 +00:00
Jim Grosbach
0ed257c036 Formatting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117453 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 16:30:18 +00:00
Rafael Espindola
bf052ac5d1 Symbols defined as the difference of other two end up in the ABS section. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117451 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 16:04:30 +00:00
Rafael Espindola
8818213247 Add support for the .symver directive. This is really ugly, but most of it is 
contained in the ELF object writer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117448 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 15:18:17 +00:00
Rafael Espindola
a6866969ba Move more logic to isInSymtab and simplify. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117447 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 14:44:52 +00:00
Mikhail Glushenkov
401b90a4bc 80-col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117443 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 09:09:10 +00:00
Mikhail Glushenkov
11d03f690e Remove try/catch(...) from Win32/Signals.inc. 
catch(...) is used in Win32/Signals.inc for catching Win32 structured
exceptions, but according to [1], this is wrong.

We can't simply change try/catch to __try/__finally, since this syntax is not
supported by MinGW. We can use __try/__finally on MSVC and __try1/__except1
macros on MinGW [2], but I think that that solution obfuscates the code too
much.

The use of try/catch(...) in Signals.inc makes it impossible to link
MinGW-compiled libSystem with llvm-gcc compiled executables. I propose that we
just remove try/catch(...) from Signals.inc, since the meaning of the code won't
change.

[1] http://members.cox.net/doug_web/eh.htm
[2] http://article.gmane.org/gmane.comp.compilers.llvm.cvs/81315

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117442 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 09:09:04 +00:00
Kevin Enderby
e460890351 Yet another tweak to X86 instructions to add ud2a as an alias to ud2 
(still to add ud2b).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117435 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 03:01:02 +00:00
Kevin Enderby
5a378076a4 Another tweak to X86 instructions to add the missing flex instruction (without 
the wait prefix).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117434 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 02:53:04 +00:00
Kevin Enderby
f4630ecc3f Tweaks to X86 instructions to allow the 'w' suffix in places it makes 
sense, when the instruction takes the 16-bit ax register or m16 memory
location.  These changes to llvm-mc matches what the darwin assembler
allows for these instructions.  Done differently than in r117031 that
caused a valgrind error which was later reverted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117433 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 02:32:19 +00:00
Jim Grosbach
77aee8e22c LDRi12 machine instructions handle negative offset operands normally (simple 
integer values), not with the addrmode2 encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117429 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 01:19:41 +00:00
Kevin Enderby
41e8cc73cf Added some aliases to the fcomip and fucompi Intel instructions. So that llvm-mc 
will accept versions that the darwin assembler allows.  Forms ending in "pi" and
forms without all the operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117427 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 00:59:28 +00:00
Jakob Stoklund Olesen
c95c1465fd Handle critical loop predecessors by making both inside and outside registers 
live out.

This doesn't prevent us from inserting a loop preheader later on, if that is
better.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117424 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 00:39:07 +00:00
Jakob Stoklund Olesen
0960a650b7 Compute critical loop predecessors in the same way as critical loop exits. 
Critical edges going into a loop are not as bad as critical exits. We can handle
them by splitting the critical edge, or by having both inside and outside
registers live out of the predecessor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117423 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 00:39:05 +00:00
Jakob Stoklund Olesen
8c593f9173 Physical registers trivially have multiple connected components all the time. 
Only virtuals should be requires to be connected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117422 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 00:39:01 +00:00
Jim Grosbach
f85dd04bfa One more spot where the new arm mode LDR instruction representation 
doesn't need the additional addrmode2 register operand. Missed it the first
time around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117421 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 00:38:16 +00:00
Wesley Peck
a06038369b Adding disassembler to the MicroBlaze backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117420 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 00:23:01 +00:00
Jim Grosbach
c1d30212e9 Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing on 
rdar://8477752.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117419 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 00:19:44 +00:00
Jim Grosbach
28e3fe961f Since I parameterized this bit, I should probably actually use said parameter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117418 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 23:58:04 +00:00
Dale Johannesen
1de4aa904e Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches 
memory, so a MachineMemOperand is useful (not propagated
into the MachineInstr yet).  No functional change except
for dump output.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117413 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 23:11:10 +00:00
Andrew Trick
3d26d5d524 Remove the vector of live vregs. I thought we would need to track 
them, but hopefully we won't. And this is not the right data structure
to do it anyway.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117412 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 22:58:24 +00:00
Owen Anderson
86ed2324a6 Add correct NEON encodings for vqshl, vqshrn, vqshrun, vqrshl, vqshrn, and vqrshrun. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117411 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 22:50:46 +00:00
Jim Grosbach
3e55612472 First part of refactoring ARM addrmode2 (load/store) instructions to be more 
explicit about the operands. Split out the different variants into separate
instructions. This gives us the ability to, among other things, assign
different scheduling itineraries to the variants. rdar://8477752.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117409 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 22:37:02 +00:00
Jakob Stoklund Olesen
3a0e0715a5 After splitting, compute connected components of all new registers, not just for 
the remainder register.

Example:

bb0:
  x = 1
bb1:
  use(x)
  ...
  x = 2
  jump bb1

When x is isolated in bb1, the inner part breaks into two components, x1 and x2:

bb0:
  x0 = 1
bb1:
  x1 = x0
  use(x1)
  ...
  x2 = 2
  x0 = x2
  jump bb1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117408 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 22:36:09 +00:00
Jakob Stoklund Olesen
501dc42245 Verify that live intervals are connected. If there are multiple connected 
components, each should get its own virtual register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117407 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 22:36:07 +00:00
Jakob Stoklund Olesen
f1354ae95a Call RenumberValues for all new registers created during splitting. This is 
necessary to get correct hasPHIKill flags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117406 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 22:36:05 +00:00
Jakob Stoklund Olesen
79c0262fa8 Preserve PHIDef bits in cloned values during splitting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117405 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 22:36:02 +00:00
Devang Patel
7e13efad38 Assign source ordering to nodes created for StoreInst. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117404 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 22:14:52 +00:00
Owen Anderson
632c235a31 Correct NEON encodings for vshrn, vrshl, vrshr, vrshrn. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117402 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 21:58:41 +00:00
Owen Anderson
ac92262b61 Simplify classes for shift instructions, which are never commutable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117398 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 21:13:59 +00:00
Owen Anderson
3557d00a38 Provide correct NEON encodings for vshl, register and immediate forms. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117394 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 20:56:57 +00:00
Jakob Stoklund Olesen
f4a1e1a69f Teach MachineBasicBlock::print() to annotate instructions and blocks with 
SlotIndexes when available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117392 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 20:21:46 +00:00
Jakob Stoklund Olesen
dbcc2e119d Remmeber to print full live interval on verification error. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117391 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 20:21:43 +00:00
Rafael Espindola
61e3b91da7 Add support for .ident. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117389 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 19:35:47 +00:00
Jim Grosbach
0eb7d06ab1 Grammar. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117388 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 19:34:41 +00:00
Jim Grosbach
c3baf62800 Nuke extraneous comment. It's applicable elsewhere, but not in this func. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117387 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 19:22:23 +00:00
Andrew Trick
e16eecc323 Jakob's review of the basic register allocator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117384 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 18:34:01 +00:00
Owen Anderson
bc4118bd36 Add correct NEON encoding for vpadal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117380 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 18:18:03 +00:00
Rafael Espindola
de42e5c09b handle X86::EH_RETURN64 and X86::EH_RETURN. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117378 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 18:09:55 +00:00
Devang Patel
cbbe287f8a s/beginScope/beginInstruction/g 
s/endScope/endInstruction/g



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117376 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 17:49:02 +00:00
Owen Anderson
a88ea03bf2 Add NEON encodings for vmov and vmvn of immediates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117374 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 17:40:54 +00:00
Jakob Stoklund Olesen
e459d55f28 Don't verify physical registers going into landing pads. 
Magic is happening that we don't understand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117370 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 16:49:23 +00:00
Rafael Espindola
e4f506ff4b Implement some relaxations for arithmetic instructions. The limitation 
on RIP relative relocations looks artificial, but this is a superset of
what we were able to do before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117364 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 14:09:12 +00:00
Kalle Raiskila
505faa6b12 Change v64 datalayout in SPU. 
The SPU ABI does not mention v64, and all examples
in C suggest v128 are treated similarily to arrays, 
we use array alignment for v64 too. This makes the 
alignment of e.g. [2 x <2 x i32>] behave "intuitively"
and similar to as if the elements were e.g. i32s.

This also makes an "unaligned store" test to be 
aligned, with different (but functionally equivalent)
code generated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117360 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 10:45:47 +00:00
Evan Cheng
c8141dfc7f Use instruction itinerary to determine what instructions are 'cheap'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117348 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 02:08:50 +00:00
Evan Cheng
0e9996ca94 NEON vmov's are in Neon domain. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117347 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 02:03:05 +00:00
Nick Lewycky
a568d66512 For statistics that are only used in functions declared in !NDEBUG, wrap the 
declarations in !NDEBUG to avoid -Wunused-variable warnings. Patch by
Matt Beaumont-Gay!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117345 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 00:51:57 +00:00
Jakob Stoklund Olesen
0a12b801b5 InlineSpiller can also update LiveStacks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117338 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 00:11:35 +00:00
Jakob Stoklund Olesen
2d17293dd0 Make the spiller responsible for updating the LiveStacks analysis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117337 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 00:11:33 +00:00
Bob Wilson
7c730e7790 When the "true" and "false" blocks of a diamond if-conversion are the same, 
do not double-count the duplicate instructions by counting once from the
beginning and again from the end.  Keep track of where the duplicates from
the beginning ended and don't go past that point when counting duplicates
at the end.  Radar 8589805.

This change causes one of the MC/ARM/simple-fp-encoding tests to produce
different (better!) code without the vmovne instruction being tested.
I changed the test to produce vmovne and vmoveq instructions but moving
between register files in the opposite direction.  That's not quite the same
but predicated versions of those instructions weren't being tested before,
so at least the test coverage is not any worse, just different.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117333 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 00:02:24 +00:00
Bob Wilson
2ad40d3494 Change if-conversion to keep track of the extra cost due to microcoded 
instructions separately from the count of non-predicated instructions.  The
instruction count is used in places to determine how many instructions to
copy, predicate, etc. and things get confused if that count includes the
extra cost for microcoded ops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117332 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 00:02:21 +00:00
Bob Wilson
b3a6817d06 Tidy up redundant check. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117331 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 00:02:19 +00:00
Evan Cheng
38fd9f2a2d Neuter r117193 as it causes significant post-ra scheduler compile time regression. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117329 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 23:56:21 +00:00
Rafael Espindola
3336384239 Produce the headers directly in the Finish method. This allows us to use 
the existing streamer methods that are endian safe.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117323 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 22:26:55 +00:00
Dale Johannesen
d155d7e428 An stdcall function calling a non-stdcall function 
cannot use tailcall.  PR 8461.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117322 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 22:17:05 +00:00
Dan Gohman
87c5c2f069 Support TBAA attachments on calls. This is somewhat experimental. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117317 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 21:38:20 +00:00
Devang Patel
df8370bd70 Simplify. 
Do not count use of sdisel for single call instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117316 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 21:31:46 +00:00
Owen Anderson
5258b61966 Add correct encodings for NEON vabal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117315 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 21:29:04 +00:00
Dan Gohman
0b2136927d Fix chaining in TBAA's pointsToConstantMemory. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117314 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 21:24:55 +00:00
Devang Patel
948f7d0216 Add counters to count basic blocks and machine basic blocks with out of order line number info. 
Add counters to count how many basic blocks are entirely selected by fastisel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117310 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 20:55:43 +00:00
Owen Anderson
410aebc670 Add correct NEON encodings for vaba. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117309 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 20:52:57 +00:00
Devang Patel
9a31f0f398 Add simple counter to count no. of basic blocks without any line number information. At -O0, these basic block coule cause less than optimial debugging experience. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117307 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 20:45:32 +00:00
Dan Gohman
ae92af6771 Only read one bit for testing for a readonly type, leaving the other 
bits open for future uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117301 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 20:22:29 +00:00
Daniel Dunbar
b1e0f76352 MC/AsmParser: Fix relative precedence of {+,-} and comparison ops. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117299 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 20:18:56 +00:00
Daniel Dunbar
bdf90d679b MC/AsmLexer: Fix bug in source location for Slash token. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117298 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 20:18:53 +00:00
Owen Anderson
31e6ed890a Attempt to provide correct encodings for NEON vbit and vbif, even though we can't test them at the moment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117294 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 20:17:22 +00:00
Owen Anderson
4110b4325d Provide correct NEON encodings for vbsl. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117293 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 20:13:13 +00:00
Jim Grosbach
458f2dc5d1 imm12 operands aren't Thumb2 only, so rename the printer helper function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117291 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 20:00:01 +00:00
Dan Gohman
269008ee83 Add a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117288 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 19:47:25 +00:00
Owen Anderson
162875a9f3 Add correct instruction encodings for vbic, vorn, and vmvn. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117282 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 18:43:52 +00:00
Rafael Espindola
4921e2356e Add a virtual destructor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117280 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 18:38:32 +00:00
Owen Anderson
8c71eff594 Provide correct NEON encodings for vand, veor, and vorr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117279 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 18:28:30 +00:00
Owen Anderson
d0c5b6170f Add NEON encoding tests for vcgt and vacgt. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117276 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 18:03:59 +00:00
Rafael Espindola
cecbc3d282 Add support for emitting ARM file attributes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117275 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 17:50:35 +00:00
Owen Anderson
10c15e5d58 Add tests for NEON encodings of vcge and vacge. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117274 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 17:49:32 +00:00
Owen Anderson
4fe20bbd66 Add a warning about our inability to test the encoding of vceq with immediate zero. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117273 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 17:33:02 +00:00
Jakob Stoklund Olesen
d3b4895414 In which I learn how to forward declare template classes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117272 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 17:27:30 +00:00
Dan Gohman
e46a3881fc Update comments; BasicAA is no longer necessarily the end of the chain. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117268 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 16:29:52 +00:00
Dan Gohman
852dda4625 Reintroduce these asserts, now that BasicAA is a normal AliasAnalysis pass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117266 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 16:28:57 +00:00
Dan Gohman
17a0bf996f Fix a case where instcombine was stripping metadata (and alignment) 
from stores when folding in bitcasts.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117265 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 16:16:27 +00:00
Charles Davis
970bfcc7d8 Add a new 'hotpatch' attribute. This attribute will insert a two-byte no-op 
instruction at the beginning of each function that has the attribute, allowing
the function to be easily hooked and/or patched.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117264 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 15:37:09 +00:00
Duncan Sands
05897c8f26 ATTRIBUTE_UNUSED has been renamed to LLVM_ATTRIBUTE_UNUSED. 
Rather than rename this instance, use the cast-to-void idiom
instead.  This will hopefully fix the windows buildbots.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117262 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-25 13:10:03 +00:00
Rafael Espindola
24ba4f7f5f Add X86::reloc_global_offset_table and use it to have a single place where 
we check for _GLOBAL_OFFSET_TABLE_.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117241 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-24 17:35:42 +00:00
Duncan Sands
5f28475b30 Fix PR8445: a block with no predecessors may be the entry block, in which case 
it isn't unreachable and should not be zapped.  The check for the entry block
was missing in one case: a block containing a unwind instruction.  While there,
do some small cleanups: "M" is not a great name for a Function* (it would be
more appropriate for a Module*), change it to "Fn"; use Fn in more places.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117224 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-24 12:23:30 +00:00
Benjamin Kramer
a53fe6070c SmallVectorize. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117213 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-23 17:10:24 +00:00
Eric Christopher
a4633f5d74 Move rejection of NEON parameters earlier in fast isel call processing, 
note that we can actually handle some f64 arguments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117209 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-23 09:37:17 +00:00
Benjamin Kramer
4d1dca92bd Make the disassembler tables const so they end up in read-only memory. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117206 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-23 09:10:44 +00:00
Michael J. Spencer
c527407010 X86: Emit _fltused instead of __fltused on Windows x64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117205 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-23 09:06:59 +00:00
Chandler Carruth
19e57025d4 Move the remaining attribute macros to systematic names based on the attribute 
name and prefixed with 'LLVM_'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117203 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-23 08:40:19 +00:00
Chandler Carruth
5117709a1d Remove a define which is never referenced. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117202 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-23 08:25:16 +00:00
Chandler Carruth
100c267249 Switch attribute macros to use 'LLVM_' as a prefix. We retain the old names 
until other LLVM projects using these are cleaned up.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117200 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-23 08:10:43 +00:00
Chandler Carruth
2b3ef8b065 Fix a likely bug in an assertion by adding parentheses around '||'. This bug 
was found by a GCC warning. ;]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117199 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-23 07:46:14 +00:00
Evan Cheng
5c2d428f43 Enable ARM fastcc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117194 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-23 02:19:37 +00:00
Evan Cheng
ec6906ba47 Properly model the latency of register defs which are 1) function returns or 
2) live-outs.

Previously the post-RA schedulers completely ignore these dependencies since
returns, branches, etc. are all scheduling barriers. This patch model the
latencies between instructions being scheduled and the barriers. It also
handle calls by marking their register uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117193 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-23 02:10:46 +00:00
Evan Cheng
dd9dd6f857 Latency between CPSR def and branch is zero. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117192 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-23 02:04:38 +00:00
Jakob Stoklund Olesen
7871687604 Verify LiveIntervals against the CFG, ensuring that live-in values are live-out 
of all predecessors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117191 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-23 00:49:09 +00:00
Jim Grosbach
a9a968d1ef Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117188 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-22 23:48:29 +00:00
Andrew Trick
f433106054 Nonvirtual dtor that was accessible enough to be bad. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117180 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-22 23:33:19 +00:00
Gabor Greif
41f31ef28e fix memory-layout assumption which only holds on little-endian systems 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117176 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-22 23:16:11 +00:00
Andrew Trick
14e8d71cc9 This is a prototype of an experimental register allocation 
framework. It's purpose is not to improve register allocation per se,
but to make it easier to develop powerful live range splitting. I call
it the basic allocator because it is as simple as a global allocator
can be but provides the building blocks for sophisticated register
allocation with live range splitting. 

A minimal implementation is provided that trivially spills whenever it
runs out of registers. I'm checking in now to get high-level design
and style feedback. I've only done minimal testing. The next step is
implementing a "greedy" allocation algorithm that does some register
reassignment and makes better splitting decisions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117174 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-22 23:09:15 +00:00
Jakob Stoklund Olesen
3bf7cf9f0e Add more verification of LiveIntervals. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117170 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-22 22:48:58 +00:00
Jakob Stoklund Olesen
2bfb324684 Be more strict about detecting multi-use blocks for isolation. 
When a block has exactly two uses and the register is both live-in and live-out,
don't isolate the block. We would be inserting two copies, so we haven't really
made any progress.

If the live-in and live-out values separate into disconnected components after
splitting, we would be making progress. We can't detect that for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117169 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-22 22:48:56 +00:00
Jim Grosbach
f8da5f5dfa ARM mode encoding information for CLZ, RBIT, REV*, and PKH*. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117165 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-22 22:12:16 +00:00
Evan Cheng
c8f46c45a0 Unbreak build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117155 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-22 21:49:09 +00:00
Bob Wilson
364f17c471 Teach instcombine to set the alignment arguments for NEON load/store intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117154 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-22 21:41:48 +00:00
Evan Cheng
b179b46cc5 Transfer implicit ops when forming load multiple and return instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117151 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-22 21:29:58 +00:00