Akira Hatanaka
f09a03776d
[mips] Generate big GOT code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168460 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-21 20:40:38 +00:00
Akira Hatanaka
94e472832f
Initial implementation of MipsTargetLowering::isLegalAddressingMode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168230 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-17 00:25:41 +00:00
Akira Hatanaka
a032dbd62f
[mips] Fix delay slot filler so that instructions with register operand $1 are
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allowed in branch delay slot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-16 02:39:34 +00:00
Akira Hatanaka
e90a3bcae1
[mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node.
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Patch by Sasa Stankovic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167548 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 19:10:58 +00:00
Akira Hatanaka
3c77033a90
[mips] Set flag neverHasSideEffects flag on floating point conversion
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instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167348 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-03 00:53:12 +00:00
Akira Hatanaka
3c9c1ab7b7
[mips] Set flag isAsCheapAsAMove flag on instruction LUi.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167345 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-03 00:26:02 +00:00
Akira Hatanaka
11a45c214c
[mips] Stop reserving register AT and use register scavenger when a scratch
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register is needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167341 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-03 00:05:43 +00:00
Akira Hatanaka
fb60a4e823
[mips] Fix bug in test case. Disable machine LICM to prevent instruction from
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being moved out of a basic block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167322 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-02 21:46:42 +00:00
Akira Hatanaka
5c87b732f2
[mips] Use register number instead of name to print register $AT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167315 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-02 21:26:03 +00:00
Akira Hatanaka
173192fa71
[mips] Delete MipsFunctionInfo::EmitNOAT. Unconditionally print directive
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"set .noat" so that the assembler doesn't issue warnings when register $AT is
used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167310 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-02 20:56:25 +00:00
Akira Hatanaka
497204a94b
[mips] Set isAsCheapAsAMove flag on ADDiu and DADDiu, which enables
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re-materialization of immediate loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167153 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31 18:37:55 +00:00
Akira Hatanaka
39fa606992
Test case for r167039. Check that tail-call optimization is disabled for
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mips16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167139 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31 17:25:23 +00:00
Reed Kotler
9441125d63
Implement ADJCALLSTACKUP and ADJCALLSTACKDOWN
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167107 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31 05:21:10 +00:00
Akira Hatanaka
2f34d754d0
[mips] Allow tail-call optimization for vararg functions and functions which
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use the caller's stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167048 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 20:16:31 +00:00
Reed Kotler
c09856b535
Change mips16 delay slot jumps to non delay slot forms by default.
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We will make them delay slot forms if there is something that can be
placed in the delay slot during a separate pass. Mips16 extended instructions
cannot be placed in delay slots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166990 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 00:54:49 +00:00
Reed Kotler
576b1dbbef
Implement patterns for extloadi8 and extloadi16
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166960 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29 19:39:04 +00:00
Reed Kotler
8834a20d5d
Expand all atomic ops for mips16.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166935 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-29 16:16:54 +00:00
Reed Kotler
3a9f4568fb
Implement brind operator for mips16.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166903 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-28 23:08:07 +00:00
Reed Kotler
f99998a2b0
This patch is for the implementation of mips16 complex pattern addr16.
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Previously mips16 was sharing the pattern addr which is used for mips32
and mips64. This had a number of problems:
1) Storing and loading byte and halfword quantities for mips16 has particular
problems due to the primarily non mips16 nature of SP. When we must
load/store byte/halfword stack objects in a function, we must create a mips16
alias register for SP. This functionality is tested in stchar.ll.
2) We need to have an FP register under certain conditions (such as
dynamically sized alloca). We use mips16 register S0 for this purpose.
In this case, we also use this register when accessing frame objects so this
issue also affects the complex pattern addr16. This functionality is
tested in alloca16.ll.
The Mips16InstrInfo.td has been updated to use addr16 instead of addr.
The complex pattern C++ function for addr has been copied to addr16 and
updated to reflect the above issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166897 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-28 06:02:37 +00:00
Reed Kotler
7797e8f901
Implement MipsHi for mips16
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166852 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-27 00:57:14 +00:00
Akira Hatanaka
21a9a98b77
[mips] Do not tail-call optimize vararg functions or functions with byval
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arguments.
This is rather conservative and should be fixed later to be more aggressive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166851 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-27 00:56:56 +00:00
Akira Hatanaka
4618e0b574
[mips] Make sure FuncArg doesn't advance when OrigArgIndex is the same as in the
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previous iteration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166850 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-27 00:44:39 +00:00
Reed Kotler
25424154f4
implement mips16 tls global addr
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166827 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-26 22:57:32 +00:00
Reed Kotler
a81be80b0e
Implement carry for subtract/add for mips16
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166755 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-26 04:46:26 +00:00
Reed Kotler
28a6214b59
implement large (>16 bit) constant loading.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166749 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-26 03:09:34 +00:00
Reed Kotler
30675b12fd
fix test setgek.ll so that it will not give false "make check"
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failure in some cases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166747 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-26 01:29:42 +00:00
Reed Kotler
4c5a6dab17
implement mips16 patterns for select nodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166721 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-25 21:33:30 +00:00
Akira Hatanaka
2ef5bd3ba6
[mips] Make sure sret argument is returned in register V0.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166539 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-24 02:10:54 +00:00
Reed Kotler
293e5d0e0a
implement setXX patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166459 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-23 01:35:48 +00:00
Akira Hatanaka
30580cea43
[mips] Use 64-bit registers to return an sret pointer if target ABI is N64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166344 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-19 22:11:40 +00:00
Akira Hatanaka
2b861be96e
[mips] Add code to do tail call optimization.
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Currently, it is enabled only if option "enable-mips-tail-calls" is given and
all of the callee's arguments are passed in registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166342 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-19 21:47:33 +00:00
Reed Kotler
95a2bb4cdf
Add conditional branch instructions and their patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166134 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17 22:29:54 +00:00
Reed Kotler
7d90d4d709
Div, Rem int/unsigned int
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165783 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-12 02:01:09 +00:00
Akira Hatanaka
97d9f081a9
Implement MipsTargetLowering::CanLowerReturn.
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Patch by Sasa Stankovic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165585 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-10 01:27:09 +00:00
Reed Kotler
dfb8dbb4fd
Patch for integer multiply, signed/unsigned, long/long long.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165322 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-05 18:27:54 +00:00
Reed Kotler
0585b38088
checking test case for r164811. was an omission to not check this in. this was already approved
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164972 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-01 21:35:06 +00:00
Akira Hatanaka
21731d876c
MIPS DSP: add operands to make sure instruction strings are being matched.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164849 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-28 21:23:16 +00:00
Akira Hatanaka
93ba059e48
MIPS DSP: other miscellaneous instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164845 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-28 20:50:31 +00:00
Akira Hatanaka
e91ff1d135
MIPS DSP: ADDUH.QB instruction sub-class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164840 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-28 20:16:04 +00:00
Akira Hatanaka
cb39aa05af
MIPS DSP: ABSQ_S.PH instruction sub-class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164787 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 19:09:21 +00:00
Akira Hatanaka
23bb38f034
MIPS DSP: SHLL.QB instruction sub-class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164786 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 19:05:08 +00:00
Akira Hatanaka
5e92990703
Test case for r164755 and 164756.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164757 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 04:12:30 +00:00
Akira Hatanaka
a216401621
MIPS DSP: ADDU.QB instruction sub-class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164754 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 03:13:59 +00:00
Akira Hatanaka
01f7089bca
MIPS DSP: Branch on Greater Than or Equal To Value 32 in DSPControl Pos Field instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164751 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 02:15:57 +00:00
Akira Hatanaka
2df483efb3
MIPS DSP: all the remaining instructions which read or write accumulators.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164750 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 02:11:20 +00:00
Akira Hatanaka
fd89e6ffda
MIPS DSP: add support for extract-word instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164749 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 02:05:42 +00:00
Akira Hatanaka
7509ec18d1
MIPS DSP: add vector load/store patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164744 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 01:50:59 +00:00
Akira Hatanaka
f934d159ae
Handled unaligned load/stores properly in Mips16
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Patch by Reed Kotler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163956 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-15 01:02:03 +00:00
Logan Chien
fd91d8dd7e
Fix UseInitArray option for MIPS target.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163193 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 06:17:17 +00:00
Akira Hatanaka
273956d8c6
Fix mips' long branch pass.
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Instructions emitted to compute branch offsets now use immediate operands
instead of symbolic labels. This change was needed because there were problems
when R_MIPS_HI16/LO16 relocations were used to make shared objects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162731 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-28 03:03:05 +00:00