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413 Commits

Author SHA1 Message Date
Chris Lattner
35aa94b229 fix rdar://8438816 - unrecognized 'fildq' instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114116 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 20:46:38 +00:00
Chris Lattner
d0bcc9a015 lcall and ljmp always default to lcalll and ljmpl. This finally 
wraps up r8418316


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113949 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-15 05:30:20 +00:00
Chris Lattner
cbb442640f apparently jmpl $1,$2 is an alias for ljmpl, similiarly 
for call.  Add this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113948 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-15 05:25:21 +00:00
Chris Lattner
250b948f21 Disambiguate lcall/ljmp to the 32-bit version. This happens 
even in 64-bit mode apparently.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113945 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-15 05:14:54 +00:00
Chris Lattner
6c1b3b1e32 fix the encoding of sldt GR16 to have the 0x66 prefix, and 
add sldt GR32, which isn't documented in the intel manual
but which gas accepts.  Part of rdar://8418316


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113938 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-15 04:45:10 +00:00
Chris Lattner
cfad564043 implement aliases for shld/shrd, part of rdar://8418316 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113937 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-15 04:37:18 +00:00
Chris Lattner
e9e16a36d9 fix rdar://8431880 - rcl/rcr with no shift amount not recognized 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113936 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-15 04:33:27 +00:00
Chris Lattner
84f362d891 add various broken forms of fnstsw. I didn't add the %rax 
version because it adds a prefix and makes even less sense
than the other broken forms.  This wraps up rdar://8431422


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113932 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-15 04:15:16 +00:00
Chris Lattner
8f777a205e add some aliases for f[u]comi, part of rdar://8431422 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113930 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-15 04:08:38 +00:00
Chris Lattner
2d592d10a5 add a bunch of aliases for fp operations with no operand, 
rdar://8431422


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113929 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-15 04:04:33 +00:00
Chris Lattner
ef63c9a9b6 add a terrible hack to allow out with dx is parens, a gas bug. 
This fixes PR8114


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113894 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-14 23:34:29 +00:00
Chris Lattner
0989d29d09 add a missed cmov alias, part of rdar://8416805 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113693 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-11 17:08:22 +00:00
Chris Lattner
697d37a436 add support for all the setCC aliases. Part of rdar://8416805 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113692 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-11 17:06:05 +00:00
Chris Lattner
dfa3c9d982 add support for pushfd/popfd which are aliases for pushfl/popfl. 
This fixes rdar://8408129 - pushfd and popfd get invalid instruction mnemonic errors


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113690 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-11 16:39:16 +00:00
Chris Lattner
ee211d0ed6 implement rdar://8407928 - support for in/out with a missing "a" register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113689 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-11 16:32:12 +00:00
Daniel Dunbar
1ab6f2fa7a llvm-mc: Don't crash when using -n and we see a directive before the initial section. 
- This is annoying, because we have to scatter this check everywhere that could emit real data, but I see no better solution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113552 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-09 22:42:59 +00:00
Daniel Dunbar
93bd4d1e6b llvm-mc: Make sure we exit != 0 if any errors are encountered. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113551 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-09 22:42:56 +00:00
Chris Lattner
90b54547d9 fix rdar://8407548, I missed the commuted form of xchg/test without a suffix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113427 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 22:27:05 +00:00
Chris Lattner
373c458850 fix bugs in push/pop segment support, rdar://8407242 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113422 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 22:13:08 +00:00
Chris Lattner
c8ae35a8e8 add support for the commuted form of the test instruction, rdar://8018260. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113352 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 05:51:12 +00:00
Chris Lattner
ba8e81cca2 implement proper support for sysret{,l,q}, rdar://8403907 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113350 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 05:45:34 +00:00
Chris Lattner
ba8cea450f implement the iret suite of instructions properly, 
fixing rdar://8403974



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113349 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 05:38:31 +00:00
Chris Lattner
2544f42692 add support for instruction prefixes on the same line as the instruction, 
implementing rdar://8033482 and PR7254.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113348 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 05:17:37 +00:00
Chris Lattner
9607c40601 gas accepts xchg <mem>, <reg> as a synonym for xchg <reg>, <mem>. 
Add this to the mc assembler, fixing PR8061


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113346 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 04:53:27 +00:00
Chris Lattner
a247685b30 fix the encoding of the "jump on *cx" family of instructions, 
rdar://8061602


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113343 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 04:30:51 +00:00
Chris Lattner
e9e0fc5eed add missing cmov aliases, this resolves rdar://8208499 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113189 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-07 00:05:45 +00:00
Chris Lattner
c5cebeb3cb "sldt <mem>" is ambiguous in 64-bit mode, but should 
always be disambiguated as sldtw.  sldtw and sldtq with
a mem operands have the same effect, but sldtw is more
compact.  Force it to sldtw, resolving rdar://8017530


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113186 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-06 23:51:44 +00:00
Chris Lattner
d68c474ec5 fix rdar://8017621 - llvm-mc can't guess encoding for "push $(1000)" 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113184 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-06 23:40:56 +00:00
Chris Lattner
9389b60a03 fix the operand constraints of the immediate form of in/out, 
allowing unsigned 8-bit operands.  This fixes rdar://8208481



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113182 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-06 23:29:05 +00:00
Benjamin Kramer
1674b0b0e4 Add AsmParser support for the ELF .previous directive. Patch by Roman Divacky. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112849 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-02 18:53:37 +00:00
Chris Lattner
a5729aae5d fixme accomplished 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112386 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-28 20:40:28 +00:00
Daniel Dunbar
3d6e4c3111 X86: Fix misencode of RI64mi8. This fixes OpenSSL / x86_64-apple-darwin10 / clang -O3. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112089 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-25 21:11:02 +00:00
Daniel Dunbar
fba88d49e3 MC/X86: Tweak imul recognition, previous hack only applies for the imul form 
taking immediates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111950 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-24 19:37:56 +00:00
Daniel Dunbar
ae528f65ba MC/X86: Add custom hack for recognizing "imul $12, %eax" and friends. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111947 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-24 19:24:18 +00:00
Daniel Dunbar
e17edff28f MC/AsmParser: Change ParseExpression to use ParseIdentifier(), to support 
dollars in identifiers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111946 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-24 19:13:42 +00:00
Daniel Dunbar
ee9102587e MC/X86: Warn on scale factors > 1 without index register, instead of erroring, 
for 'as' compatibility.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111945 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-24 19:13:38 +00:00
Daniel Dunbar
1f1b865c40 MC/Parser: Accept leading dollar signs in identifiers. 
- Implemented by manually splicing the tokens. If this turns out to be
   problematically platform specific, a more elegant solution would be to
   implement some context dependent lexing support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111934 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-24 18:12:12 +00:00
Chris Lattner
a78c67e9bb fix rdar://7997827 - Accept and ignore LL and ULL suffixes on integer literals. 
Also fix 0b010 syntax to actually work while we're at it :-)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111876 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-24 00:43:25 +00:00
Chris Lattner
59f8a6a666 fix PR7465, mishandling of lcall and ljmp: intersegment long 
call and jumps.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111496 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-19 01:18:43 +00:00
Daniel Dunbar
09062b1672 MC/X86/AsmParser: Give an explicit error message when we reject an instruction 
because it could have an ambiguous suffix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110890 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-12 00:55:42 +00:00
Daniel Dunbar
345a9a6269 MC/ARM: Add basic support for handling predication by parsing it out of the mnemonic into a separate operand form. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110794 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-11 06:37:20 +00:00
Daniel Dunbar
e25c6b95ce MC/AsmParser: Fix a bug in macro argument parsing, which was dropping 
parentheses from argument lists.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110692 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-10 17:38:52 +00:00
Daniel Dunbar
079515f382 tests: Mark MC/AsmParser tests as requiring x86 for now -- almost all of them 
rely on using a specific x86 triple to test what they want to test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110337 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-05 15:44:15 +00:00
Bruno Cardoso Lopes
3c8e1bee63 Support x86 "eiz" and "riz" pseudo index registers in the assembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109295 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-24 00:06:39 +00:00
Matt Fleming
19d92fcae2 Consolidate the ELF section directive tests into a single file as 
suggested by Chris Lattner.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109290 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-23 23:40:41 +00:00
Bruno Cardoso Lopes
6d7019bcc4 Move AVX encoding tests to different files 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109269 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-23 21:25:26 +00:00
Bruno Cardoso Lopes
f528d2b438 Add AVX version of CLMUL instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109248 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-23 18:41:12 +00:00
Bruno Cardoso Lopes
6b7e9168a4 Add complete assembler support for FMA3 instructions, with descriptions and encodings taken from the AVX manual 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109204 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-23 00:54:35 +00:00
Bruno Cardoso Lopes
fb583a9842 Add remaining AVX instructions (most of them dealing with GR64 destinations. This complete the assembler support for the general AVX ISA. But we still miss instructions from FMA3 and CLMUL specific feature flags, which are now the next step 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109168 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-22 21:18:49 +00:00
Bruno Cardoso Lopes
2b69143083 Add more 256-bit forms for a bunch of regular AVX instructions 
Add 64-bit (GR64) versions of some instructions (which are not
described in their SSE forms, but are described in AVX)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109063 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 23:53:50 +00:00
Bruno Cardoso Lopes
e29f37f6a1 Add missing AVX convert instructions. Those instructions are not described in their SSE forms (although they exist), but add the AVX forms anyway, so the assembler can benefit from it 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109039 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 21:37:59 +00:00
Bruno Cardoso Lopes
cf6ca03128 Add AVX only vzeroall and vzeroupper instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109002 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 08:56:24 +00:00
Bruno Cardoso Lopes
7d7d15a159 Add new AVX vpermilps, vpermilpd and vperm2f128 instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108984 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 03:07:42 +00:00
Bruno Cardoso Lopes
4b13f3cf3d Add new AVX vmaskmov instructions, and also fix the VEX encoding bits to support it 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108983 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 02:46:58 +00:00
Bruno Cardoso Lopes
1154f426d7 Add new AVX vextractf128 instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108964 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 23:19:02 +00:00
Matt Fleming
a7f9563c01 Include some tests for the recently committed ELF section directive 
handlers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108938 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 21:37:30 +00:00
Bruno Cardoso Lopes
e1c29be6f0 Add new AVX instruction vinsertf128 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108892 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 19:44:51 +00:00
Bruno Cardoso Lopes
7a2b701ef6 x86_32 tests for vbroadcast 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108789 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 00:11:50 +00:00
Bruno Cardoso Lopes
43945d99de Add AVX vbroadcast new instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108788 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-20 00:11:13 +00:00
Bruno Cardoso Lopes
94143ee625 Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp instructions! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108769 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 23:32:44 +00:00
Daniel Dunbar
77e2dd7bb2 X86: Mark JMP{32,64}[mr] as requires 32-bit/64-bit mode. They are the same 
instruction, we only want to allow the one for the current subtarget.
 - This also fixes suffix matching for jmp instructions, because it eliminates
   the ambiguity between 'jmpl' and 'jmpq'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108746 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 20:44:16 +00:00
Daniel Dunbar
926f2bb3d8 X86-64: Mark WINCALL and more tail call instructions as code gen only. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108685 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 07:21:07 +00:00
Daniel Dunbar
90b374cded MC/X86: We now match instructions like "incl %eax" correctly for the arch we are 
assembling; remove crufty custom cleanup code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108681 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 06:14:54 +00:00
Daniel Dunbar
9ece46d172 tests: Force another triple. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108666 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-19 00:43:58 +00:00
Daniel Dunbar
030794bd87 tests: Force triples. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108658 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-18 21:16:10 +00:00
Daniel Dunbar
6a46d571b4 MC/AsmParser: Fix .abort and .secure_log_unique to accept arbitrary token 
sequences, not just strings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108655 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-18 20:15:59 +00:00
Daniel Dunbar
7a570d09ac MC/AsmParser: Add macro argument substitution support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108654 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-18 19:00:10 +00:00
Daniel Dunbar
c64a0d7c3e MC/AsmParser: Add basic support for macro instantiation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108653 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-18 18:54:11 +00:00
Daniel Dunbar
6d8cf082f6 MC/AsmParser: Add basic parsing support for .macro definitions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108652 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-18 18:47:21 +00:00
Daniel Dunbar
3c802de01a MC/AsmParser: Add .macros_{off,on} support, not that makes sense since we don't 
support macros.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108649 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-18 18:38:02 +00:00
Eli Friedman
879259faa3 Test for ELF .size directive. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108607 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-17 03:15:24 +00:00
Bruno Cardoso Lopes
7dbf7d8b1c Add AVX 256-bit compare instructions and a bunch of testcases 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108286 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 22:06:38 +00:00
Bruno Cardoso Lopes
87a85c7ef0 AVX 256-bit conversion instructions 
Add the x86 VEX_L form to handle special cases where VEX_L must be set.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108274 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 21:07:28 +00:00
Bruno Cardoso Lopes
fd920fa59a Add AVX 256-bit packed logical forms 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108224 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 02:38:35 +00:00
Bruno Cardoso Lopes
6991623dd7 Add AVX 256-bit unop arithmetic instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108223 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 01:53:31 +00:00
Bruno Cardoso Lopes
a0d09a85e2 Add AVX 256 binary arithmetic instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108207 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 23:04:15 +00:00
Bruno Cardoso Lopes
aa099be71f Add AVX 256-bit MOVMSK forms 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108184 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 20:06:32 +00:00
Daniel Dunbar
b6c3a607ac MC/AsmParser: Move .tbss and .zerofill parsing to Darwin specific parser. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108180 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 19:37:35 +00:00
Daniel Dunbar
492b7a21cb MC/AsmParser: Move .desc parsing to Darwin specific parser. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108179 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 19:22:53 +00:00
Daniel Dunbar
9ac66b008d MC/AsmParser: Move some misc. Darwin directive handling to DarwinAsmParser. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108174 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 18:49:22 +00:00
Bruno Cardoso Lopes
d52e78efac Add AVX 256-bit packed MOVNT variants 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108021 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 21:42:42 +00:00
Bruno Cardoso Lopes
2bfb8f6ef8 Add AVX 256-bit unpack and interleave 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108017 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 21:20:35 +00:00
Bruno Cardoso Lopes
e86b01c153 Start the support for AVX instructions with 256-bit %ymm registers. A couple of 
notes:
- The instructions are being added with dummy placeholder patterns using some 256
  specifiers, this is not meant to work now, but since there are some multiclasses
  generic enough to accept them,  when we go for codegen, the stuff will be already
  there.
- Add VEX encoding bits to support YMM
- Add MOVUPS and MOVAPS in the first round
- Use "Y" as suffix for those Instructions: MOVUPSYrr, ...
- All AVX instructions in X86InstrSSE.td will move soon to a new X86InstrAVX
  file.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107996 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 18:27:43 +00:00
Chris Lattner
834df19452 Rework segment prefix emission code to handle segments 
in memory operands at the same type as hard coded segments.
This fixes problems where we'd emit the segment override after
the REX prefix on instructions like:
mov %gs:(%rdi), %rax

This fixes rdar://8127102.  I have several cleanup patches coming
next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107917 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 22:28:12 +00:00
Chris Lattner
9fc05227a2 Implement the major chunk of PR7195: support for 'callw' 
in the integrated assembler.  Still some discussion to be
done.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107825 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 22:27:31 +00:00
Bruno Cardoso Lopes
cc69e13a36 Add more assembly opcodes for SSE compare instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107823 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 22:24:03 +00:00
Bruno Cardoso Lopes
ced9ec9bac Add AVX AES instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107798 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 18:24:20 +00:00
Bruno Cardoso Lopes
4f6bdf9042 Add AVX SSE4.2 instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107752 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 03:39:29 +00:00
Bruno Cardoso Lopes
09df2ae0d0 Add AVX SSE4.1 insertps, ptest and movntdqa instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107747 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 01:14:56 +00:00
Bruno Cardoso Lopes
3c14822312 Add AVX SSE4.1 extractps and pinsr instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107746 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 01:01:13 +00:00
Bruno Cardoso Lopes
4fd32db6a6 Add AVX SSE4.1 Extract Integer instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107740 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 00:07:24 +00:00
Bruno Cardoso Lopes
ee94e8297e Add the rest of AVX SSE4.1 packed move with sign/zero extend instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107723 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 23:15:17 +00:00
Bruno Cardoso Lopes
36869b69b0 Add part of AVX SSE4.1 packed move with sign/zero extend instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107720 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 23:01:41 +00:00
Bruno Cardoso Lopes
07de40629f Add AVX vblendvpd, vblendvps and vpblendvb instructions 
Update VEX encoding to support those new instructions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107715 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 22:36:24 +00:00
Bruno Cardoso Lopes
68b559e5f3 Add AVX SSE4.1 blend, mpsadbw and vdp 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107560 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-03 01:37:03 +00:00
Bruno Cardoso Lopes
4a544be3a8 Add AVX SSE4.1 binop (some forms of packed max,min,mul,pack,cmp) instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107558 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-03 01:15:47 +00:00
Bruno Cardoso Lopes
c607570563 Add AVX SSE4.1 Horizontal Minimum and Position instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107552 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-03 00:49:21 +00:00
Bruno Cardoso Lopes
2c70d4ad35 Add AVX SSE4.1 round instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107549 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-03 00:37:44 +00:00
Bruno Cardoso Lopes
f5cd8c51e3 - Add support for the rest of AVX SSE3 instructions 
- Fix VEX prefix to be emitted with 3 bytes whenever VEX_5M
represents a REX equivalent two byte leading opcode



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107523 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-02 22:06:54 +00:00
Bruno Cardoso Lopes
c6fcdeb8f9 Move SSE3 Move patterns to a more appropriate section 
Add AVX SSE3 packed horizontal and & sub instructions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107405 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-01 17:35:02 +00:00
Bruno Cardoso Lopes
7144821c61 Add AVX SSE3 packed addsub instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107404 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-01 17:08:18 +00:00
Bruno Cardoso Lopes
79b634c244 Add AVX SSE3 replicate and convert instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107375 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-01 02:33:39 +00:00
Bruno Cardoso Lopes
6596a62076 - Add AVX SSE2 Move doubleword and quadword instructions. 
- Add encode bits for VEX_W
- All 128-bit SSE 1 & SSE2 instructions that are described
  in the .td file now have a AVX encoded form already working.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107365 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-01 01:20:06 +00:00
Bruno Cardoso Lopes
e26f14d150 Add AVX SSE2 mask creation and conditional store instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107306 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-30 18:38:10 +00:00
Bruno Cardoso Lopes
1e4b723b20 Add AVX SSE2 packed integer extract/insert instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107293 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-30 17:03:03 +00:00
Bruno Cardoso Lopes
876085dcfa Add AVX SSE2 integer unpack instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107246 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-30 04:06:39 +00:00
Bruno Cardoso Lopes
d252fec7ae Add AVX SSE2 packed integer shuffle instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107245 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-30 03:47:56 +00:00
Bruno Cardoso Lopes
6d5d2b5de2 Add AVX SSE2 pack with saturation integer instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107241 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-30 02:30:25 +00:00
Bruno Cardoso Lopes
c0ea94a37c Add AVX SSE2 integer packed compare instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107240 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-30 02:21:09 +00:00
Bruno Cardoso Lopes
5a3a476750 - Add AVX form of all SSE2 logical instructions 
- Add VEX encoding bits to x86 MRM0r-MRM7r


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107238 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-30 01:58:37 +00:00
Bruno Cardoso Lopes
6c9fa43716 Add *several* AVX integer packed binop instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107225 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 23:47:49 +00:00
Bruno Cardoso Lopes
147b7cad2f Add AVX ld/st XCSR register. 
Add VEX encoding bits for MRMXm x86 form



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107204 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 20:35:48 +00:00
Bruno Cardoso Lopes
721ef73d88 Add AVX non-temporal stores 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107178 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 18:22:01 +00:00
Bruno Cardoso Lopes
ea86423cbd Add sqrt, rsqrt and rcp AVX instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107166 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 17:26:30 +00:00
Bruno Cardoso Lopes
4548260ab5 Described the missing AVX forms of SSE2 convert instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107108 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 00:36:02 +00:00
Bruno Cardoso Lopes
bdffc16d65 Add AVX convert CVTSS2SI{rr,rm} and CVTDQ2PS{rr,rm} instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106917 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-25 23:47:23 +00:00
Bruno Cardoso Lopes
161476ec34 Reapply r106896: 
Add several AVX MOV flavors
Support VEX encoding for MRMDestReg



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106912 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-25 23:33:42 +00:00
Bruno Cardoso Lopes
95325b08a3 revert this now, it's using avx instead of sse :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106906 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-25 23:04:29 +00:00
Bruno Cardoso Lopes
544a95d716 Add several AVX MOV flavors 
Support VEX encoding for MRMDestReg



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106896 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-25 22:27:51 +00:00
Bruno Cardoso Lopes
a0ae87fd5d Add some AVX convert instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106815 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-25 00:39:30 +00:00
Bruno Cardoso Lopes
788184365a - Add AVX COMI{SS,SD}{rr,rm} and UCOMI{SS,SD}{rr,rm}. 
- Fix a small VEX encoding issue.
- Move compare instructions to their appropriate place.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106787 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-24 20:48:23 +00:00
Chris Lattner
645b209c4a Teach the x86 mc assembler that %dr6 = %db6, this implements 
rdar://8013734


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106725 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-24 07:29:18 +00:00
Bruno Cardoso Lopes
6539dc6e6c Add AVX CMP{SS,SD}{rr,rm} instructions and encoding testcases 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106705 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-24 00:32:06 +00:00
Bruno Cardoso Lopes
e93e300ad0 Add AVX MOVMSK{PS,PD}rr instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106683 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-23 21:30:27 +00:00
Bruno Cardoso Lopes
428256b818 Add tests for different AVX cmp opcodes, also teach the x86 asm parser to understand the vcmp instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106678 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-23 21:10:57 +00:00
Bruno Cardoso Lopes
7dbfd07e32 Add AVX SHUF{PS,PD}{rr,rm} instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106672 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-23 20:07:15 +00:00
Nico Weber
50b9efc2a8 Add support for the x86 instructions "pusha" and "popa". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106671 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-23 20:00:58 +00:00
Bruno Cardoso Lopes
62a76c6401 Add AVX compare packed instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106600 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-22 23:37:59 +00:00
Bruno Cardoso Lopes
0caca3967b Reapply support for AVX unpack and interleave instructions, with 
testcases this time.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106593 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-22 23:02:38 +00:00
Bruno Cardoso Lopes
c3d57b179c Add AVX MOV{SS,SD}{rr,rm} instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106588 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-22 22:38:56 +00:00
Eric Christopher
97994e0262 Move a 64-bit test to the 64-bit file. Fixes an llvm-mc assertion 
during test runs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106577 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-22 21:11:51 +00:00
Bruno Cardoso Lopes
f4f4bad696 Refactor aliased packed logical instructions, also add 
AVX AND,OR,XOR,NAND{P}{S,D}{rr,rm} instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106374 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-19 02:44:01 +00:00
Bruno Cardoso Lopes
be4d595afd Shrink down code and add for free AVX {MIN,MAX}P{S,D}{rm,rr} instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106366 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-19 00:37:31 +00:00
Chris Lattner
1cf44fc051 fix rdar://7873482 by teaching the instruction encoder to emit 
segment prefixes.  Daniel wrote most of this patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106364 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-19 00:34:00 +00:00
Bruno Cardoso Lopes
d7f9cc4de7 Add {mix,max}{ss,sd}{rr,rm} AVX forms. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106264 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-18 01:12:56 +00:00
Bruno Cardoso Lopes
cf125d02a0 More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rm 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105870 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-12 01:53:48 +00:00
Bruno Cardoso Lopes
7be0d2c8e9 More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rr 
Handle OpSize TSFlag for AVX



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105869 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-12 01:23:26 +00:00
Bruno Cardoso Lopes
c902a59f4c More AVX instructions ({ADD,SUB,MUL,DIV}{SS,SD}rm) 
Introduce the VEX_X field


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105859 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-11 23:50:47 +00:00
Bruno Cardoso Lopes
99405df044 Reapply r105521, this time appending "LLU" to 64 bit 
immediates to avoid breaking the build.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105652 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-08 22:51:23 +00:00
Chris Lattner
1087f54ddb revert r105521, which is breaking the buildbots with stuff like this: 
In file included from X86InstrInfo.cpp:16:
X86GenInstrInfo.inc:2789: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2790: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2792: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2793: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2808: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2809: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2816: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2817: error: integer constant is too large for 'long' type



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105524 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-05 04:17:30 +00:00
Bruno Cardoso Lopes
3eca98bb3a Initial AVX support for some instructions. No patterns matched 
yet, only assembly encoding support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105521 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-05 03:53:24 +00:00
Kevin Enderby
31cc9655b6 MC/X86: Add alias for movzx. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105005 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 21:20:21 +00:00
Kevin Enderby
5e394429ab MC/X86: Add alias for fwait. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105001 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 20:59:10 +00:00
Kevin Enderby
31b6c5b2f3 Fix the use of x86 control and debug registers so that the assertion failure in 
getX86RegNum() does not happen.  Patch by Shantonu Sen!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104994 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 19:01:27 +00:00
Kevin Enderby
b106543592 Fix the x86 move to/from segment register instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104731 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 20:10:45 +00:00
Kevin Enderby
cf50a5390c Changed the encoding of X86 floating point stack operations where both operands 
are st(0).  These can be encoded using an opcode for storing in st(0) or using
an opcode for storing in st(i), where i can also be 0.  To allow testing with
the darwin assembler and get a matching binary the opcode for storing in st(0)
is now used.  To do this the same logical trick is use from the darwin assembler
in converting things like this:

fmul %st(0), %st

into this:

fmul %st(0)

by looking for the second operand being X86::ST0 for specific floating point
mnemonics then removing the second X86::ST0 operand.  This also has the add
benefit to allow things like:

fmul %st(1), %st

that llvm-mc did not assemble.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104634 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 20:52:34 +00:00
Daniel Dunbar
39e2dd7bab MC/X86: Add a hack to allow recognizing 'cmpltps' and friends. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104626 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 19:49:32 +00:00
Daniel Dunbar
79373680ed MC/X86: Define explicit immediate forms of cmp{ss,sd,ps,pd}. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104622 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 18:40:53 +00:00
Kevin Enderby
04ac770be9 The BT64ri8 record in X86Instr64bit.td was missing a REX_W which is required 
for the 64-bit version of the Bit Test instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104621 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 18:16:58 +00:00
Eric Christopher
7e2f5aaa67 Make sure aeskeygenassist uses an unsigned immediate field. 
Fixes rdar://8017638


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104617 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 17:33:22 +00:00