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245 Commits

Author SHA1 Message Date
Duraid Madina
a0a11d289d update tablegen files - nothing to see here 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24939 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-22 03:56:03 +00:00
Jim Laskey
e81aecbae6 Disengage DEBUG_LOC from non-PPC targets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24919 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-21 20:51:37 +00:00
Chris Lattner
b5d01436e3 Add some explicit type casts so that tblgen knows the type of the shiftamount, which is not necessarily the same as the type being shifted. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24595 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-05 02:34:29 +00:00
Chris Lattner
18c778f8be IA64 doesn't support the LOCATION node, and for some reason the ISelPattern 
stuff isn't using ISelLowering.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24567 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-01 18:19:53 +00:00
Nate Begeman
6510b22cec Support multiple ValueTypes per RegisterClass, needed for upcoming vector 
work.  This change has no effect on generated code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24563 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-01 04:51:06 +00:00
Chris Lattner
b19b899181 Pay attn to the node returned by SelectNodeTo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24551 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-30 23:02:08 +00:00
Nate Begeman
391c5d231a No longer track value types for asm printer operands, and remove them as 
an argument to every operand printing function.  Requires some slight
tweaks to x86, the only user.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24541 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-30 18:54:35 +00:00
Chris Lattner
f73bae1b73 No targets support line number info yet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24513 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-29 06:16:21 +00:00
Duraid Madina
7b1e154c5a add support for dynamic_stackalloc to the dag isel (thanks andrew ;) 
next up: support argument passing in memory, not just registers


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24490 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-25 07:49:25 +00:00
Duraid Madina
b6f023ac21 add support for div/rem to the dag->dag isel. yay. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24472 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-21 14:14:54 +00:00
Chris Lattner
42a76cdb04 Eliminate unneeded intermediate class. Move doFinalizeMethod to bottom of 
file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24470 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-21 08:40:17 +00:00
Chris Lattner
3dfbe2ed34 Start using shared asmprinter Constant Pool emitter, use shorter cpi names. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24469 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-21 08:38:26 +00:00
Chris Lattner
8b8b9515d6 Adjust to capitalized AsmPrinter method names 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24456 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-21 07:51:23 +00:00
Chris Lattner
2ec30b5e82 Use PrivateGlobalPrefix for basic block labels 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24452 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-21 07:39:22 +00:00
Chris Lattner
4bfa3a3eb0 Start using SwitchSection, allowing globals and functions to be emitted 
to specific sections.  Delete some dead functions copied from the X86 backend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24449 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-21 07:26:04 +00:00
Chris Lattner
62cbf2aab9 Rename SwitchSection -> switchSection to avoid conflicting with a future 
change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24443 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-21 06:55:27 +00:00
Chris Lattner
81a994e42e Start using PrivateGlobalPrefix correctly 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24442 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-21 06:51:52 +00:00
Duraid Madina
889649e78e add FP select. next up - divide! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24346 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-14 01:17:30 +00:00
Chris Lattner
ce8eb0c16b Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24233 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-08 02:11:51 +00:00
Duraid Madina
d525df3c27 add support for storing and returning bools 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24228 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-07 03:11:02 +00:00
Duraid Madina
00873ebc1f just some random hacking - calls (particularly indirect) need a lot of 
love (especially with -sched=simple)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24225 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-06 13:43:30 +00:00
Duraid Madina
21687e8f63 ask for 16-byte aligned jmpbufs. This should unbreak C++ on IA64 (and 
a bunch of other things) but is currently ignored by the code
generator.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24206 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-06 04:29:30 +00:00
Duraid Madina
764fe71e12 oops, forgot to load GP for indirect calls, though the old code now commented 
out failed (e.g. methcall) - now the code compiles, though it's not quite
right just yet (tm) ;)

would fix this but it's 3am! :O


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24186 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-04 17:55:53 +00:00
Duraid Madina
b97cc99058 kill redundant SP/GP/RP save/restores across calls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24183 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-04 10:01:10 +00:00
Duraid Madina
9f7290633a add support for loading bools 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24182 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-04 09:59:06 +00:00
Duraid Madina
49fcc4006c fun with predicates! (add TRUNC i64->i1, AND i1 i1, fix XOR i1 i1) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24175 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-04 00:57:56 +00:00
Duraid Madina
0e5e0d14a8 add pattern to load constant 0 into a predicate reg 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24164 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-03 10:09:32 +00:00
Chris Lattner
61bc60fc4f Fix a bug that prevented this pattern from matching 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24161 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-03 05:45:34 +00:00
Duraid Madina
056728f192 "fix" support for FP constants (this code asserts in the scheduler, 
though)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24152 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-02 07:32:59 +00:00
Duraid Madina
a2df2aee81 add F0 and F1 to the FP register class 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24151 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-02 07:30:39 +00:00
Chris Lattner
cb2583e17d This works now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24150 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-02 06:49:37 +00:00
Duraid Madina
5966955445 add support for SELECT to TargetSelectionDAG.td, add support for 
selecting ints to IA64, and a few other ia64 bits and pieces


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24147 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-02 02:37:18 +00:00
Duraid Madina
93856802ae add support for loading FP constants +0.0 and +1.0 to the dag isel, 
stop pretending -0.0 and -1.0 are machine constants


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24146 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-02 02:35:04 +00:00
Duraid Madina
7a8ef3a0d4 heh, scheduling was easy? 
need to send chris, jim and sampo a box of fish each


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24135 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-01 05:49:08 +00:00
Duraid Madina
dc9549b52c FORTRAN!!! :( and other similarly unfortunate things mean that on ia64 
one sometimes needs to pass FP args in both FP *and* integer registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24134 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-01 05:46:16 +00:00
Duraid Madina
aba8457125 so tablegen was thinking I might want to convert FPs to predicates. 
clever little tablegen!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24133 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-01 03:32:15 +00:00
Duraid Madina
e2fd9e2d9d add support for int->FP and FP->int ops, and add ia64 patterns for these 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24132 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-01 03:07:25 +00:00
Duraid Madina
d1eda6d155 add zeroextend predicate->integer 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24131 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-01 01:29:55 +00:00
Duraid Madina
363aff2f3c add FP compares and implicit register defs to the dag isel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24118 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-31 01:42:11 +00:00
Duraid Madina
5c2c64e567 fix some broken comparisons, this affected the Pattern isel too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24109 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-30 10:14:19 +00:00
Duraid Madina
25d0a88eb8 add some FP stuff, some mix.* stuff, and constant pool support to the 
DAG instruction selector, which should be destroyed one day (in the pattern
isel also) since ia64 can pack any constant in the instruction stream


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24094 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-29 16:08:30 +00:00
Duraid Madina
274ecfb782 add shladd 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24080 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-29 04:13:40 +00:00
Chris Lattner
aee436bcc0 These are autogenerated 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24063 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-28 18:26:52 +00:00
Duraid Madina
f2db9b88da DAG->DAG instruction selection for ia64! "hello world" works, not much else. 
use -enable-ia64-dag-isel to turn this on

TODO: delete lowering stuff from the pattern isel
    : get operations on predicate bits working
    : get other bits of pseudocode going
    : use sampo's mulh/mull-using divide-by-constant magic
    : *so* many patterns ("extr", "tbit" and "dep" will be fun :)
    : add FP
    : add a JIT!
    : get it working 100%

in short: this'll be happier in a couple of weeks, but it's here now so
the tester can make me feel guilty sooner.

OTHER: there are a couple of fixes to the pattern isel, in particular
making the linker happy with big blobs of fun like pypy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24058 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-28 17:46:35 +00:00
Chris Lattner
4bd4a54d57 remove dead stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24054 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-28 04:58:24 +00:00
Chris Lattner
a411bef105 Eliminate getClass, it is not needed 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24053 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-28 04:57:11 +00:00
Nate Begeman
d5ce204c5f Don't generate operations that aren't yet supported 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23858 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 01:52:45 +00:00
Chris Lattner
7a7c979ddd Fix CodeGen/Generic/bool-to-double.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23652 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-07 04:50:48 +00:00
Chris Lattner
0a37960d32 these registers don't belong to any register classes, so don't mark them 
as callee save.  They can never be generated by the compiler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23551 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 06:42:24 +00:00
Chris Lattner
0ffb1a56ff these methods get extra args 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23538 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 01:30:55 +00:00
Chris Lattner
3e2bafd640 Add FP versions of the binary operators, keeping the int and fp worlds seperate. 
Though I have done extensive testing, it is possible that this will break
things in configs I can't test.  Please let me know if this causes a problem
and I'll fix it ASAP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23505 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-28 22:29:17 +00:00
Chris Lattner
2e3f5db9ff Give all operands names 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23357 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-14 21:11:13 +00:00
Chris Lattner
8c65344a15 ignore generated files 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23263 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-07 23:47:44 +00:00
Chris Lattner
26e04bbf77 Handle ANY_EXTEND like ZERO_EXTEND. Simplify the extend/truncate code on 
the observation that it only has to handle i1 -> i64 and i64 -> i1.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23201 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-02 00:15:30 +00:00
Jim Laskey
b1e1180ca0 1. Use SubtargetFeatures in llc/lli. 
2. Propagate feature "string" to all targets.

3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23192 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-01 21:38:21 +00:00
Chris Lattner
143b675393 Fix a bug in my previous checkin 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23082 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-26 17:18:44 +00:00
Chris Lattner
5839bf2b3b Change ConstantPoolSDNode to actually hold the Constant itself instead of 
putting it into the constant pool.  This allows the isel machinery to
create constants that it will end up deciding are not needed, without them
ending up in the resultant function constant pool.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23081 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-26 17:15:30 +00:00
Chris Lattner
4a20997057 fix a warning in optimized build 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23030 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-25 00:03:21 +00:00
Chris Lattner
0a00bece0d Fix a crash I introduced into the IA64 backend with my copyfromreg change. 
It used to crash on any function that took float arguments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22973 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-22 21:33:11 +00:00
Chris Lattner
47c0889419 Add a pass name for -time-passes output 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22970 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-22 18:28:09 +00:00
Duraid Madina
7340dd5d2e reenable collapse of loadimm+AND -> dep.z (thanks guys) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22944 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-21 15:43:53 +00:00
Jim Laskey
ffb973df92 Repair an out by one error for IA64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22942 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-20 11:05:23 +00:00
Chris Lattner
ecbce617ca Split RegisterClass 'Methods' into MethodProtos and MethodBodies 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22929 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 19:13:20 +00:00
Chris Lattner
cbec3b00bd Put register classes in namespaces 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22924 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 18:50:46 +00:00
Chris Lattner
8212203ab9 This code has always been dead on itanium 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22916 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 18:34:37 +00:00
Duraid Madina
a91103430b a bugfix (up top) and a quick repair job: disable generation of dep.z 
(which died about a week ago) so we're back to load-(2^n-1)-then-AND
sequences. slow, but things should now be Almost Completely Working,
modulo those pesky alignment/ABI issues.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22904 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 13:25:50 +00:00
Chris Lattner
efc58be8ca Mark some instructions as variable_ops, and PSEUDO_ALLOC as taking a GPR. 
I'm not convinced this is all of them,  but I can't do much testing, because
IA64 LLC crashes on big programs :(


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22892 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 00:47:42 +00:00
Chris Lattner
707ebc5dd6 update the backends to work with the new CopyFromReg/CopyToReg/ImplicitDef nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22807 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-16 21:56:37 +00:00
Nate Begeman
7cbd525ba8 Implement BR_CC and BRTWOWAY_CC. This allows the removal of a rather nasty 
fixme from the PowerPC backend.  Emit slightly better code for legalizing
select_cc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22805 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-16 19:49:35 +00:00
Duraid Madina
d2ff5ef654 sorry!! this is temporary; for some reason the nasty constmul code seems to 
be an infinite loop when using g++-4.0.1*, this kills the ia64 nightly
tester. A proper fix shall be forthcoming!!! thanks for not killing me. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22748 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-10 12:38:57 +00:00
Chris Lattner
88ac32ca26 Update the targets to the new SETCC/CondCodeSDNode interfaces. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22729 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-09 20:21:10 +00:00
Chris Lattner
0561b3ff9f Update to use the new MathExtras.h support for log2 computation. 
Patch contributed by Jim Laskey!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22594 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-02 19:26:06 +00:00
Jeff Cohen
00b16889ab Eliminate all remaining tabs and trailing spaces. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22523 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-27 06:12:32 +00:00
Chris Lattner
bce81ae51e Change *EXTLOAD to use an VTSDNode operand instead of being an MVTSDNode. 
This is the last MVTSDNode.

This allows us to eliminate a bunch of special case code for handling
MVTSDNodes.

Also, remove some uses of dyn_cast that should really be cast (which is
cheaper in a release build).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22368 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-10 01:56:13 +00:00
Chris Lattner
9fadb4c1c0 Change TRUNCSTORE to use a VTSDNode operand instead of being an MVTSTDNode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22366 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-10 00:29:18 +00:00
Chris Lattner
e0fe225e89 Make several cleanups to Andrews varargs change: 
1. Pass Value*'s into lowering methods so that the proper pointers can be
   added to load/stores from the valist
2. Intrinsics that return void should only return a token chain, not a token
   chain/retval pair.
3. Rename LowerVAArgNext -> LowerVAArg, because VANext is long gone.
4. Now that we have Value*'s available in the lowering methods, pass them
   into any load/stores from the valist that are emitted


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22339 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-05 19:58:54 +00:00
Chris Lattner
0431c96cec Refactor the addPassesToEmitAssembly interface into a addPassesToEmitFile 
interface.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22282 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-25 02:48:37 +00:00
Andrew Lenharth
213e557cef If we support structs as va_list, we must pass pointers to them to va_copy 
See last commit for LangRef, this implements it on all targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22273 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-22 21:04:42 +00:00
Andrew Lenharth
558bc88a00 core changes for varargs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22254 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-18 18:34:52 +00:00
Duraid Madina
04aa46d647 re-enable direct calls, this should just be a performance boost 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22148 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-20 11:39:17 +00:00
Duraid Madina
e75a24a5fa make angry compilers happy again 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22054 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-15 14:44:13 +00:00
Chris Lattner
b5d8e6ece6 treat TAILCALL nodes identically to CALL nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21977 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 20:29:26 +00:00
Chris Lattner
adf6a965a3 Add an isTailCall flag to LowerCallTo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21958 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 18:50:42 +00:00
Chris Lattner
16cd04d26c rename the ADJCALLSTACKDOWN/ADJCALLSTACKUP nodes to be CALLSEQ_START/BEGIN. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21915 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-12 23:24:06 +00:00
Chris Lattner
c57f682113 Pass in Calling Convention to use into LowerCallTo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21899 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-12 19:56:45 +00:00
Duraid Madina
63bbed536c add the popcount instruction and support this in the isel 
the primary user of this will probably end up being find-first-set-bit/find-
last-set-bit, which i'll get around to...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21860 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-11 05:16:09 +00:00
Chris Lattner
1f38e5c431 No really IA*64* :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21858 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-11 05:03:56 +00:00
Duraid Madina
8a3042c872 fix and cleanup constmul code a bit, this fixes mediabench/toast and 
probably a couple of other tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21814 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-09 13:18:34 +00:00
Andrew Lenharth
b5884d3116 fix typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21693 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-04 19:25:37 +00:00
Duraid Madina
40c9e6be3e support multiplication by constant negative integers 
this constmul code is still buggy though, so beware. mul by 7427 is currently
broken, for example. will fix it when I get a moment :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21652 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-02 07:27:14 +00:00
Duraid Madina
4bd708d8a6 add support for bools to SELECT, this fixes Prolangs-C/bison from the 
testsuite, however 09-vor is still dead (hopefully for other reasons!)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21651 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-02 06:41:13 +00:00
Chris Lattner
17234b7d78 This target doesn't support the FSIN/FCOS/FSQRT nodes yet 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21633 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-30 04:26:06 +00:00
Andrew Lenharth
2d86ea21dd Implement Value* tracking for loads and stores in the selection DAG. This enables one to use alias analysis in the backends. 
(TRUNK)Stores and (EXT|ZEXT|SEXT)Loads have an extra SDOperand which is a SrcValueSDNode which contains the Value*.  Note that if the operation is introduced by the backend, it will still have the operand, but the value* will be null.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21599 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-27 20:10:01 +00:00
Duraid Madina
85d5f6067d clean up some warnings 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21590 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-27 11:57:39 +00:00
Duraid Madina
4706c0395b constmul bugfix: multiply by 27611 was broken 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21564 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-26 09:42:50 +00:00
Duraid Madina
3b84bac3ef clean up the code! (oops) lots more cleaning left, however. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21563 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-26 08:43:47 +00:00
Duraid Madina
b2322561cb * Add code to reduce multiplies by constant integers to shifts, adds and 
subtracts. This is a very rough and nasty implementation of Lefevre's
  "pattern finding" algorithm. With a few small changes though, it should
  end up beating most other methods in common use, regardless of the size
  of the constant (currently, it's often one or two shifts worse)

  TODO: rewrite it so it's not hideously ugly (this is a translation from
        perl, which doesn't help ;)
        bypass most of it for multiplies by 2^n+1
	(eventually) teach it that some combinations of shift+add are
	cheaper than others (e.g. shladd on ia64, scaled adds on alpha)
	get it to try multiple booth encodings in search of the cheapest
	routine
	make it work for negative constants

  This is hacked up as a DAG->DAG transform, so once I clean it up I hope
  it'll be pulled out of here and put somewhere else. The only thing backends
  should really have to worry about for now is where to draw the line
  between using this code vs. going ahead and doing an integer multiply
  anyway.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21560 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-26 07:23:02 +00:00
Misha Brukman
7847fcac17 Convert tabs to spaces 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21452 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-22 17:54:37 +00:00
Misha Brukman
4633f1cde8 Remove trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21424 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-21 23:13:11 +00:00
Duraid Madina
1ce0c015ad print negative 64 bit immediates as negative numbers, makes things a little 
easier on the eyes, not that numbers like 18446744073709541376 are bad or
anything


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21300 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-14 10:08:01 +00:00
Duraid Madina
3eb7150c3e oops, this stopped us turning movl r4=0xFFFFFFFF;; and rX, r4 into zxt4 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21299 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-14 10:06:35 +00:00
Duraid Madina
c4ccc2db6b we have zextloads, not sextloads! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21296 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-14 08:37:32 +00:00
Duraid Madina
ed09502a0b * add the shladd instruction 
* fold left shifts of 1, 2, 3 or 4 bits into adds

  This doesn't save much now, but should get a serious workout once
  multiplies by constants get converted to shift/add/sub sequences.
  Hold on! :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21282 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 06:12:04 +00:00
Duraid Madina
c02780eed1 * if ANDing with a constant of the form: 
0x00000..00FFF..FF
      ^      ^
      ^      ^
    any number of
    0's followed by
    some number of
    1's

    then we use dep.z to just paste zeros over the input. For the special
    cases where this is zxt1/zxt2/zxt4, we use those instructions instead,
    because we're all about readability!!!
    that's what it's about!! readability!

  *twitch* ;D


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21279 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 04:50:54 +00:00
Chris Lattner
6ac614a4f2 Remove special handling of ZERO_EXTEND_INREG. This pessimizes code, causing 
things like this:

       mov r9 = 65535;;
       and r8 = r8, r9;;

To be emitted instead of:

        zxt2 r8 = r8;;

To get this back, the selector for ISD::AND should recognize this case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21269 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 02:41:52 +00:00
Duraid Madina
e8fd25f5c5 * OK, after changing to use liveIn/liveOut instead of IDEFs, 
to avoid redundant mov out3=r44 type instructions, we need to
tell the register allocator the truth about out? registers.

FIXME: unfortunately, since the list of allocatable registers is immutable,
we can't simply 'delete r127' from the allocation order, say, if 'out0' is
used. The only correct thing we can do is have a linear order of regs:

out7, out6 ... out2, out1, out0, r32, r33, r34 ... r126, r127

and slide a 'window' of 96 registers along this line, depending on how many
of the out? regs a function actually uses. The only downside of this is
that the out? registers will be allocated _first_, which makes the
resulting assembly ugly. :( Note this in the README. Hope this gets fixed
soon. :) (note the 3rd person speech there)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21252 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-12 18:42:59 +00:00
Chris Lattner
9c24ba642e Put out* into the allocation order, allowing the register allocator to 
coallesce moves into outgoing args.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21249 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-12 15:12:51 +00:00
Chris Lattner
ea6f770fb0 Make sure to realize that calls use their argument regs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21248 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-12 15:12:19 +00:00
Duraid Madina
ca494fddcd stop emitting IDEFs for args - change to using liveIn/liveOut 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21247 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-12 14:54:44 +00:00
Chris Lattner
30e82431b3 IA64 supports this operation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21228 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-11 18:55:36 +00:00
Duraid Madina
21478e55db hmm, should probably change addImm() to take 64-bit arguments one day anyway. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21224 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-11 07:16:39 +00:00
Duraid Madina
5ef2ec9929 assorted fixes: 
* clean up immediates (we use 14, 22 and 64 bit immediates now. sane.)
  * fold r0/f0/f1 registers into comparisons against 0/0.0/1.0
  * fix nasty thinko - didn't use two-address form of conditional add
    for extending bools to integers, so occasionally there would be
    garbage in the result. it's amazing how often zeros are just
    sitting around in registers ;) - this should fix a bunch of tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21221 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-11 05:55:56 +00:00
Duraid Madina
e00e5ded51 ok, the "ia64 has a boatload of registers" joke stopped being funny today ;) 
* fix overallocation of integer (stacked) registers: we can't allocate
  registers for local use if they are required as output registers

this fixes 'toast' in the test suite, and all sorts of larger programs
like bzip2 etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21178 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-09 11:53:00 +00:00
Chris Lattner
da4d4694a8 This target does not support/want ISD::BRCONDTWOWAY 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21164 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-09 03:22:37 +00:00
Duraid Madina
6dcceb5ecb fix bogus division-by-power-of-2 (was wrong for negative input, adds extr insn) 
fix hack in division (clean up frcpa instruction)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21153 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-08 10:01:48 +00:00
Duraid Madina
e6a0b6cbda teach asmprinter to print s8/s14 operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21131 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-07 12:34:36 +00:00
Duraid Madina
f55e403ef9 codegen immediate forms of add/sub/shift 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21130 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-07 12:33:38 +00:00
Duraid Madina
18c0c6bcc4 add immediate forms of add, sub, shift 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21129 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-07 12:32:24 +00:00
Duraid Madina
4826a0786d steal sampo's div-by-constant-power-of-2 stuff 
thanks sampo!!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21113 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 09:55:17 +00:00
Duraid Madina
b366a02ff2 add fms instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21112 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 09:54:09 +00:00
Duraid Madina
b70c2f3ef7 lie a bit and say that r1/r12 (GP/SP) _aren't_ callee-save, as we take 
care of this ourselves


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21110 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 06:18:36 +00:00
Duraid Madina
4ee131ffa8 make sure 'special' registers don't get allocated 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21109 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 06:17:54 +00:00
Duraid Madina
6e02e6842a fix SREM/UREM, which gave incorrect results for x%y if x was zero. This is 
an ugly hack, but it seems to work. I should fix this properly and add a test
as well.

fixes multisource/obsequi (maybe others)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21075 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-04 05:05:52 +00:00
Duraid Madina
09c61b9c19 add implicit use op 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21074 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-04 04:50:57 +00:00
Duraid Madina
162a837f63 .bss is no problem here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21061 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-03 14:52:01 +00:00
Duraid Madina
32c46f33b7 ia64 asmprinter fixes: 
- turn off assembler's autoalignment
  - set FunctionAddrPrefix/Suffix so that .data8 entries pointing to
    functions have their value wrapped in @fptr(), so that a function
    descriptor will be materialized for that function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21025 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 12:30:47 +00:00
Duraid Madina
75c9fcbdcc support IDEF, fnegabs (thanks sampo) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21023 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 10:33:53 +00:00
Duraid Madina
5c156b7473 add fnegabs op 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21022 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 10:06:27 +00:00
Duraid Madina
a7ee8b8f04 add support FNEG and FABS 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21012 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 05:18:38 +00:00
Chris Lattner
43fdea070c This target doesn't support fabs/fneg yet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21010 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 05:03:24 +00:00
Duraid Madina
69c8e20aa1 repair mindless SELECT waste. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20982 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-01 10:35:00 +00:00
Duraid Madina
beeaab28a5 Assorted fixes: 
* Stop being pessimistic about output register allocation
  * Start to handle function descriptors: compute target GPs and so on
  when doing indirect calls etc. Not there yet, though. For the moment,
  we try to use _indirect_ branches wherever possible, to stress test
  function descriptors.
  * FP divide-by-zero should work now
  * add varargs (it doesn't work, though)

At this point, all of SingleSource passes (modulo C++ tests that are due
to issues with the CFE, see note in the README.) Much of MultiSource also
passes although there's still a ton of bugs around. Something for me to
work on tomorrow, then. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20960 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-31 12:31:11 +00:00
Duraid Madina
1f867b103d * declare local common symbols as such (.lcomm, not merely .common) 
* begin great adventure into correct function descriptor materialization


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20956 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-31 07:40:24 +00:00
Duraid Madina
290f64c1cb daintyness 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20955 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-31 07:36:43 +00:00
Duraid Madina
291e1266c1 add what we need to fudge a 'floating point conditional move', this is 
used to get FP div-by-zero working properly (shunt the right answer
depending on how frcpa sets its predicate output)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20954 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-31 07:32:32 +00:00
Duraid Madina
ae8bd73634 Emit .global @function and .global @object entries so the Intel ias 
assembler may be used; identify LLVM output as such.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20892 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-28 15:21:43 +00:00
Nate Begeman
8e21e71b24 Change interface to LowerCallTo to take a boolean isVarArg argument. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20842 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-26 01:29:23 +00:00
Chris Lattner
3c61f70dc1 fix a compilation error, patch contributed by Bill Wendling! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20807 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-24 05:12:48 +00:00
Nate Begeman
85fdeb233e Remove comments that are now meaningless from the pattern ISels, at Chris's 
request.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20804 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-24 04:39:54 +00:00
Alkis Evlogimenos
12cf385662 Stop using deprecated interface. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20679 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-19 09:22:17 +00:00
Duraid Madina
37b11a974a typo/denial 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20663 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-17 20:23:27 +00:00
Duraid Madina
817aed4fab clean up warnings when building in release mode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20658 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-17 19:00:40 +00:00
Duraid Madina
d0b87b3ede OK, IA64 is statically linked into llc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20655 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-17 18:37:05 +00:00
Duraid Madina
de487f0977 build the IA64 target as a .so for now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20654 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-17 18:29:04 +00:00
Duraid Madina
9b9d45f60e and so it begins... 
PHASE 1: write instruction selector
PHASE 2: ???
PHASE 3: profit!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20652 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-17 18:17:03 +00:00