6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-19 19:30:10 +00:00
Code Issues Projects Releases Wiki Activity
20,192 Commits 39 Branches 0 Tags 277 MiB
f4e6c3a69b
Commit Graph

1127 Commits

Author SHA1 Message Date
Chris Lattner
a96e577f53 Fix UnitTests/2005-05-13-SDivTwo.c 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21985 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 21:48:20 +00:00
Chris Lattner
3648c67eb2 switch to having the callee pop stack operands for fastcc. This is currently buggy 
do not use


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21984 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 21:44:04 +00:00
Chris Lattner
24ddc6d067 allow RETI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21980 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 20:46:35 +00:00
Chris Lattner
2e7714ad2b Build TAILCALL nodes in LowerCallTo, treat them like normal calls everywhere. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21976 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 20:29:13 +00:00
Chris Lattner
adf6a965a3 Add an isTailCall flag to LowerCallTo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21958 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 18:50:42 +00:00
Chris Lattner
1be4811d34 add 'ret imm' instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21945 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 17:56:48 +00:00
Chris Lattner
63602fb868 Do not CopyFromReg physregs for live-in values. Instead, create a vreg for 
each live in, and copy the regs from the vregs.  As the very first thing we
do in the function, insert copies from the pregs to the vregs.  This fixes
problems where the token chain of CopyFromReg was not enough to allow reordering
of the copyfromreg nodes and other unchained nodes (e.g. div, which clobbers
eax on intel).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21932 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 07:38:09 +00:00
Chris Lattner
16cd04d26c rename the ADJCALLSTACKDOWN/ADJCALLSTACKUP nodes to be CALLSEQ_START/BEGIN. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21915 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-12 23:24:06 +00:00
Chris Lattner
c6f4181923 Add a new -enable-x86-fastcc option that enables passing the first 
two integer values in registers for the fastcc calling conv.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21912 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-12 23:06:28 +00:00
Chris Lattner
c57f682113 Pass in Calling Convention to use into LowerCallTo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21899 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-12 19:56:45 +00:00
Chris Lattner
6649418598 Enable pattern isel by default 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21898 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-12 19:56:09 +00:00
Chris Lattner
c610d4267f X86 has more than just 32-bit registers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21857 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-11 05:00:34 +00:00
Chris Lattner
6415bb4c29 Convert feature of the simple isel over for the pattern isel to use. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21840 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-10 03:53:18 +00:00
Jeff Cohen
19bb2283e6 Silence some VC++ warnings 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21838 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-10 02:22:38 +00:00
Chris Lattner
966cdfb600 Implement READPORT/WRITEPORT, implementing the last X86 regression tests 
that were failing with the pattern selector.  Note that the support that
existed in the simple selector was clearly broken in several ways though
(which has also been fixed).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21831 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-09 21:17:38 +00:00
Chris Lattner
cecd67b432 do not emit illegal instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21830 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-09 21:06:04 +00:00
Chris Lattner
82c7897f49 Fix the syntax of the i/o instructions, these are obviously unused. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21829 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-09 20:49:20 +00:00
Chris Lattner
4e6ce5f9c7 legalize readio/writeio into load/stores, fixing CodeGen/X86/io.llx with 
the pattern isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21828 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-09 20:37:29 +00:00
Chris Lattner
a0dbf181e0 restore some non-dead code I removed last night breaking double casts to 
uint


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21821 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-09 18:37:02 +00:00
Chris Lattner
a80d2bd89c Wrap long lines, remove dead code that is now handled by legalize 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21811 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-09 05:40:26 +00:00
Chris Lattner
2afa1910d4 Fix FP -> bool casts 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21810 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-09 05:33:18 +00:00
Chris Lattner
e3e0f2765a Fix X86/2005-05-08-FPStackifierPHI.ll: ugly gross hack. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21801 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-09 03:36:39 +00:00
Andrew Lenharth
b5884d3116 fix typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21693 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-04 19:25:37 +00:00
Andrew Lenharth
691ef2ba06 Implement count leading zeros (ctlz), count trailing zeros (cttz), and count 
population (ctpop).  Generic lowering is implemented, however only promotion
is implemented for SelectionDAG at the moment.

More coming soon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21676 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-03 17:19:30 +00:00
Chris Lattner
c5dcb53bea Add support for FSIN/FCOS when unsafe math ops are enabled. Patch contributed by 
Morten Ofstad!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21632 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-30 04:25:35 +00:00
Chris Lattner
5434b429c8 Add support for llvm.sqrt and sin/cos if unsafe math optimizations are enabled. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21631 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-30 04:12:40 +00:00
Chris Lattner
2c56e8a23e Add support for FSQRT node, patch contributed by Morten Ofstad 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21610 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-28 22:07:18 +00:00
Chris Lattner
5afc124bdf Add some new X86 instrs, patch contributed by Morten Ofstad 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21608 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-28 21:50:05 +00:00
Chris Lattner
3b6b63711e Codegen fabs/fabsf as FABS. Patch contributed by Morten Ofstad 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21607 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-28 21:48:42 +00:00
Andrew Lenharth
2d86ea21dd Implement Value* tracking for loads and stores in the selection DAG. This enables one to use alias analysis in the backends. 
(TRUNK)Stores and (EXT|ZEXT|SEXT)Loads have an extra SDOperand which is a SrcValueSDNode which contains the Value*.  Note that if the operation is introduced by the backend, it will still have the operand, but the value* will be null.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21599 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-27 20:10:01 +00:00
Misha Brukman
0e0a7a45d3 * Remove trailing whitespace 
* Convert tabs to spaces


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21426 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-21 23:38:14 +00:00
Chris Lattner
109026290b Handle stores of global address as stores of immediates. Instead of: 
test1:
        movl $N, %eax
        movl %eax, G
        ret

emit:

test1:
        movl $N, G
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21407 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-21 19:11:03 +00:00
Chris Lattner
75f354bd7a Handle (store &GV -> mem) as a store immediate. This often occurs for 
printf format strings and other stuff.  Instead of generating this:

        movl $l1__2E_str_1, %eax
        movl %eax, (%esp)

we now emit:

        movl $l1__2E_str_1, (%esp)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21406 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-21 19:03:24 +00:00
Nate Begeman
f8b02949e3 Make pattern isel default for ppc 
Add new ppc beta option related to using condition registers
Make pattern isel control flag (-enable-pattern-isel) global and tristate
  0 == off
  1 == on
  2 == target default


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21309 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-15 22:12:16 +00:00
Chris Lattner
5bf2686a1b Fix some mysteriously missing {}'s which cause the miscompilation of 
Olden/mst, Ptrdist/bc, Obsequi, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21274 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 03:29:53 +00:00
Chris Lattner
91302a10ae Z_E_I is gone 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21267 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-13 02:39:05 +00:00
Chris Lattner
4c52f0ec8c Use live out sets for return values instead of imp_defs, which is cleaner and faster. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21181 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-09 15:23:56 +00:00
Chris Lattner
da4d4694a8 This target does not support/want ISD::BRCONDTWOWAY 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21164 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-09 03:22:37 +00:00
Chris Lattner
6659bd7592 X86 zero extends setcc results 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21146 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-07 19:41:46 +00:00
Chris Lattner
6d027f2e6f Fix SingleSource/Regression/C/2005-05-06-LongLongSignedShift.c, we were not 
properly sign extending the top of the result of a 64-bit shift right by
a constant > 32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21120 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 20:59:35 +00:00
Chris Lattner
8db0af1c8d Add (untested) support for MULHS and MULHU. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21107 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 04:21:07 +00:00
Chris Lattner
1e6a71524e add signed versions of the extra precision multiplies 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21106 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 04:19:22 +00:00
Chris Lattner
b7edaa1d08 add support for FABS and FNEG 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21015 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 05:30:17 +00:00
Chris Lattner
43fdea070c This target doesn't support fabs/fneg yet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21010 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 05:03:24 +00:00
Chris Lattner
b1f26fb921 add an fabs instr 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21006 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 04:31:56 +00:00
Chris Lattner
b38a7495da Add support for 64-bit shifts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21005 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 04:01:14 +00:00
Chris Lattner
7ce7eff54c Add support for ISD::UNDEF to the X86 be 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20990 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-01 22:46:45 +00:00
Chris Lattner
71df3f8cab don't depend on the cfg being set up yet 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20936 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-30 01:10:00 +00:00
Nate Begeman
8e21e71b24 Change interface to LowerCallTo to take a boolean isVarArg argument. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20842 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-26 01:29:23 +00:00
Chris Lattner
1bcb9abb30 eliminate dead variables, patch contributed by Gabor Greif! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20812 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-24 17:32:20 +00:00
Nate Begeman
85fdeb233e Remove comments that are now meaningless from the pattern ISels, at Chris's 
request.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20804 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-24 04:39:54 +00:00
Chris Lattner
7805fa4acc Don't emit two comparisons when comparing a FP value against zero! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20651 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-17 16:29:26 +00:00
Chris Lattner
5b3a4553c1 Fix the missing symbols problem Bill was hitting. Patch contributed by 
Bill Wendling!!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20649 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-17 15:38:16 +00:00
Chris Lattner
e4d5c441e0 This mega patch converts us from using Function::a{iterator|begin|end} to 
using Function::arg_{iterator|begin|end}.  Likewise Module::g* -> Module::global_*.

This patch is contributed by Gabor Greif, thanks!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20597 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-15 04:54:21 +00:00
Reid Spencer
d632f4977e Patch to make assembly output compatible with mingw compilation (identical 
to cygwin)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20520 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-03-08 17:02:05 +00:00
Chris Lattner
da895d6337 Fix spelling, patch contributed by Gabor Greif! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20343 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-02-27 06:18:25 +00:00
Chris Lattner
572dd08204 Silence some uninit variable warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20284 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-02-23 05:57:21 +00:00
Chris Lattner
3576c84baf We can fold promoted and non-promoted loads into divs also! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19835 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-25 20:35:10 +00:00
Chris Lattner
44129b5b68 Fold promoted loads into binary ops for FP, allowing us to generate m32 forms 
of FP ops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19834 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-25 20:03:11 +00:00
Chris Lattner
0a07883694 Silence a warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19798 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-23 23:20:06 +00:00
Chris Lattner
42e25b387f Allow the FP stackifier to completely ignore functions that do not use FP at 
all.  This should speed up the X86 backend fairly significantly on integer
codes.  Now if only we didn't have to compute livevar still... ;-)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19796 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-23 23:13:59 +00:00
Reid Spencer
5dc81f63d1 Support Cygwin assembly generation. The cygwin version of Gnu ASsembler 
doesn't support certain directives and symbols on cygwin are prefixed with
an underscore. This patch makes the necessary adjustments to the output.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19775 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-23 03:52:14 +00:00
Chris Lattner
fb0f53f9c1 Speed up folding operations into loads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19733 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-21 21:43:02 +00:00
Chris Lattner
67b1c3c404 The ever-important vanity pass name :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19731 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-21 21:35:14 +00:00
Chris Lattner
b62e1e296e Fix a FIXME: realize that argument stores are all independent (don't alias) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19728 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-21 19:46:38 +00:00
Chris Lattner
19ad0620bc Implement ADD_PARTS/SUB_PARTS so that 64-bit integer add/sub work. This 
fixes most of the remaining llc-beta failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19716 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-20 18:53:00 +00:00
Chris Lattner
bf52d49f36 Fix a crash compiling 134.perl. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19711 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-20 16:50:16 +00:00
Chris Lattner
c3c021bcad Fix a problem where were were literally selecting for INCREASED register 
pressure, not decreases register pressure.  Fix problem where we accidentally
swapped the operands of SHLD, which caused fourinarow to fail.  This fixes
fourinarow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19697 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 17:24:34 +00:00
Chris Lattner
a76f04828a When commuting these instructions, make sure to actually swap the operands too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19694 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 16:55:52 +00:00
Chris Lattner
4053b1e30b Implement Regression/CodeGen/X86/rotate.ll: emit rotate instructions (which 
typically cost 1 cycle) instead of shld/shrd instruction (which are typically
6 or more cycles).  This also saves code space.

For example, instead of emitting:

rotr:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %CL, BYTE PTR [%ESP + 8]
        shrd %EAX, %EAX, %CL
        ret
rotli:
        mov %EAX, DWORD PTR [%ESP + 4]
        shrd %EAX, %EAX, 27
        ret

Emit:

rotr32:
        mov %CL, BYTE PTR [%ESP + 8]
        mov %EAX, DWORD PTR [%ESP + 4]
        ror %EAX, %CL
        ret
rotli32:
        mov %EAX, DWORD PTR [%ESP + 4]
        ror %EAX, 27
        ret

We also emit byte rotate instructions which do not have a sh[lr]d counterpart
at all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19692 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 08:07:05 +00:00
Chris Lattner
40ff633b05 Add rotate instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19690 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 07:50:03 +00:00
Chris Lattner
30ea1e9411 Match 16-bit shld/shrd instructions as well, implementing shift-double.llx:test5 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19689 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 07:37:26 +00:00
Chris Lattner
0df53d22c3 Improve coverage of the X86 instruction set by adding 16-bit shift doubles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19687 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 07:31:24 +00:00
Chris Lattner
41e431ba04 Teach the code generator that shrd/shld is commutable if it has an immediate. 
This allows us to generate this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EDX, DWORD PTR [%ESP + 8]
        shld %EDX, %EDX, 2
        shl %EAX, 2
        ret

instead of this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
        mov %EDX, %EAX
        shrd %EDX, %ECX, 30
        shl %EAX, 2
        ret

Note the magically transmogrifying immediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19686 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 07:11:01 +00:00
Chris Lattner
8571637ee9 Codegen long >> 2 to this: 
foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EDX, DWORD PTR [%ESP + 8]
        shrd %EAX, %EDX, 2
        sar %EDX, 2
        ret

instead of this:

test1:
        mov %ECX, DWORD PTR [%ESP + 4]
        shr %ECX, 2
        mov %EDX, DWORD PTR [%ESP + 8]
        mov %EAX, %EDX
        shl %EAX, 30
        or %EAX, %ECX
        sar %EDX, 2
        ret

and long << 2 to this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
***     mov %EDX, %EAX
        shrd %EDX, %ECX, 30
        shl %EAX, 2
        ret

instead of this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, %EAX
        shr %ECX, 30
        mov %EDX, DWORD PTR [%ESP + 8]
        shl %EDX, 2
        or %EDX, %ECX
        shl %EAX, 2
        ret

The extra copy (marked ***) can be eliminated when I teach the code generator
that shrd32rri8 is really commutative.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19681 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 06:18:43 +00:00
Chris Lattner
009b55b6f6 X86 shifts mask the amount. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19678 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 03:36:30 +00:00
Chris Lattner
477c931852 Code to handle FP_EXTEND is dead now. X86 doesn't support any data types to 
FP_EXTEND from!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19674 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-18 20:05:56 +00:00
Chris Lattner
3dd68151dc Remove more dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19673 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-18 19:50:08 +00:00
Chris Lattner
a7a4c0f7c4 The selection dag code handles the promotions from F32 to F64 for us, so we 
don't need to even think about F32 in the X86 code anymore.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19672 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-18 19:46:54 +00:00
Chris Lattner
b422aeac9e Fix 124.m88ksim. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19667 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-18 17:35:28 +00:00
Chris Lattner
811482a82b Do not emit loads multiple times, potentially in the wrong places. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19661 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-18 04:18:32 +00:00
Chris Lattner
b71f8fc99d Eliminate bad assertions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19659 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-18 04:00:54 +00:00
Chris Lattner
4a108668df * Eliminate the TokenSet and just use the ExprMap for both tokens and values. 
* Insert some really pedantic assertions that will notice when we emit the
  same loads more than one time, exposing bugs.  This turns a miscompilation in
  bzip2 into a compile-fail.  yaay.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19658 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-18 03:51:59 +00:00
Chris Lattner
883c86f510 Rely on the code in MatchAddress to do this work. Otherwise we fail to 
match (X+Y)+(Z << 1), because we match the X+Y first, consuming the index
register, then there is no place to put the Z.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19652 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-18 02:25:52 +00:00
Chris Lattner
98a8ba0393 Fix a problem where probing for addressing modes caused expressions to be 
emitted too early.  In particular, this fixes
Regression/CodeGen/X86/regpressure.ll:regpressure3.

This also improves the 2nd basic block in 164.gzip:flush_block, which went from

.LBBflush_block_1:      # loopentry.1.i
        movzx %EAX, WORD PTR [dyn_ltree + 20]
        movzx %ECX, WORD PTR [dyn_ltree + 16]
        mov DWORD PTR [%ESP + 32], %ECX
        movzx %ECX, WORD PTR [dyn_ltree + 12]
        movzx %EDX, WORD PTR [dyn_ltree + 8]
        movzx %EBX, WORD PTR [dyn_ltree + 4]
        mov DWORD PTR [%ESP + 36], %EBX
        movzx %EBX, WORD PTR [dyn_ltree]
        add DWORD PTR [%ESP + 36], %EBX
        add %EDX, DWORD PTR [%ESP + 36]
        add %ECX, %EDX
        add DWORD PTR [%ESP + 32], %ECX
        add %EAX, DWORD PTR [%ESP + 32]
        movzx %ECX, WORD PTR [dyn_ltree + 24]
        add %EAX, %ECX
        mov %ECX, 0
        mov %EDX, %ECX

to

.LBBflush_block_1:      # loopentry.1.i
        movzx %EAX, WORD PTR [dyn_ltree]
        movzx %ECX, WORD PTR [dyn_ltree + 4]
        add %ECX, %EAX
        movzx %EAX, WORD PTR [dyn_ltree + 8]
        add %EAX, %ECX
        movzx %ECX, WORD PTR [dyn_ltree + 12]
        add %ECX, %EAX
        movzx %EAX, WORD PTR [dyn_ltree + 16]
        add %EAX, %ECX
        movzx %ECX, WORD PTR [dyn_ltree + 20]
        add %ECX, %EAX
        movzx %EAX, WORD PTR [dyn_ltree + 24]
        add %ECX, %EAX
        mov %EAX, 0
        mov %EDX, %EAX

... which results in less spilling in the function.

This change alone speeds up 164.gzip from 37.23s to 36.24s on apoc.  The
default isel takes 37.31s.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19650 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-18 01:06:26 +00:00
Chris Lattner
e9fe2bcac2 Fix indentation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19649 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 23:25:45 +00:00
Chris Lattner
869e0434ae Don't bother using max here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19647 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 23:02:13 +00:00
Chris Lattner
90d1be7eef Do not give token factor nodes outrageous weights 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19645 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 22:56:09 +00:00
Chris Lattner
5c65981a57 Two changes: 
1. Fold  [mem] += (1|-1) into inc [mem]/dec [mem] to save some icache space.
 2. Do not let token factor nodes prevent forming '[mem] op= val' folds.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19643 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 22:10:42 +00:00
Chris Lattner
e10269ba30 Refactor load/op/store folding into it's own method, no functionality changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19641 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 19:25:26 +00:00
Chris Lattner
ae3ffba466 Fix a major regression last night that prevented us from producing [mem] op= reg 
operations.

The body of the if is less indented but unmodified in this patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19638 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 17:49:14 +00:00
Chris Lattner
2a4e508281 Codegen this: 
int %foo(int %X) {
        %T = add int %X, 13
        %S = mul int %T, 3
        ret int %S
}

as this:

        mov %ECX, DWORD PTR [%ESP + 4]
        lea %EAX, DWORD PTR [%ECX + 2*%ECX + 39]
        ret

instead of this:

        mov %ECX, DWORD PTR [%ESP + 4]
        mov %EAX, %ECX
        add %EAX, 13
        imul %EAX, %EAX, 3
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19633 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 06:48:02 +00:00
Chris Lattner
4ff348befa Fix test/Regression/CodeGen/X86/2005-01-17-CycleInDAG.ll and 132.ijpeg. 
Do not fold a load into an operation if it will induce a cycle in the DAG.

Repeat after me: dAg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19631 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 06:26:58 +00:00
Chris Lattner
cb1aa8d772 Do not fold a load into a comparison that is used by more than one place. 
The comparison will probably be folded, so this is not ok to do.
This fixed 197.parser.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19624 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 01:34:14 +00:00
Chris Lattner
c98279d371 Do not codegen 'xor bool, true' as 'not reg'. not reg inverts the upper bits 
of the bytereg.  This fixes yacr2, 300.twolf and probably others.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19622 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 00:23:16 +00:00
Chris Lattner
4df0de975a Set up the shift and setcc types. 
If we emit a load because we followed a token chain to get to it, try to
fold it into its single user if possible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19620 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 00:00:33 +00:00
Chris Lattner
da2ce11407 * Adjust to changes in TargetLowering interfaces. 
* Remove custom promotion for bool and byte select ops.  Legalize now
  promotes them for us.
* Allow folding ConstantPoolIndexes into EXTLOAD's, useful for float immediates.
* Declare which operations are not supported better.
* Add some hacky code for TRUNCSTORE to pretend that we have truncstore
  for i16 types.  This is useful for testing promotion code because I can
  just remove 16-bit registers all together and verify that programs work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19614 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-16 07:34:08 +00:00
Chris Lattner
e9ef81dd2f Add support for truncstore and *extload. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19566 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-15 05:22:24 +00:00
Chris Lattner
7f2afac1dc Adjust to CopyFromREg changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19561 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-14 22:37:41 +00:00
Chris Lattner
18c2f13e0f Add new ImplicitDef node, rename CopyRegSDNode class to RegSDNode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19535 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-13 20:50:02 +00:00
Chris Lattner
1d50b7fa53 Codegen factor nodes more intelligently according to perceived register pressure. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19532 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-13 19:56:00 +00:00
Chris Lattner
c35807155c Initial trivial (but stupid) codegen for this node. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19529 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-13 18:01:36 +00:00
Chris Lattner
636e79a20f Add some really pedantic assertions to the load folding code. Fix a bunch 
of cases where we accidentally emitted a load folded once and unfolded
elsewhere.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19522 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-13 05:53:16 +00:00
Chris Lattner
a0bb692b27 We can only fold a load into an op if there is exactly one use of the value. 
Checking to see if the load has two uses is not equivalent, as the chain
value may have zero uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19518 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 18:38:26 +00:00
Chris Lattner
9bbd992eb1 Try both ways to fold an add together. This allows us to generate this code 
imul %EAX, %EAX, 400
        add %ECX, %EAX
        add %ESI, DWORD PTR [%ECX + 4*%EDX]
        inc %EDX
        cmp %EDX, 100

instead of this:

        imul %EAX, %EAX, 400
        add %ECX, %EAX
        mov %EAX, %EDX
        shl %EAX, 2
        add %ECX, %EAX
        add %ESI, DWORD PTR [%ECX]
        inc %EDX
        cmp %EDX, 100


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19513 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 18:08:53 +00:00
Chris Lattner
2b9378646d Fix a major miscompilation where we were overwriting the scale reg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19511 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 07:33:20 +00:00
Chris Lattner
48034fd9f1 Do not use the type of the RHS constant to determine the type of the operation. 
This fails for shifts because the constant is always 8 bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19508 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 05:22:07 +00:00
Chris Lattner
a23ccfb124 Do not lose the offset from teh global when peephole optimizing instructions. 
This fixes FreeBench/pcompress


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19507 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 05:17:28 +00:00
Jeff Cohen
603fea9eb6 Fix C++ more compilatiom errors 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19504 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 04:29:05 +00:00
Chris Lattner
a56cea4495 Fix a compile error with VC++, which things that static const arrays need 
to be dynamically initialized. :(


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19503 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 04:23:22 +00:00
Chris Lattner
7dbcb75b15 Fix a bug that caused us to crash on povray. We weren't emitting an FP_REG_KILL into a block that had a successor with a FP PHI node. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19502 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 04:21:28 +00:00
Chris Lattner
e11a9a93a8 Print a load of a null pointer (in intel mode) like this: 
mov %AX, WORD PTR [0]

instead of like this:

        mov %AX, WORD PTR []


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19501 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 04:07:11 +00:00
Chris Lattner
9f2cb3da48 Print a load of a null pointer like this: 
movw 0, %ax

instead of like this:

        movw , %ax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19500 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 04:05:19 +00:00
Chris Lattner
085c9955ca Fix a crash compiling povray on UINT_TO_FP from i16. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19499 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 04:00:00 +00:00
Chris Lattner
4292830fe5 There are no [mem] op= reg instructions for FP, so remove their entries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19496 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 03:16:09 +00:00
Chris Lattner
db8c368d7b Fix a bug where we didn't insert FP_REG_KILL instructions into MBB's that 
contain FP PHI nodes but no other FP defining instructions.  This fixes
183.equake


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19495 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 02:57:10 +00:00
Chris Lattner
afce4306ec Fold TRUNCATE (LOAD P) into a smaller load from P. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19494 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 02:19:06 +00:00
Chris Lattner
ef6806c979 Be more careful about order of arg evalution for CopyToReg nodes. This shrinks 
256.bzip2 from 7142 to 7103 lines of .s file.

Second, add initial support for folding loads into compares, though this code
is dynamically dead for now. :(


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19493 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 02:02:48 +00:00
Chris Lattner
7ea64f5d12 Fold some more [mem] op= val operators. This allows us to things like this 
several times in 256.bzip2:

        mov %EAX, DWORD PTR [%ESP + 204]
-       mov %EAX, DWORD PTR [%EAX]
-       or %EAX, 2097152
-       mov %ECX, DWORD PTR [%ESP + 204]
-       mov DWORD PTR [%ECX], %EAX
+       or DWORD PTR [%EAX], 2097152


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19492 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 01:28:00 +00:00
Chris Lattner
dbba22fa2a Fold loads into sign/zero extends. instead of: 
mov %AL, BYTE PTR [%EDX + l18_length_code]
  movzx %EAX, %AL

Emit:

  movzx %EAX, BYTE PTR [%EDX + l18_length_code]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19489 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 23:33:00 +00:00
Chris Lattner
837caa7223 Comment out debug code :) 
Select [mem] += Val operations.  For constants, we used to get:

  mov %ECX, -32768
  add %ECX, DWORD PTR [l4_match_start]
  mov DWORD PTR [l4_match_start], %ECX

Now we get:

  add DWORD PTR [l4_match_start], -32768

For other values we used to get:

  mov %EBP, %EDI   ;; because the add destroys the value
  add %EBP, DWORD PTR [l4_input_len]
  mov DWORD PTR [l4_input_len], %EBP

now we get:

  add DWORD PTR [l4_input_len], %EDI

Both of these use less registers than the alternative, are faster and smaller.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19488 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 23:21:30 +00:00
Chris Lattner
5f75d9a88c Handle the global address case here, not just the offset case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19487 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 22:58:43 +00:00
Chris Lattner
c4b6a78980 Treat int constants as not requiring a register, since they are almost always 
folded into an instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19486 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 22:29:12 +00:00
Chris Lattner
a5ade060db * Factor a bunch of binary operator cases into shared code. 
* Fold loads into Add, sub, and, or, xor and mul when possible.
* Codegen shl X, 1 as add X, X


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19483 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 21:19:59 +00:00
Chris Lattner
947d544e29 Fold multiplies by 3,5,9 into addressing modes when possible. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19480 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 19:37:02 +00:00
Chris Lattner
51a263434a Instead of generating stuff like this: 
mov %ECX, %EAX
        add %ECX, 32768
        mov %SI, WORD PTR [2*%ECX + l13_prev]

Generate this:

        mov %SI, WORD PTR [2*%ECX + l13_prev + 65536]

This occurs when you have a GEP instruction where an index is
"something + imm".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19472 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 06:36:20 +00:00
Chris Lattner
31805bf2b6 Implement MEMCPY natively in terms of rep movs* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19468 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 06:19:26 +00:00
Chris Lattner
989de030c4 Implement memset -> rep stos* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19467 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 06:14:36 +00:00
Chris Lattner
795069dd38 Announce that we don't support mem ops yet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19466 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 05:57:36 +00:00
Chris Lattner
a95589be3f Teach the address selector to make 'reg+reg' addressing modes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19457 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 04:40:19 +00:00
Chris Lattner
d4dab929d8 Emit NOT instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19455 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 04:31:30 +00:00
Chris Lattner
6c07aee7c9 Fix a bug emitting branches that broke a lot of programs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19452 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 04:06:27 +00:00
Chris Lattner
ef7ba0756b Be more careful where we set ContainsFPCode. We were missing a set in the 
int -> FP casting code.  Note that we don't have to set it for FP operations
that take FP values as operands: whatever produces the FP value will set the
flag.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19451 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 03:50:45 +00:00
Chris Lattner
a3aa2e2882 Fix a major bug in setcc/cmov folding, where we accidentally 
inverted the sense of the comparison.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19450 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 03:37:59 +00:00
Chris Lattner
1133309e57 Take register pressure into account when we have to decide whether to 
evaluate the LHS or the RHS of an operation first.  This causes good things
to happen.  For example, instead of compiling a loop to this:

.LBBstrength_result7_1: # loopentry
        movl 16(%esp), %edi
        movl (%edi), %edi             ;;; LOAD
        movl (%ecx), %ebx
        movl $2, (%eax,%ebx,4)
        movl (%edx), %ebx
        movl %esi, %ebp
        addl $21, %ebp
        addl $42, %esi
        cmpl $0, %edi                 ;;; USE
        cmovne %esi, %ebp
        cmpl %ebp, %ebx
        movl %ebp, %esi
        jg .LBBstrength_result7_1

We now compile it to this:

.LBBstrength_result7_1: # loopentry
        movl %edi, %ebx
        addl $42, %ebx
        addl $21, %edi
        movl (%ecx), %ebp              ;; LOAD
        cmpl $0, %ebp                  ;; USE
        cmovne %ebx, %edi
        movl (%edx), %ebx
        movl $2, (%eax,%ebx,4)
        movl (%esi), %ebx
        cmpl %edi, %ebx
        jg .LBBstrength_result7_1

Which reduces register pressure enough (in this case) to avoid spilling in the
loop.

As another example, consider the CodeGen/X86/regpressure.ll testcase.  We
used to generate this code for both cases:

regpressure1:
        subl $32, %esp
        movl %esi, 12(%esp)
        movl %edi, 8(%esp)
        movl %ebx, 4(%esp)
        movl %ebp, (%esp)
        movl 36(%esp), %ecx
        movl (%ecx), %eax
        movl 4(%ecx), %edx
        movl %edx, 24(%esp)
        movl 8(%ecx), %edx
        movl %edx, 16(%esp)
        movl 12(%ecx), %edx
        movl 16(%ecx), %esi
        movl 20(%ecx), %edi
        movl 24(%ecx), %ebx
        movl %ebx, 28(%esp)
        movl 28(%ecx), %ebx
        movl 32(%ecx), %ebp
        movl %ebp, 20(%esp)
        movl 36(%ecx), %ecx
        imull 24(%esp), %eax
        imull 16(%esp), %eax
        imull %edx, %eax
        imull %esi, %eax
        imull %edi, %eax
        imull 28(%esp), %eax
        imull %ebx, %eax
        imull 20(%esp), %eax
        imull %ecx, %eax
        movl (%esp), %ebp
        movl 4(%esp), %ebx
        movl 8(%esp), %edi
        movl 12(%esp), %esi
        addl $32, %esp
        ret

This code is basically trying to do all of the loads first, then execute all
of the multiplies.  Because we run out of registers, lots of spill code happens.
We now generate this code for both cases:

regpressure1:
        movl 4(%esp), %ecx
        movl (%ecx), %eax
        movl 4(%ecx), %edx
        imull %edx, %eax
        movl 8(%ecx), %edx
        imull %edx, %eax
        movl 12(%ecx), %edx
        imull %edx, %eax
        movl 16(%ecx), %edx
        imull %edx, %eax
        movl 20(%ecx), %edx
        imull %edx, %eax
        movl 24(%ecx), %edx
        imull %edx, %eax
        movl 28(%ecx), %edx
        imull %edx, %eax
        movl 32(%ecx), %edx
        imull %edx, %eax
        movl 36(%ecx), %ecx
        imull %ecx, %eax
        ret

which is much nicer (when we fold loads into the muls it will be even better).
The old instruction selector used to produce the good code for regpressure1
but not for regpressure2, as it depended on the order of operations in the
LLVM code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19449 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 03:11:44 +00:00
Chris Lattner
24aad1b0c1 Fold setcc instructions into selects. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19438 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-10 22:10:13 +00:00
Chris Lattner
57fbfb5879 Add conditional moves for the parity flag. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19437 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-10 22:09:33 +00:00
Chris Lattner
a13d3236d1 Implement 8-bit multiply for X86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19435 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-10 20:55:48 +00:00
Chris Lattner
bd9f0eefb2 Codegen (Reg|imm)+&GV as an LEA, because we cannot put it into the immediate field 
of an ADDri (due to current restrictions on MachineOperand :( ).  This allows
us to generate:

        leal Data+16000, %edx

instead of:

        movl $Data, %edx
        addl $16000, %edx


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19420 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-09 20:20:29 +00:00
Chris Lattner
250208587d Fix copy and pasto's for FP -> Int. This fixes fldry 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19418 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-09 19:49:59 +00:00
Chris Lattner
590d800a12 Initial implementation of FP->INT and INT->FP casts 
Also, fix zero_extend from bool to i8, which fixes Shootout/objinst.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19414 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-09 18:52:44 +00:00
Chris Lattner
6e7c47c12d Fix a subtle bug involving constant expr casts from int to fp 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19410 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-09 01:49:29 +00:00
Chris Lattner
1482458b23 Implement varargs and returnaddress/frameaddress intrinsics. With this 
patch, all of SingleSource/UnitTests passes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19408 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-09 00:01:27 +00:00
Chris Lattner
b0802651bf Okay 15th time is the charm. Looking at the vector size is useless as it 
gets clobbered by a previous statement.  This fixes all calls finally.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19399 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-08 20:51:36 +00:00
Chris Lattner
6cc70ef0f9 Okay, my off by one was actually off by two. This fixes Generic/2003-07-07-BadLongConst.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19398 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-08 20:39:31 +00:00
Chris Lattner
ce45d65d9a Fix off by one error 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19396 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-08 20:31:34 +00:00
Chris Lattner
5188ad735c Adjust to changes in LowerCallTo interface 
Minor bugfixes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19376 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-08 19:28:19 +00:00
Chris Lattner
8c92628d1c Wrap long line. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19367 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-08 06:59:50 +00:00
Chris Lattner
7ab65934a0 The X86 instruction selector already handles codegen of: 
store float 123.45, float* %P

as an integer store.  This adds handling of float immediate stores as integers
for arguments passed function calls.

This is now tested by CodeGen/X86/store-fp-constant.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19364 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-08 05:45:24 +00:00
Chris Lattner
18ad19488d Allow the selection-dag based selector to be diabled with -disable-pattern-isel. 
For now, this is the default, as the current selector is missing some big pieces.
To enable the new selector, pass -disable-pattern-isel=false to llc or lli.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19335 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-07 07:50:50 +00:00