Thomas Harte
|
3976420b88
|
Retains a little more of output controls.
|
2021-11-01 17:15:36 -07:00 |
|
Thomas Harte
|
2f1ce5fe43
|
Switch to using the swizzled palette for playfield output.
|
2021-11-01 14:44:30 -07:00 |
|
Thomas Harte
|
42145a5b8a
|
Delay bitplane installation until end of slot.
|
2021-11-01 14:18:58 -07:00 |
|
Thomas Harte
|
4e66017205
|
Enable sprite reuse and toggle to inactive when visible region is over.
|
2021-10-31 16:52:48 -07:00 |
|
Thomas Harte
|
299d517449
|
Performs a first implementation of fill mode.
|
2021-10-31 14:36:31 -07:00 |
|
Thomas Harte
|
4c1ab6ff25
|
Rethinks bitplane stops.
|
2021-10-31 09:01:38 -07:00 |
|
Thomas Harte
|
16f31cab6a
|
Avoid duplication of CIA select test.
|
2021-10-30 12:05:18 -07:00 |
|
Thomas Harte
|
02c88e6826
|
VHPOSR's fields are the other way around.
|
2021-10-30 12:04:46 -07:00 |
|
Thomas Harte
|
d25804f4a2
|
Throws in official register names.
|
2021-10-29 14:05:11 -07:00 |
|
Thomas Harte
|
edb75e69cb
|
Implement bitplane modulos.
|
2021-10-29 11:29:22 -07:00 |
|
Thomas Harte
|
f3e895f17c
|
Tag intended unused parameters.
|
2021-10-29 06:21:02 -07:00 |
|
Thomas Harte
|
b952d73e83
|
Disallow programmatic setting of blitter status.
|
2021-10-29 06:19:57 -07:00 |
|
Thomas Harte
|
07facc0636
|
Takes a stab at BZERO.
|
2021-10-28 18:12:46 -07:00 |
|
Thomas Harte
|
da1a69be27
|
Caps mouse speed.
Also takes another guess at CIA interrupt bits. To no avail.
|
2021-10-27 18:38:02 -07:00 |
|
Thomas Harte
|
b10f5ab110
|
Apply A mask when loading into barrel shifter.
|
2021-10-26 20:02:28 -07:00 |
|
Thomas Harte
|
b4286bb42b
|
Modulos are subtracted in descending mode.
|
2021-10-26 07:21:51 -07:00 |
|
Thomas Harte
|
139d35c6f9
|
Switches to basic use of sprite shifters.
|
2021-10-25 20:58:48 -07:00 |
|
Thomas Harte
|
cb24457b4a
|
Starts on a two-at-a-time sprite shifter.
|
2021-10-25 16:30:30 -07:00 |
|
Thomas Harte
|
9f3efb7f05
|
Limits graphical output to [all but one bit] of the display window.
|
2021-10-25 14:12:23 -07:00 |
|
Thomas Harte
|
e6001e0f22
|
Shifts bitplanes irrespective of output window.
|
2021-10-25 13:59:39 -07:00 |
|
Thomas Harte
|
c6535bf035
|
Switches bitplane shifter to returning four high-res pixels at a time.
|
2021-10-25 13:34:36 -07:00 |
|
Thomas Harte
|
7118a515e0
|
Reduce logging in trustworthy areas.
|
2021-10-23 20:36:41 -07:00 |
|
Thomas Harte
|
952451c9b8
|
Add mouse input.
|
2021-10-23 20:17:13 -07:00 |
|
Thomas Harte
|
610327a04e
|
Fix sprite H start bit order.
|
2021-10-22 23:20:20 -07:00 |
|
Thomas Harte
|
2121e32409
|
Fix sprite bit ordering.
|
2021-10-22 21:10:01 -07:00 |
|
Thomas Harte
|
7ec21edc2f
|
Attempts to hack in some form of sprite display.
|
2021-10-22 19:51:10 -07:00 |
|
Thomas Harte
|
003162f710
|
Limit to specific purpose.
|
2021-10-22 16:16:19 -07:00 |
|
Thomas Harte
|
040ac93042
|
Takes a shot at the vertical stuff of sprite DMA.
|
2021-10-22 14:32:59 -07:00 |
|
Thomas Harte
|
b489ba3d0d
|
Adds sprite DMA windows.
|
2021-10-22 13:07:20 -07:00 |
|
Thomas Harte
|
c5e8b547af
|
Captures the attach flag and observes activation rule.
|
2021-10-22 11:21:58 -07:00 |
|
Thomas Harte
|
e67de90ad0
|
Starts to bring sprites inside DMADevice orthodoxy.
|
2021-10-21 21:57:46 -07:00 |
|
Thomas Harte
|
c3c84c88a1
|
Switch to ahead-of-time planar to chunky conversion.
|
2021-10-21 20:48:57 -07:00 |
|
Thomas Harte
|
0dc9c4cee1
|
Undo hard-coding of fetch window.
|
2021-10-19 15:18:39 -07:00 |
|
Thomas Harte
|
b312a61a81
|
Add two dummy reads.
|
2021-10-16 13:30:45 -07:00 |
|
Thomas Harte
|
4917556a99
|
The shift goes the other way in descending mode.
|
2021-10-16 11:09:40 -07:00 |
|
Thomas Harte
|
aa6b0f07b7
|
Correct filename.
|
2021-10-16 05:37:46 -07:00 |
|
Thomas Harte
|
e27a10bde4
|
Simplify control flow.
|
2021-10-14 16:47:18 -07:00 |
|
Thomas Harte
|
253a199f27
|
Fire sync-match interrupt upon any match.
|
2021-10-14 16:36:17 -07:00 |
|
Thomas Harte
|
61e5702520
|
Remove dead TODO.
|
2021-10-14 16:09:11 -07:00 |
|
Thomas Harte
|
b12c640807
|
Makes drives non-copyable.
To avoid error in the future.
|
2021-10-14 12:37:55 -07:00 |
|
Thomas Harte
|
9be23ecc34
|
Add end-of-Blit interrupt.
Along with a slightly easier path for posting interrupts, in C++ compilation unit terms.
|
2021-10-13 15:09:19 -07:00 |
|
Thomas Harte
|
eec068914e
|
Slightly improve logging.
|
2021-10-11 18:05:57 -07:00 |
|
Thomas Harte
|
39b8285ba5
|
Trust the HRM on step bit, but catch rising edge.
|
2021-10-11 07:42:42 -07:00 |
|
Thomas Harte
|
7733fef3bd
|
DSKLEN has to be written twice.
|
2021-10-11 06:16:01 -07:00 |
|
Thomas Harte
|
6acddfdb98
|
Add the sync match interrupt.
Albeit that it doesn't yet unblock disk DMA.
|
2021-10-11 03:37:56 -07:00 |
|
Thomas Harte
|
99492c2ec2
|
Further tweak logging.
|
2021-10-10 18:19:50 -07:00 |
|
Thomas Harte
|
846b505d27
|
Reduce logging; disk data probably isn't the immediate obstacle.
|
2021-10-10 13:04:10 -07:00 |
|
Thomas Harte
|
8d43b4a98d
|
Expands Disk DMA access window.
|
2021-10-10 11:47:02 -07:00 |
|
Thomas Harte
|
9336ffe216
|
Take a stab at index-hole sync.
|
2021-10-09 08:01:02 -07:00 |
|
Thomas Harte
|
eb157f15f3
|
Adds index hole interrupt.
|
2021-10-09 04:08:59 -07:00 |
|
Thomas Harte
|
d6e2a3f425
|
Make a first attempt to spool into RAM.
|
2021-10-08 18:11:47 -07:00 |
|
Thomas Harte
|
b47ca13ed3
|
Push disk data onwards.
|
2021-10-08 17:18:11 -07:00 |
|
Thomas Harte
|
67546c4d6e
|
Per the HRM, the index hole is connected to CIA B, potentially to raise an interrupt.
|
2021-10-08 17:12:37 -07:00 |
|
Thomas Harte
|
f72deb0a5c
|
Correct RDY position.
|
2021-10-08 04:32:13 -07:00 |
|
Thomas Harte
|
616ccbb878
|
Correct ID bit placement, multiplex with motor state.
The latter per my reading of http://www.primrosebank.net/computers/amiga/upgrades/amiga_upgrades_storage_fdis.htm
|
2021-10-08 04:05:57 -07:00 |
|
Thomas Harte
|
5899af0038
|
Starts accumulating disk data.
|
2021-10-07 05:11:32 -07:00 |
|
Thomas Harte
|
33ff4f3b5c
|
Eliminate drive copies.
|
2021-10-06 13:40:28 -07:00 |
|
Thomas Harte
|
20bad38d42
|
Add drive activity lights.
|
2021-10-06 04:54:40 -07:00 |
|
Thomas Harte
|
92a07398cd
|
I think CHNG works the other way around.
|
2021-10-06 04:47:52 -07:00 |
|
Thomas Harte
|
e961d0b4a3
|
Switch RDY type.
|
2021-10-06 04:41:09 -07:00 |
|
Thomas Harte
|
2253ff656a
|
Adds route for inserting disks.
|
2021-10-05 16:12:30 -07:00 |
|
Thomas Harte
|
18631399ad
|
Attempts to clock the disk controller.
|
2021-10-05 15:38:56 -07:00 |
|
Thomas Harte
|
ad4afcdcd5
|
Switch stepping direction.
Empirically, based on the actions of Kickstart, and assuming my confusion is because the relevant signal is active low.
|
2021-10-05 15:23:48 -07:00 |
|
Thomas Harte
|
2cf5bcc5db
|
Clarify logic somewhat.
|
2021-10-05 15:20:05 -07:00 |
|
Thomas Harte
|
1180ad7662
|
Disables a couple of now-trustworthy LOGs.
|
2021-10-05 06:51:47 -07:00 |
|
Thomas Harte
|
5463cd1ae3
|
Attempts to support stepping and head selection.
|
2021-10-05 06:36:17 -07:00 |
|
Thomas Harte
|
647ec770ce
|
Implements motor latching, drive ID shift registers.
|
2021-10-05 05:12:01 -07:00 |
|
Thomas Harte
|
e47bec2e65
|
Switch CIA B ports over.
|
2021-10-05 03:38:11 -07:00 |
|
Thomas Harte
|
674941abdf
|
Starts to add a disk controller.
|
2021-10-04 16:45:05 -07:00 |
|
Thomas Harte
|
b3f0ca39ed
|
Adds some unused drives.
|
2021-10-04 08:12:13 -07:00 |
|
Thomas Harte
|
5ccb512883
|
Moves the CIAs into the Chipset class.
This reflects the routing of interrupt signals for now, but also prepares for the addition of disk drives.
|
2021-10-04 06:44:54 -07:00 |
|
Thomas Harte
|
da286d5ae8
|
Switch spaces to tabs.
|
2021-10-04 05:27:25 -07:00 |
|
Thomas Harte
|
a282a51673
|
Remove last of the direct printf'ing.
|
2021-09-30 02:42:59 -04:00 |
|
Thomas Harte
|
b7b13e20d1
|
Single column blits should use both masks.
|
2021-09-29 22:49:35 -04:00 |
|
Thomas Harte
|
402fa41bc0
|
Corrects initial error value.
|
2021-09-29 22:19:17 -04:00 |
|
Thomas Harte
|
0b9ebafc0f
|
Flip bit deserialisation order.
|
2021-09-28 22:12:13 -04:00 |
|
Thomas Harte
|
140e24ef15
|
Grab further copy flags.
|
2021-09-28 22:11:58 -04:00 |
|
Thomas Harte
|
ffcd2ea10c
|
Attempts more properly to implement line mode.
|
2021-09-28 21:39:09 -04:00 |
|
Thomas Harte
|
cb460de94d
|
Makes bad first attempt at a Bresenham inner loop.
|
2021-09-27 22:06:00 -04:00 |
|
Thomas Harte
|
f6624bf776
|
Edges mildly closer to line output.
|
2021-09-26 19:18:12 -04:00 |
|
Thomas Harte
|
b4b6c4d86f
|
Attempts to support left and right masks.
|
2021-09-26 18:42:08 -04:00 |
|
Thomas Harte
|
759689ff31
|
Fix line mode flag, add busy status.
|
2021-09-26 18:16:00 -04:00 |
|
Thomas Harte
|
9012a7f5e1
|
Merge branch 'master' into Amiga
|
2021-09-23 23:00:03 -04:00 |
|
Thomas Harte
|
e5a5faa417
|
Resolves Clang 13 implicit conversion warnings.
|
2021-09-23 22:53:41 -04:00 |
|
Thomas Harte
|
c4ab2bbeed
|
Hard-code fetch window width. For now.
|
2021-09-23 22:06:13 -04:00 |
|
Thomas Harte
|
42ef459e20
|
Resolve resting values.
|
2021-09-23 22:05:59 -04:00 |
|
Thomas Harte
|
cad1a9e0f1
|
Correct bit test.
|
2021-09-23 20:42:31 -04:00 |
|
Thomas Harte
|
f1d514470d
|
Add note to future self.
|
2021-09-23 20:29:39 -04:00 |
|
Thomas Harte
|
9a7a54f22f
|
Take alternative guess as to meaning of 'use' bits.
|
2021-09-23 18:42:12 -04:00 |
|
Thomas Harte
|
137d1c61bd
|
Allow for channel enables and blitting direction.
|
2021-09-23 18:38:37 -04:00 |
|
Thomas Harte
|
adc071ed7a
|
Fix: modulos are 15-bit signed, the minterms are also in regular BLTCON0.
|
2021-09-23 18:30:35 -04:00 |
|
Thomas Harte
|
e06f470044
|
Ensure no implicit conversion from int to IntT.
|
2021-09-23 18:30:04 -04:00 |
|
Thomas Harte
|
ab69fe56c9
|
Take a first shot at magical instant blitting.
|
2021-09-23 18:13:51 -04:00 |
|
Thomas Harte
|
60bad22a91
|
Correct fetch window.
|
2021-09-23 18:13:24 -04:00 |
|
Thomas Harte
|
7092429f7c
|
Added some notes to self on line mode.
|
2021-09-20 23:08:26 -04:00 |
|
Thomas Harte
|
fa800bb809
|
Introduces code for minterm application.
|
2021-09-20 19:13:23 -04:00 |
|
Thomas Harte
|
e15f1103a0
|
Takes a shot at low resolution shifting.
|
2021-09-20 19:00:52 -04:00 |
|
Thomas Harte
|
a4263b5a8c
|
Ties bitplane collection to line position.
Outgoing bug: incrementing the video relative offset too often, due to cycles that are discovered to be CPU-targetted.
|
2021-09-19 21:55:45 -04:00 |
|
Thomas Harte
|
245b7baa61
|
Moves the Copper into its own file.
|
2021-09-16 21:17:23 -04:00 |
|
Thomas Harte
|
0eeaaa150a
|
Correct Copper start address.
|
2021-09-16 21:01:37 -04:00 |
|
Thomas Harte
|
692d87f446
|
Attempts to restrict blitter slot allocation.
|
2021-09-16 19:56:28 -04:00 |
|
Thomas Harte
|
6572efe2a7
|
Clarifies word addressing.
|
2021-09-16 08:24:52 -04:00 |
|
Thomas Harte
|
8aac2bd029
|
Stubs in serial port status.
|
2021-09-14 21:53:07 -04:00 |
|
Thomas Harte
|
add11db369
|
Factors out DMADevice, which is now a parent of Blitter.
|
2021-09-14 20:51:32 -04:00 |
|
Thomas Harte
|
e47eab1d40
|
Merge branch 'master' into Amiga
|
2021-09-14 20:27:59 -04:00 |
|
Thomas Harte
|
fa71ae3174
|
Add apology.
|
2021-09-14 20:23:36 -04:00 |
|
Thomas Harte
|
dfcd1508c9
|
Establishes valid initial BRAM.
|
2021-09-10 19:56:20 -04:00 |
|
Thomas Harte
|
7e5fc4444a
|
Default to ROM01.
|
2021-09-09 22:09:09 -04:00 |
|
Thomas Harte
|
d8e42c4379
|
Tweak guess at initial state.
|
2021-09-09 22:06:36 -04:00 |
|
Thomas Harte
|
dd37fa49a0
|
Stabilises Apple IIgs display.
|
2021-09-09 20:08:15 -04:00 |
|
Thomas Harte
|
fd70f7ad43
|
Attempts to make pixel content observeable.
|
2021-09-08 20:57:26 -04:00 |
|
Thomas Harte
|
6e034c9b7f
|
At least manages to place a pixel region on screen.
Albeit that I've suddenly realised that I've failed properly to think about high-res versus low-res.
|
2021-08-11 20:31:37 -04:00 |
|
Thomas Harte
|
52e375a985
|
Move towards playfield decoding.
|
2021-08-11 18:47:35 -04:00 |
|
Thomas Harte
|
10a5e7313f
|
Makes a buggy first attempt at bitplane data collection.
|
2021-08-10 21:28:48 -04:00 |
|
Thomas Harte
|
ec9cb21fae
|
Starts towards bitplane collection.
|
2021-08-10 19:01:41 -04:00 |
|
Thomas Harte
|
fdd02ad6a6
|
Neaten, slightly.
|
2021-08-10 09:20:34 -04:00 |
|
Thomas Harte
|
76e9fcc94a
|
Obey blitter DMA-enable mask.
|
2021-08-10 09:19:15 -04:00 |
|
Thomas Harte
|
e412927415
|
Logs a bit more from the Blitter, gives it access to slots.
|
2021-08-10 07:17:01 -04:00 |
|
Thomas Harte
|
dda154c7c6
|
Adds nonsense disk reads, which seems to lead to bitplane and blitter requests.
Progress, at last!
|
2021-08-09 20:31:14 -04:00 |
|
Thomas Harte
|
9215535bee
|
Adds a container for the disk controller.
Thereby appears to prove that my Amiga is getting as far as attempting to load from floppy.
|
2021-08-09 17:35:09 -04:00 |
|
Thomas Harte
|
86c6248b48
|
Merge branch 'master' into Amiga
|
2021-08-09 17:09:04 -04:00 |
|
Thomas Harte
|
1502c4530e
|
Takes a further step towards real timing.
|
2021-08-08 21:52:28 -04:00 |
|
Thomas Harte
|
c1df4d1c0b
|
Mirroring is correct.
|
2021-08-08 20:20:12 -04:00 |
|
Thomas Harte
|
7f2610c4fc
|
Disambiguates serial control logs.
|
2021-08-07 16:57:30 -04:00 |
|
Thomas Harte
|
b11dd6950c
|
Adds an entry for DiagROM.
|
2021-08-07 16:56:18 -04:00 |
|
Thomas Harte
|
db3c158215
|
Further increases logging.
|
2021-08-05 20:07:14 -04:00 |
|
Thomas Harte
|
25e2bd307a
|
Sets VPA for CIA accesses; logs a little more.
|
2021-08-05 20:06:48 -04:00 |
|
Adam Smith
|
fdb676da4e
|
.
|
2021-08-01 00:26:14 -07:00 |
|
Thomas Harte
|
1bae4973bc
|
Post the serial control write onwards.
|
2021-07-30 18:24:27 -04:00 |
|
Thomas Harte
|
3d9f86c584
|
Begins keyboard sketches and notes.
|
2021-07-30 18:23:15 -04:00 |
|
Thomas Harte
|
3514e537ca
|
Minor logging tweaks.
|
2021-07-30 18:22:59 -04:00 |
|
Thomas Harte
|
b78090ec76
|
Fixes IOPortsAndTimers classification.
|
2021-07-28 19:39:42 -04:00 |
|
Thomas Harte
|
759007ffc1
|
Attempts to route CIA interrupts.
|
2021-07-28 19:36:30 -04:00 |
|
Thomas Harte
|
69ae9d72c8
|
Remove dead non-access.
|
2021-07-27 22:27:20 -04:00 |
|
Thomas Harte
|
604232acd9
|
Establish appropriate word-size mask.
|
2021-07-27 22:23:38 -04:00 |
|
Thomas Harte
|
82205d71cc
|
Breaks up loop for arithmetic simplicity.
|
2021-07-27 21:59:27 -04:00 |
|
Thomas Harte
|
402eab10f8
|
Breaks video output while attempting to pull it into the main loop.
|
2021-07-27 21:33:07 -04:00 |
|
Thomas Harte
|
b6bf4d73ad
|
Blitter-finished bit aside, attempts to complete the Copper.
|
2021-07-27 21:10:14 -04:00 |
|
Thomas Harte
|
5425b5c423
|
Adds some form of WAITing to the Copper.
|
2021-07-27 19:32:55 -04:00 |
|
Thomas Harte
|
29cd8504ca
|
Implements enough Copper to get a first store.
|
2021-07-27 19:06:16 -04:00 |
|
Thomas Harte
|
3544746934
|
Modifies interface, starts on scheduler.
Probably corrects the pixel clock, which I think was scaled up by a factor of 4.
|
2021-07-27 16:41:18 -04:00 |
|
Thomas Harte
|
d8f814f1c4
|
If I'm going to push only a single colour, might as well make it fast.
|
2021-07-26 21:19:43 -04:00 |
|
Thomas Harte
|
a43175125a
|
Assuming I'm going to keep this synchronous, extends function signature.
|
2021-07-26 20:13:06 -04:00 |
|
Thomas Harte
|
1d03bc560a
|
Stores the colour palette, uses entry 0 as my new always output.
|
2021-07-26 18:59:11 -04:00 |
|
Thomas Harte
|
3832acf6e3
|
Produces a static white box, at least.
|
2021-07-26 18:51:01 -04:00 |
|
Thomas Harte
|
7894b50321
|
Starts towards an actual pixel output loop.
|
2021-07-26 18:44:20 -04:00 |
|
Thomas Harte
|
ffded619e6
|
Returns track 0 found, as a guess.
|
2021-07-26 18:44:01 -04:00 |
|
Thomas Harte
|
bcb7bb5cce
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Improves logging further.
To investigate the new perpetual loop.
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2021-07-26 17:02:30 -04:00 |
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Thomas Harte
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87dcd82f69
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Makes a first attempt at some sort of interrupt functionality.
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2021-07-26 16:40:42 -04:00 |
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Thomas Harte
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e671cc6056
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Add stubs for joystick/mouse querying.
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2021-07-26 16:21:51 -04:00 |
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