Bill Wendling
272df516d7
Thumb ldr reg+imm offsets were encoded incorrectly. The scaling factor of the
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t_addrmode_s# address modes is used for ASM printing, not for encoding.
<rdar://problem/8745375>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121417 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 21:49:07 +00:00
Owen Anderson
fe7fac74b4
Use the new IsAligned fixup flag to improve fixup encodings for Thumb2 branches. This is still not perfect,
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but it gets many more of them correct than it did previously.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121414 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 21:34:47 +00:00
Owen Anderson
05018c2f28
Fix an issue in some Thumb fixups, where the effective PC address needs to be 4-byte aligned when calculating
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the offset. Add a new fixup flag to represent this, and use it for the one fixups that I have a testcase for needing
this. It's quite likely that the other Thumb fixups will need this too, and to have their fixup encoding logic
adjusted accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121408 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 20:27:52 +00:00
Jim Grosbach
b492a7c213
Rename CB/CBZ specific fixup accordingly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121404 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 19:50:12 +00:00
Jim Grosbach
027d6e8d1c
Rename the encoder method for t_cbtarget to match.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121399 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 19:04:53 +00:00
Owen Anderson
d7b3f5870d
Fix Thumb2 fixups for ldr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121350 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 01:51:07 +00:00
Bill Wendling
09aa3f0ef3
The BLX instruction is encoded differently than the BL, because why not? In
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particular, the immediate has 20-bits of value instead of 21. And bit 0 is '0'
always. Going through the BL fixup encoding was trashing the "bit 0 is '0'"
invariant.
Attempt to get the encoding at slightly more correct with this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121336 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 00:39:08 +00:00
Owen Anderson
fb20d89075
Fix Thumb2 BCC encoding and fixups.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121329 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 00:27:41 +00:00
Bill Wendling
dff2f7151f
Support the "target" encodings for the CB[N]Z instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121308 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 23:01:43 +00:00
Bill Wendling
b8958b031e
Add support for loading from a constant pool.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121226 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 01:57:09 +00:00
Owen Anderson
d8e351b96f
VLDR fixups need special handling under Thumb. While the encoding is the same,
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the order of the bytes in the data stream is flipped around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121215 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 00:18:36 +00:00
Matt Beaumont-Gay
2bf315f087
Fix a warning about a variable which is only used in an assertion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121206 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-07 23:26:21 +00:00
Jim Grosbach
d967cd096a
Binary encoding for ARM tLDRspi and tSTRspi.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121186 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-07 21:50:47 +00:00
Owen Anderson
eb6779c5b9
Second attempt at converting Thumb2's LDRpci, including updating the gazillion places that need to know about it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121082 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-07 00:45:21 +00:00
Jim Grosbach
662a816e89
Add fixup for Thumb1 BL/BLX instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121072 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-06 23:57:07 +00:00
Jim Grosbach
d91f4e40e6
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order
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halfword being emitted to the stream first. rdar://8728174
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120848 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-03 22:31:40 +00:00
Bill Wendling
0bdf0c05b9
The tLDR instruction wasn't encoded properly:
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<MCInst 2251 <MCOperand Reg:70> <MCOperand Reg:66> <MCOperand Imm:0> <MCOperand Reg:0> <MCOperand Imm:14> <MCOperand Reg:0>>
Notice that the "reg" here is 0, which is an invalid register. Put a check in
the code for this to prevent crashing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120766 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-03 00:53:22 +00:00
Jim Grosbach
dff84b0325
Add support for binary encoding of ARM 'adr' instructions referencing constant
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pool entries (LEApcrel pseudo). Ongoing saga of rdar://8542291.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120635 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-02 00:28:45 +00:00
Bill Wendling
cf590263cd
Add a post encoder method to the VFP instructions to convert them to the Thumb2
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encoding if we're in that mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120608 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-01 21:54:50 +00:00
Jim Grosbach
5177f79c37
Use the correct fixup type for ARM VLDR*
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120604 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-01 21:09:40 +00:00
Jim Grosbach
5d14f9be7b
Refactor LEApcrelJT as a pseudo-instructionlowered to a cannonical ADR
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instruction at MC lowering. Add binary encoding information for the ADR,
including fixup data for the label operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120594 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-01 19:47:31 +00:00
Owen Anderson
9d63d90de5
Add correct encodings for STRD and LDRD, including fixup support. Additionally, update these to unified syntax.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120589 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-01 19:18:46 +00:00
Jim Grosbach
3990d8f89f
10 bits, not 12.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120584 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-01 18:51:32 +00:00
Jim Grosbach
b0708d292b
Fix typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120499 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 23:51:41 +00:00
Jason W Kim
61db62990b
Thanks to JimG for catching this!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120494 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 23:27:18 +00:00
Bill Wendling
1fd374e9c1
* Add support for encoding t_addrmode_s2 and t_addrmode_s1. They are the same as
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t_addrmode_s4, but with a different scaling factor.
* Encode the Thumb1 load and store instructions. This involved a bit of
refactoring (hi, Chris! :-). Some of the patterns became dead afterwards and
were removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120482 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 22:57:21 +00:00
Owen Anderson
80dd3e0612
Simplify the encoding of reg+/-imm12 values that allow PC-relative encoding. This allows the
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Thumb2 encoding to share code with the ARM encoding, which gets use fixup support for free.
It also allows us to fold away at least one codegen-only pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120481 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 22:45:47 +00:00
Jim Grosbach
97dd28fb89
Fix handling of ARM negative pc-relative fixups for loads and stores.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120480 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 22:40:36 +00:00
Owen Anderson
0e1bcdf4f7
Add encoding support for Thumb2 PLD and PLI instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120449 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 19:19:31 +00:00
Bill Wendling
ef4a68badb
Add parsing for the Thumb t_addrmode_s4 addressing mode. This can almost
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certainly be made more generic. But it does allow us to parse something like:
ldr r3, [r2, r4]
correctly in Thumb mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120408 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 07:44:32 +00:00
Owen Anderson
6af50f7dd1
Correct Thumb2 encodings for a much wider range of loads and stores.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120364 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 00:14:31 +00:00
Bob Wilson
8e0c7b5287
Fix the encoding of VLD4-dup alignment.
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The only reasonable way I could find to do this is to provide an alternate
version of the addrmode6 operand with a different encoding function. Use it
for all the VLD-dup instructions for the sake of consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120358 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 00:00:42 +00:00
Owen Anderson
75579f739f
Provide Thumb2 encodings for basic loads and stores.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120340 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 22:44:32 +00:00
Duncan Sands
3d93893895
Fix a compiler warning about Kind being used uninitialized
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when assertions are disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119962 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22 09:38:00 +00:00
Jim Grosbach
817c1a6ddd
Minor cleanups to a few llvm_unreachable() calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119767 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 00:27:09 +00:00
Bill Wendling
d1fadd8c5d
An 'unreachable' shouldn't have a '0 &&' prefix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119762 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 00:05:15 +00:00
Jason W Kim
837caa9313
Fix .o emission of ARM movt/movw. MCSymbolRefExpr::VK_ARM_(HI||LO)16 for the .o path now works for ARM.
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Note: lo16AllZero remains in ARMInstrInfo.td - It can be factored out when Thumb movt is repaired.
Existing tests cover this update.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119760 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 23:37:15 +00:00
Bill Wendling
6bc105a7b9
Add binary emission stuff for VLDM/VSTM. This reuses the
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"getRegisterListOpValue" logic. If the registers are double or single precision,
the value returned is suitable for VLDM/VSTM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119435 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 00:45:23 +00:00
Jim Grosbach
99f53d13ef
ARM LDR_PRE/LDR_POST/STR_PRE/STR_POST (and the *B counterparts) binary encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119180 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 20:47:07 +00:00
Chris Lattner
2ac190238e
add fields to the .td files unconditionally, simplifying tblgen a bit.
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Switch the ARM backend to use 'let' instead of 'set' with this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119120 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 05:19:05 +00:00
Owen Anderson
5de6d841a5
First stab at providing correct Thumb2 encodings, start with adc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118924 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-12 21:12:40 +00:00
Jim Grosbach
e50e6bcd90
Start of support for binary emit of 16-it Thumb instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118859 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-11 23:41:09 +00:00
Owen Anderson
8f14391314
Fill out support for Thumb2 encodings of NEON instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118854 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-11 23:12:55 +00:00
Owen Anderson
57dac88f77
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4].
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118843 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-11 21:36:43 +00:00
Owen Anderson
c7139a6f0d
Add support for Thumb2 encodings of NEON data processing instructions, using the new PostEncoderMethod infrastructure.
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More tests to come.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118819 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-11 19:07:48 +00:00
Jim Grosbach
c466b937db
Encoding of destination fixup for ARM branch and conditional branch
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instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118801 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-11 18:04:49 +00:00
Jim Grosbach
7eab97f260
Encoding for ARM LDRSH_POST.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118794 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-11 16:55:29 +00:00
Jim Grosbach
570a922691
ARM STRH encoding information.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118757 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-11 01:09:40 +00:00
Jim Grosbach
5d5eb9e381
ARM LDM encoding for the mode (ia, ib, da, db) operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118736 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-10 23:38:36 +00:00
Jim Grosbach
d92354c574
For ARM load/store instructions, encode [reg+reg] with no shifter immediate as
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a left shift by zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118587 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-09 17:38:15 +00:00