6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-23 01:30:19 +00:00
Code Issues Projects Releases Wiki Activity
76,526 Commits 39 Branches 0 Tags 277 MiB
3e944e38ea
Commit Graph

14482 Commits

Author SHA1 Message Date
Jim Grosbach
191d33fd6d Thumb2 assembly parsing and encoding for RSB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139839 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 20:54:14 +00:00
Jim Grosbach
aba8015cc3 Thumb2 assembly parsing and encoding for RRX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139831 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 19:52:43 +00:00
Jim Grosbach
5260be1f2d Thumb2 assembly parsing and encoding for ROR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139830 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 19:50:04 +00:00
Jim Grosbach
689b86ed2e Thumb2 assembly parsing and encoding for REV16/REVSH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139828 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 19:46:13 +00:00
Jakob Stoklund Olesen
01afdb3a45 VirtRegMap is counting spill slots, not register spills. 
Fix the stats counters to reflect that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139819 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 18:31:13 +00:00
Bruno Cardoso Lopes
0c4b9ff077 Change all checks regarding the presence of any SSE level to always 
take into consideration the presence of AVX. This change, together with
the SSEDomainFix enabled for AVX, makes AVX codegen to always (hopefully)
emit the same code as SSE for 128-bit vector ops. I don't
have a testcase for this, but AVX now beats SSE in performance for
128-bit ops in the majority of programas in the llvm testsuite

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139817 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 18:27:36 +00:00
Jim Grosbach
1b69a128d6 Thumb2 assembly parsing and encoding for REV. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139813 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 18:13:30 +00:00
Jim Grosbach
4bab3c7710 Thumb2 assembly parsing and encoding for RBIT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139811 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 18:07:14 +00:00
Jim Grosbach
3e3a9c7964 Thumb2 assembly parsing and encoding for signed saturating arithmetic insns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139810 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 18:06:15 +00:00
Jim Grosbach
07d7f3d387 Re-order test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139795 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 16:04:13 +00:00
Eli Friedman
c82751dd67 Make demanded-elt simplification for shufflevector slightly stronger. Spotted by inspection. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139768 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 01:14:29 +00:00
Andrew Trick
b1afbac64b [regcoalescing] bug fix for RegistersDefinedFromSameValue. 
An improper SlotIndex->VNInfo lookup was leading to unsafe copy removal.
Fixes PR10920 401.bzip2 miscompile with no IV rewrite.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139765 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 01:09:33 +00:00
Jim Grosbach
f18544d1e5 Thumb2 assembly parsing and encoding for PLI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139757 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 23:29:05 +00:00
Jim Grosbach
f83e297cd1 Thumb2 assembly parsing and encoding for PLD. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139756 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 23:26:12 +00:00
Jim Grosbach
0b69247b10 Thumb2 assembly parsing and encoding for PKH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139754 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 23:16:41 +00:00
Owen Anderson
8adf62034a Fix a crasher in Thumb2 MOV-immediate encoding for certain inputs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139747 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 22:46:14 +00:00
Jim Grosbach
0b3ed6de80 Thumb2 assembly parsing and encoding for ORR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139742 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 21:43:57 +00:00
Jim Grosbach
b72504b4fa Thumb2 assembly parsing and encoding for ORN. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139741 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 21:29:54 +00:00
Jim Grosbach
5c5eca3534 Thumb2 assembly parsing and encoding for NOP.W. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139740 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 21:26:25 +00:00
Jim Grosbach
d32872f9ca Thumb2 assembly parsing and encoding for MVN. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139739 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 21:24:41 +00:00
Jim Grosbach
64944f48a1 Thumb2 assembly parsing and encoding for MUL. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139735 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 21:00:40 +00:00
Jim Grosbach
bf841cf336 Thumb2 assembly parsing and encoding for MSR/MRS. 
Fix a bug in handling default flags for both ARM and Thumb encodings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139721 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 20:03:46 +00:00
Jim Grosbach
97f50f3870 Thumb2 assembly parsing and encoding for MRC/MRC2/MRRC/MRRC2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139717 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 19:28:49 +00:00
Jim Grosbach
95be01a569 Thumb2 assembly parsing and encoding for MOVT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139715 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 19:15:15 +00:00
Jim Grosbach
c2d3164ab4 Thumb2 assembly parsing for MOV in IT block. 
Select the right 16 vs. 32 bit encoding in an IT block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139714 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 19:12:11 +00:00
Dan Gohman
211048286b objc_retainBlock is not NoModRef because it can update forwarding pointers 
in memory relevant to the optimizer. rdar://10050579.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139708 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 18:13:00 +00:00
Jim Grosbach
d0588e2a2e ARM fix assembly parser handling of ranges in register lists. 
Clean up register list handling in general a bit to explicitly check things
like all the registers being from the same register class.

rdar://8883573


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139707 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 18:08:35 +00:00
Nadav Rotem
436fe8498a Add integer promotion support for vselect 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139692 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 14:42:15 +00:00
Craig Topper
a08e255e1e Fix mem type for VEX.128 form of VROUNDP*. Remove filter preventing VROUND from being recognized by disassembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139691 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 06:41:26 +00:00
Craig Topper
3bb43a829e Make disassembling of VBLEND* print immediate as a XMM/YMM register name. Fixes PR10917. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139690 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 05:55:28 +00:00
Craig Topper
6a9795a457 Add test case for PR10851. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139689 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 04:36:54 +00:00
Bruno Cardoso Lopes
5ca0d14915 Vector shuffle mask <i32 4, i32 5, i32 2, i32 3> should yield "movsd", not "movss". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139686 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 02:36:14 +00:00
Devang Patel
d2aaaf3a75 Remove ancient debug info constructs from test cases, they are not relevant to test case's main objective. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139675 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 00:29:50 +00:00
Devang Patel
64789c582c Remove unnecessary old test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139674 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 00:28:54 +00:00
Devang Patel
f2e6d33125 Update tests. Remove irrelevant tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139658 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 23:07:41 +00:00
Akira Hatanaka
8395c91d56 Delete test cases that generate code for allegrex/psp and cannot be repurposed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139652 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 22:29:13 +00:00
Owen Anderson
13b8d1e396 Make use of Eli's FileCheck sorcery to improve this test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139645 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 21:37:50 +00:00
Eli Friedman
fe731214d2 Error out on CodeGen of unaligned load/store. Fix test so it isn't accidentally testing that case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139641 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 20:50:54 +00:00
Owen Anderson
7782a58b87 Correct disassembly printing of Thumb2 post-incremented LDRD and STRD. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139639 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 20:46:26 +00:00
Akira Hatanaka
a4b97f327d Add pattern used to match MipsLo, which is needed when the instruction selector 
tries to match a dead MipsLo node (explanation in the link below).

http://article.gmane.org/gmane.comp.compilers.llvm.devel/42757/match=dagcombiner+dead



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139634 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 20:13:58 +00:00
Akira Hatanaka
302fdecf9d Disable tests which generate code for allegrex or psp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139632 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 20:00:35 +00:00
Nadav Rotem
e1490d1e43 update checked pattern 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139631 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 19:59:18 +00:00
Nadav Rotem
aec5861bb6 Add vselect target support for targets that do not support blend but do support 
xor/and/or (For example SSE2).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139623 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 19:17:42 +00:00
Owen Anderson
b6b7f515e2 Teach the Thumb ASM parser that BKPT is allowed in IT blocks, even though it is always executed unconditionally. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139610 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 17:59:19 +00:00
Owen Anderson
12c7e90d36 Fix encoding of Thumb2 shifted register operands with RRX shifts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139606 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 17:34:32 +00:00
Craig Topper
58bbb81764 Remove filter that was preventing MOVDQU/MOVDQA and their VEX forms from being disassembled. Also added encodings for the other register/register form of these instructions. Fixes PR10848. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139588 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 06:54:58 +00:00
Andrew Trick
effb647154 [indvars] Revert r139579 until 401.bzip -arch i386 miscompilation is fixed. PR10920. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139583 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 05:23:49 +00:00
Andrew Trick
dd9d758a31 Disable IV rewriting by default. See PR10916. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139579 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 03:23:21 +00:00
Andrew Trick
603fff3968 Generalize test case to handle multiple indvars modes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139578 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 03:17:25 +00:00
Andrew Trick
3c8015aa6c Generalize this test's CHECK statements to handle different indvars modes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139577 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 02:46:27 +00:00
Andrew Trick
2e95d76f8c This test only makes sense with -enable-iv-rewrite. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139576 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 02:45:26 +00:00
Andrew Trick
94f2c23d24 [indvars] Fix bugs in floating point IV range checks noticed by inspection. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139574 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 01:59:32 +00:00
Andrew Trick
857ad229be Conditionalize indvars test that relies on SCEV expansion of geps, 
which is only relevant with canonical IVs


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139556 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-12 23:13:57 +00:00
Bruno Cardoso Lopes
8970060a4c Change testcase commandline to be more strict and silence buildbots 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139554 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-12 22:59:26 +00:00
Bruno Cardoso Lopes
5fc48100ee Fix PR10845. SUBREG_TO_REG shouldn't be used when the input and 
destination types are equal!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139553 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-12 22:59:23 +00:00
Andrew Trick
27cea8e34b indvars test only relevant for -enable-iv-rewrite. 
Otherwise this case is now covered by no-iv-rewrite.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139552 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-12 22:59:00 +00:00
Owen Anderson
926785487d Fix a failing ELF Thumb test. I _think_ this is right, but it's not totally clear to me what this test is doing. Could someone on an ELF platform check? 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139549 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-12 22:40:31 +00:00
Owen Anderson
cd00dc6852 Thumb2 POP's don't allow the PC as an operand, and PUSH's don't allow the SP either. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139542 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-12 21:28:46 +00:00
Bruno Cardoso Lopes
457d53d9ce Revert the wrong part of r139528, and fix testcases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139541 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-12 21:24:07 +00:00
Owen Anderson
fd92d2e106 Fix encoding of PC-relative LDRSHW with an immediate offset. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139537 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-12 20:36:51 +00:00
Andrew Trick
26e5285f9f Conditionalize indvars tests that rely on SCEV expansion of geps, 
which is relevant with canonical IVs. Anything else being checked by
these tests is already covered by early CSE.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139535 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-12 20:26:34 +00:00
Bruno Cardoso Lopes
8e03a821f9 Not sure how CMPPS and CMPPD had already ever worked, I guess it didn't. 
However with this fix it does now.

Basically the operand order for the x86 target specific node
is not the same as the instruction, but since the intrinsic need that
specific order at the instruction definition, just change the order
during legalization. Also, there were some wrong invertions of condition
codes, such as GE => LE, GT => LT, fix that too. Fix PR10907.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139528 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-12 19:30:40 +00:00
Owen Anderson
a3157b4026 Port more encoding tests to decoding tests, and correct an improper Thumb2 pre-indexed load decoding this uncovered. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139522 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-12 18:56:30 +00:00
Andrew Trick
29da5e6855 Removing indvars tests that directly test canonical IVs and nothing else. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139518 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-12 18:33:08 +00:00
Andrew Trick
f21bdf4f42 Rename -disable-iv-rewrite to -enable-iv-rewrite=false in preparation for default change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139517 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-12 18:28:44 +00:00
Eli Friedman
9f3b6a5a2a Fix mistake in test runline. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139505 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-12 17:32:58 +00:00
Andrew Trick
8f7ca5d98e Test case for r139453, WidenIV::GetExtendedOperandRecurrence. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139504 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-12 17:20:57 +00:00
Richard Osborne
a1d16b53e8 Associate a MemOperand with LDWCP nodes introduced during ISel. 
This information is required if we want LDWCP to be hoisted out of loops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139495 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-12 14:43:23 +00:00
Craig Topper
136046c9a2 Fix disassembling of one of the register/register forms of MOVUPS/MOVUPD/MOVAPS/MOVAPD/MOVSS/MOVSD and their VEX equivalents. Fixes PR10877. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139486 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-11 23:19:54 +00:00
Craig Topper
038197988b Fix disassembling of reverse register/register forms of ADD/SUB/XOR/OR/AND/SBB/ADC/CMP/MOV. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139485 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-11 21:41:45 +00:00
Craig Topper
842f58f9be Fix disassembling of PAUSE instruction. Fixes PR10900. Also fixed NOP disassembling to ignore OpSize and REX.W. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139484 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-11 20:23:20 +00:00
Eli Friedman
cfeb55cdbc Really un-XFAIL the testcase, like I said I would in r139458. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139459 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-10 02:02:27 +00:00
Richard Trieu
2db8628085 Fixed an assert from: 
assert("not implemented for target shuffle node");

to:

  assert(0 && "not implemented for target shuffle node");

This causes a test failure in CodeGen/X86/palignr.ll which has
been marked as XFAIL for the time being.
Test failure filed at PR10901.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139454 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-10 01:26:21 +00:00
Jim Grosbach
1ad60c2adc Thumb2 parsing and encoding for MOV(immediate). 
Some aliases for MOV(register) also to keep existing T1 tests happy when
run in thumbv7 mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139440 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-10 00:15:36 +00:00
Akira Hatanaka
33ff5aeaa8 Fix test cases. 
Generate code for Mips32r1 unless a Mips32r2 feature is tested.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139433 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 23:14:58 +00:00
Owen Anderson
921d01ae1f LDM writeback is not allowed if Rn is in the target register list. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139432 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 23:13:33 +00:00
Owen Anderson
08fef885eb Fix assembly/disassembly of Thumb2 ADR instructions with immediate operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139422 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 22:24:36 +00:00
Owen Anderson
51f6a7abf2 Thumb unconditional branches are allowed in IT blocks, and therefore should have a predicate operand, unlike conditional branches. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139415 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 21:48:23 +00:00
Eli Friedman
9db817fd0c Make the SelectionDAG verify that all the operands of BUILD_VECTOR have the same type. Teach DAGCombiner::visitINSERT_VECTOR_ELT not to make invalid BUILD_VECTORs. Fixes PR10897. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139407 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 21:04:06 +00:00
Akira Hatanaka
8ddf6531b8 Drop support for Mips1 and Mips2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139405 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 20:45:50 +00:00
Nadav Rotem
8ffad56f8e Implement vector-select support for avx256. Refactor the vblend implementation to have tablegen match the instruction by the node type 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139400 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 20:29:17 +00:00
Jim Grosbach
468709e43d Thumb2 assembly parsing and encoding for MLA and MLS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139399 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 20:24:45 +00:00
Jim Grosbach
84d043a8b3 Thumb2 assembly parsing and encoding for MCR, MCR2, MCRR, MCRR2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139397 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 20:19:28 +00:00
Jim Grosbach
1e0fff17f3 Tidy up formatting a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139396 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 20:17:49 +00:00
Jim Grosbach
95102265a9 Thumb2 assembly parsing and encoding for LSL. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139395 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 20:05:38 +00:00
Jim Grosbach
d4b72de3e2 Thumb2 assembly parsing and encoding for LDRT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139393 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 20:02:15 +00:00
Jim Grosbach
56806c2997 Thumb2 assembly parsing and encoding for LDRSHT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139392 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 20:01:18 +00:00
Jim Grosbach
a315a99093 Thumb2 assembly parsing and encoding for LDRSH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139391 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 19:54:30 +00:00
Jim Grosbach
578edfbfa0 Thumb2 assembly parsing and encoding for LDRSBT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139390 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 19:49:06 +00:00
Jim Grosbach
0811fe13d6 Thumb2 assembly parsing and encoding for LDRSB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139389 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 19:42:40 +00:00
Jim Grosbach
95d397c3b1 Thumb2 assembly parsing and encoding for LDRH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139386 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 19:13:53 +00:00
Jim Grosbach
1efd9a0e8b Shuffle a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139385 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 19:09:54 +00:00
Akira Hatanaka
d199d0c59c Drop support for Allegrex. Allegrex implements a variant of Mips2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139383 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 19:00:51 +00:00
Jim Grosbach
b6aed508e3 Thumb2 assembly parsing and encoding for LDREX/LDREXB/LDREXD/LDREXH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139381 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 18:37:27 +00:00
Jim Grosbach
e3a0adf162 Add FIXME. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139371 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 16:45:31 +00:00
Duncan Sands
73c8415d90 Mark the eh.typeid.for intrinsic as being 'const', which it is inside 
any given function.  As pointed out by John McCall, this is needed to
have redundant eh.typeid.for tests be eliminated in the presence of
cleanups.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139360 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 07:50:37 +00:00
Craig Topper
d3be6ecafe Add disassembler test for Intel syntax. Tests r139353. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139356 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 06:35:44 +00:00
Akira Hatanaka
ad5f0c9e73 Change default target architecture from Mips1 to Mips32r1 in preparation for 
removing support for Mips1 and Mips2. 

This change and the ones that follow have been discussed with and approved by
Bruno.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139344 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 01:13:27 +00:00
Devang Patel
9aee335c23 Directly point debug info to the stack slot of the arugment, instead of trying to keep track of vreg in which it the arugment is copied. The LiveDebugVariable can keep track of variable's ranges. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139330 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-08 22:59:09 +00:00
Owen Anderson
d2fc31b3f7 Soft fail CBZ/CBNZ in the disassembler if they appear inside an IT block. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139328 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-08 22:42:49 +00:00
Jim Grosbach
a77295db19 Thumb2 assembly parsing and encoding for LDRD(immediate). 
Refactor operand handling for STRD as well. Tests for that forthcoming.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139322 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-08 22:07:06 +00:00
Bruno Cardoso Lopes
7ec8fb8830 Add a AVX version of a simple i64 -> f64 bitcast. This could be 
triggered using llc with -O0, which wouldn't let it be folded and
expose the lack of this pattern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139320 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-08 21:52:33 +00:00
Bruno Cardoso Lopes
7cf79a88c8 Reapply testcase from r139309! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139318 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-08 21:05:43 +00:00
Kevin Enderby
5afc19002e Fix a Darwin x86_64 special case of a jmp to a temporary symbol from an atom 
without a base symbol that must not have a relocation entry.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139316 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-08 20:53:44 +00:00
Bruno Cardoso Lopes
caa60f15e4 Remove this crashing test, until I figure out what's going wrong here 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139309 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-08 18:32:36 +00:00
Bruno Cardoso Lopes
814c6ced85 Add AVX versions of blend vector operations and fix some issues noticed 
in Nadav's r139285 and r139287 commits.

1) Rename vsel.ll to a more descriptive name
2) Change the order of BLEND operands to "Op1, Op2, Cond", this is
necessary because PBLENDVB is already used in different places with
this order, and it was being emitted in the wrong way for vselect
3) Add AVX patterns and tests for the same SSE41 instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139305 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-08 18:05:08 +00:00
Bruno Cardoso Lopes
7db2d3a504 Fix PR10844: Add patterns to cover non foldable versions of X86vzmovl. 
Triggered using llc -O0. Also fix some SET0PS patterns to their AVX
forms and test it on the testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139304 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-08 18:05:02 +00:00
Jim Grosbach
9ea33b0c03 Add tests for Thumb2 LDRB indexed addressing w/ writeback. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139292 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-08 16:49:36 +00:00
Nadav Rotem
4b36e07487 This test is already covered by llvm/trunk/test/CodeGen/X86/vsel.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139288 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-08 08:43:23 +00:00
Nadav Rotem
cbdd2d10ba add a testcase for the previous patch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139287 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-08 08:31:31 +00:00
Nadav Rotem
ffe3e7da84 Add X86-SSE4 codegen support for vector-select. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139285 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-08 08:11:19 +00:00
Eli Friedman
81ac8ddc67 Fix the logic in BasicAliasAnalysis::aliasGEP for comparing GEP's with variable differences so that it actually does something sane. Fixes PR10881. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139276 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-08 02:23:31 +00:00
Jim Grosbach
e64fb28da1 Thumb2 assembly parsing and encoding for LDR post-indexed. 
More cleanup of the general indexed addressing T2 instructions. Still more to
do, especially for stores.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139272 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-08 01:01:32 +00:00
Jim Grosbach
eeec025cf5 Thumb2 assembly parsing and encoding for LDR pre-indexed w/ writeback. 
Adjust encoding of writeback load/store instructions to better reflect the
way the operand types are represented.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139270 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-08 00:39:19 +00:00
Jim Grosbach
f0eee6eca8 Thumb2 assembly parsing and encoding for LDRBT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139267 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-07 23:39:14 +00:00
Jim Grosbach
489c693f65 Thumb2 assembly parsing and encoding for LDRB(register). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139266 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-07 23:17:00 +00:00
Jim Grosbach
ab899c1bcc Thumb2 assembly parsing and encoding for LDR(register). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139264 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-07 23:10:15 +00:00
Jim Grosbach
8bb5a861a0 Thumb2 assembly parsing and encoding for LDRB(immediate). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139258 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-07 21:41:25 +00:00
Jim Grosbach
1aedfb47f9 Thumb2 assembly parsing and encoding for LDR(literal). 
Need branch relocation support to distinguish this encoding from the
16-bit Thumb1 encoding w/o the explicit .w suffix. That comes later, though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139257 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-07 21:33:16 +00:00
Owen Anderson
8a83f71301 Create Thumb2 versions of STC/LDC, and reenable the relevant tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139256 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-07 21:10:42 +00:00
Jim Grosbach
ed1cb6defa Add tests for Thumb2 LDR(immediate) from r139254. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139255 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-07 21:06:46 +00:00
Jim Grosbach
94f914e3fd Thumb2 parsing and encoding for LDMDB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139251 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-07 19:57:53 +00:00
James Molloy
a5d5856854 Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139250 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-07 19:42:28 +00:00
Eli Friedman
d5ccb0558f Fix atomic load and store on x86 to pass -verify-machineinstrs (and possibly fix some subtle bugs involving passes which check mayStore()). 
This isn't exactly ideal, but it is good enough for the moment.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139245 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-07 18:48:32 +00:00
Jim Grosbach
90502888f2 Update test for 139243 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139244 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-07 18:40:06 +00:00
Jim Grosbach
76ecc3d35b Thumb2 parsing and encoding for LDMIA. 
Choose 32-bit vs. 16-bit encoding when there's no .w suffix in post-processing
as match classes are insufficient to handle the context-sensitiveness of
the writeback operand's legality for the 16-bit encodings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139242 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-07 18:05:34 +00:00
Owen Anderson
6de3c6f1a9 Port more assembler tests over to disassembler tests, and fix a minor logic error that exposed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139240 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-07 17:55:19 +00:00
Duncan Sands
758ba1f4ed When inlining exception handling code into another function, ensure that 
duplicate tests are eliminated (for example if the two functions both have
a catch clause catching the same type, ensure the redundant one is removed).
Note that it would probably be safe to say that eh.typeid.for is 'const',
but since two calls to it with the same argument can give different results
(but only if the calls are in different functions), it seems more correct to
mark it only 'pure'; this doesn't get in the way of the optimization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139236 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-07 16:44:14 +00:00
Duncan Sands
68b859f757 Another forgotten trampoline testcase. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139230 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-07 10:05:14 +00:00
Duncan Sands
e8e721f0c2 Forgot to add this trampoline testcase. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139229 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-07 09:21:38 +00:00
Eli Friedman
981a010c09 Relax the MemOperands on atomics a bit. Fixes -verify-machineinstrs failures for atomic laod/store on ARM. 
(The fix for the related failures on x86 is going to be nastier because we actually need Acquire memoperands attached to the atomic load instrs, etc.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139221 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-07 02:23:42 +00:00
Devang Patel
541a81cc2b While sinking machine instructions, sink matching DBG_VALUEs also otherwise live debug variable pass will drop DBG_VALUEs on the floor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139208 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-07 00:07:58 +00:00
Owen Anderson
69acc93b3d Teach BasicAA about the aliasing properties of memset_pattern16. 
Fixes PR10872 and <rdar://problem/10065079>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139204 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-06 23:33:25 +00:00
Jim Grosbach
aa833e53dc Thumb2 parsing and encoding for ISB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139200 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-06 22:53:27 +00:00
Jim Grosbach
8f6d8104fc Thumb2 parsing and encoding for EOR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139199 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-06 22:44:50 +00:00
Jim Grosbach
94d1c489a5 Thumb2 parsing and encoding for DSB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139194 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-06 22:19:40 +00:00
Jim Grosbach
06c1a51241 Thumb2 parsing and encoding for DMB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139193 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-06 22:14:58 +00:00
Nick Lewycky
756a0a1f39 Disable these tests harder. They're XFAIL'd, but that means they still run, and 
these tests all infinitely recurse, bringing my system down into swapping hell.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139192 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-06 22:08:18 +00:00
Jim Grosbach
77951908b7 Thumb2 parsing and encoding for DBG. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139191 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-06 22:06:40 +00:00
Jim Grosbach
ef88a92677 Thumb2 parsing and encoding for CMN and CMP. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139188 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-06 21:44:58 +00:00
Nick Lewycky
c103a08a11 This transform only handles two-operand AddRec's. Prevent it from trying to 
handle anything more complex. Fixes PR10383 again!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139186 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-06 21:42:18 +00:00
Jim Grosbach
0b533a3bd3 Thumb2 parsing and encoding for CLZ. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139177 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-06 20:44:17 +00:00
Jim Grosbach
ad2dad930d Thumb2 parsing and encoding for CLREX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139172 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-06 20:27:04 +00:00
Owen Anderson
39950595f7 Port more encoding tests over to Thumb2 decoding tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139171 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-06 20:26:34 +00:00
Jim Grosbach
79d56a66c3 Thumb2 parsing and encoding for CDP/CDP2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139168 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-06 20:12:23 +00:00
Evan Cheng
4a51708448 Fix fall outs from my recent change on how carry bit is modeled during isel. 
Now the 'S' instructions, e.g. ADDS, treat S bit as optional operand as well.
Also fix isel hook to correctly set the optional operand.
rdar://10073745


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139157 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-06 18:52:20 +00:00
Owen Anderson
81856f7313 Try again at r138809 (make DSE more aggressive in removing dead stores at the end of a function), now with less deleting stores before memcpy's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139150 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-06 18:14:09 +00:00
Jakob Stoklund Olesen
9b0e1e7a5b Atomic pseudos don't use (as in read) CPSR. They clobber it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139148 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-06 17:40:35 +00:00
Duncan Sands
4a544a79bd Split the init.trampoline intrinsic, which currently combines GCC's 
init.trampoline and adjust.trampoline intrinsics, into two intrinsics
like in GCC.  While having one combined intrinsic is tempting, it is
not natural because typically the trampoline initialization needs to
be done in one function, and the result of adjust trampoline is needed
in a different (nested) function.  To get around this llvm-gcc hacks the
nested function lowering code to insert an additional parent variable
holding the adjust.trampoline result that can be accessed from the child
function.  Dragonegg doesn't have the luxury of tweaking GCC code, so it
stored the result of adjust.trampoline in the memory GCC set aside for
the trampoline itself (this is always available in the child function),
and set up some new memory (using an alloca) to hold the trampoline.
Unfortunately this breaks Go which allocates trampoline memory on the
heap and wants to use it even after the parent has exited (!).  Rather
than doing even more hacks to get Go working, it seemed best to just use
two intrinsics like in GCC.  Patch mostly by Sanjoy Das.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139140 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-06 13:37:06 +00:00
Nick Lewycky
fa151a79ed The logic inside getMulExpr to simplify {a,+,b}*{c,+,d} was wrong, which was 
visible given a=b=c=d=1, on iteration #1 (the second iteration). Replace it with
correct math. Fixes PR10383!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139133 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-06 05:05:14 +00:00
Nick Lewycky
b2840fdcd8 Revert r139126 due to selfhost failures reported by buildbots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139130 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-06 02:43:13 +00:00
Nick Lewycky
77b7352db0 Teach SCEV to report a max backedge count in one interesting case in 
HowFarToZero; the case for a canonical loop.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139126 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-05 23:25:16 +00:00
Benjamin Kramer
ae707bd559 InstSimplify: Don't try to replace an extractvalue/insertvalue pair with the original value if types don't match. 
Fixes clang selfhost.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139120 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-05 18:16:19 +00:00
Duncan Sands
ad99ef8bf5 Delete trivial landing pads that just continue unwinding the caught 
exception.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139117 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-05 12:57:57 +00:00
Duncan Sands
dabc280672 Add some simple insertvalue simplifications, for the purpose of cleaning 
up do-nothing exception handling code produced by dragonegg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139113 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-05 06:52:48 +00:00
Dan Gohman
b116142d3b Revert r129875, XFAILing this test for arm, since the fix was reverted. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139058 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-03 00:14:24 +00:00
Jakob Stoklund Olesen
5047d76575 Pseudo CMOV instructions don't clobber EFLAGS. 
The explanation about a 0 argument being materialized as xor is no
longer valid.  Rematerialization will check if EFLAGS is live before
clobbering it.

The code produced by X86TargetLowering::EmitLoweredSelect does not
clobber EFLAGS.

This causes one less testb instruction to be generated in the cmov.ll
test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139057 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 23:52:55 +00:00
Jim Grosbach
83452b2064 Thumb2 parsing and encoding for CBZ/CBNZ. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139054 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 23:46:10 +00:00
Jim Grosbach
6c3e11ea55 Thumb2 parsing and encoding for BXJ. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139053 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 23:43:09 +00:00
Jim Grosbach
cefd2020a6 Thumb2 parsing and encoding for BIC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139052 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 23:37:54 +00:00
Jim Grosbach
0b9a3d37c5 Thumb2 parsing and encoding for BFI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139051 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 23:28:46 +00:00
Jim Grosbach
7413f41d3b Thumb2 parsing and encoding for BFC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139050 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 23:25:46 +00:00
Jim Grosbach
a110988b39 Thumb2 parsing and encoding of B instruction. 
Tweak handling of IT blocks a bit to enable this. The differentiation between
B and Bcc needs special sauce.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139049 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 23:22:08 +00:00
Bill Wendling
47e208bbea Try to eliminate the use of the 'unwind' instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139046 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 22:41:11 +00:00
Eli Friedman
4136d23c48 Don't fast-isel for atomic load/store; some cases require extra handling missing from fast-isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139044 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 22:33:24 +00:00
Jim Grosbach
5f25fb01b4 Thumb2 parsing and encoding for ASR. 
For other shift and rotate instructions, too. Tests for those forthcoming
as I work my way through the ISA.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139040 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 21:28:54 +00:00
Bill Wendling
d5941195e2 Better fix for this testcase. Update it to the new EH scheme entirely. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139039 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 21:27:08 +00:00
Bill Wendling
cc6927b9e1 Update for new EH stuff. (I'm not sure if this is 100% correct.) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139038 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 21:24:17 +00:00
Andrew Trick
6984625d16 Test case update for unroll-scev. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139037 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 21:21:03 +00:00
Kevin Enderby
d5705fe50d Change X86 disassembly to print immediates values as signed by default. Special 
case those instructions that the immediate is not sign-extend.  radr://8795217


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139028 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 20:01:23 +00:00
Jim Grosbach
5c1ac55542 Thumb2 parsing and encoding for AND (register). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139021 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 18:41:35 +00:00
Jim Grosbach
f0851e5d95 Thumb2 parsing and encoding for ADD (register). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139017 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 18:14:46 +00:00
Duncan Sands
147272b8a7 Darwin wants ctors/dtors to be ordered the other way round to linux. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139015 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 18:07:19 +00:00
Kevin Enderby
98f213cd60 Fix the disassembly of the X86 "crc32w %ax, %eax" instruction. Bug 10702. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139014 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 18:03:03 +00:00
Jim Grosbach
ca52a7e38c Tests for Thumb2 AND (immediate) instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139013 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 17:44:27 +00:00
Jakub Staszak
9469d5cf48 Extra CHECK-NOT to make sure that GVN transform works properly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139012 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 17:40:39 +00:00
Andrew Trick
dc07321164 -unroll-scev flag removal 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139010 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 17:36:14 +00:00
Jim Grosbach
aca878c5e6 Add FIXME. Thumb2 ADR encoding choice is non-trivial. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139008 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 17:21:59 +00:00
Jakub Staszak
4c6b8bee2a ConstantVector returns arbitrary value for the wrong index. 
This fixes PR10813.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139006 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 15:43:43 +00:00
Jakub Staszak
8cec759339 Compare type size instead of type _store_ size to make sure that BitCastInst 
will be valid. This fixes PR10820.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139005 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 14:57:37 +00:00
Kalle Raiskila
989621f1f8 Pass signed (not unsigned) 10 bit field to SPU 'ori' instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139004 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 10:05:01 +00:00
Craig Topper
5ffedb9352 Make IC_VEX* not inherit from IC_*. Prevents instructions with no VEX form from disassembling to their non-VEX form. Also prevents weak filter collisons that were keeping valid VEX instructions from decoding properly. Make VEX_L* not inherit from VEX_* because the VEX.L bit always important. This stops packed int VEX encodings from being disassembled when specified with VEX.L=1. Fixes PR10831 and PR10806. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138997 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 04:17:54 +00:00
Bill Wendling
b0b9a67f98 Update to new EH scheme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138989 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-02 01:25:11 +00:00
Dan Gohman
6b13cd4154 Revert r131152, r129796, r129761. This code is currently considered 
to be unreliable on platforms which require memcpy calls, and it is
complicating broader legalize cleanups. It is hoped that these cleanups
will make memcpy byval easier to implement in the future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138977 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-01 23:07:08 +00:00
Benjamin Kramer
36a16015ac Don't drop alignment info on local common symbols. 
- On COFF the .lcomm directive has an alignment argument.
- On ELF we fall back to .local + .comm

Based on a patch by NAKAMURA Takumi.

Fixes PR9337, PR9483 and PR10128.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138976 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-01 23:04:27 +00:00
Eli Friedman
770e16fe17 Fix test; sorry for any inconvenience. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138966 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-01 21:25:42 +00:00
Eli Friedman
86b5db8c01 Fix an issue with the IR sink pass found by inspection. (I'm not sure anyone is actually using this, but might as well fix it since I found the issue.) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138965 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-01 21:21:24 +00:00
Eli Friedman
89e0f4b5b0 Add missing newline. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138964 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-01 21:20:11 +00:00
Benjamin Kramer
bcf47a5bce XFAIL this test on arm until the backend is fixed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138955 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-01 18:40:03 +00:00
Benjamin Kramer
d4f27d7daa This test depends on cmov being available. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138954 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-01 18:40:01 +00:00
Jakob Stoklund Olesen
4a0a18af4a Permit remat of partial register defs when it is safe. 
An instruction may define part of a register where the other bits are
undefined. In that case, it is safe to rematerialize the instruction.
For example:

  %vreg2:ssub_0<def> = VLDRS <cp#0>, 0, pred:14, pred:%noreg, %vreg2<imp-def>

The extra <imp-def> operand indicates that the instruction does not read
the other parts of the virtual register, so a remat is safe.

This patch simply allows multiple def operands for the virtual register.
It is MI->readsVirtualRegister() that determines if we depend on a
previous value so remat is impossible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138953 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-01 18:27:51 +00:00
Jim Grosbach
2f25d9b933 ARM 'rscs' mnemonic is carry-setting 'rsc', not 'rs' with a 'cs' condition code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138952 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-01 18:22:13 +00:00
Bruno Cardoso Lopes
a39ccdb9d4 Fix vbroadcast matching logic to early unmatch if the node doesn't have 
only one use. Fix PR10825.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138951 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-01 18:15:06 +00:00
Owen Anderson
7f17b5a483 t2Bcc is allowed to have a predicate without a preceding IT instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138946 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-01 17:47:45 +00:00
Jakob Stoklund Olesen
9d548d0343 Prevent remat of partial register redefinitions. 
An instruction that redefines only part of a larger register can never
be rematerialized since the virtual register value depends on the old
value in other parts of the register.

This was fixed for the inline spiller in r138794.  This patch fixes the
problem for all register allocators, and includes a small test case.

<rdar://problem/10032939>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138944 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-01 17:18:50 +00:00
Bill Wendling
00c30d58a5 Update to new EH scheme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138933 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-01 01:28:25 +00:00
Bill Wendling
65088e7d96 Update to new EH scheme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138928 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-01 01:08:21 +00:00
Bill Wendling
15db556b56 Update to new EH scheme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138927 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-01 01:02:41 +00:00
Bill Wendling
aeaa9a8b25 Update some tests to the new EH scheme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138925 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-01 00:58:03 +00:00
Andrew Trick
340d78f4e7 PreRA scheduler should avoid cloning compares. 
Added canClobberReachingPhysRegUse() to handle a particular pattern in
which a two-address instruction could be forced to interfere with
EFLAGS, causing a compare to be unnecessarilly cloned.
Fixes rdar://problem/5875261


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138924 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-01 00:54:31 +00:00
Jim Grosbach
20ed2e7939 Thumb2 assembly parsing and encoding for ADD(immediate). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138922 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-01 00:28:52 +00:00
Bill Wendling
b5d92d83b4 Reenable test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138916 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 23:08:05 +00:00
Bill Wendling
3b5e99d79e Revert accidental commit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138915 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 23:07:46 +00:00
Eli Friedman
1b73866505 Disable this test until Bill fixes it properly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138914 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 23:03:30 +00:00
Bill Wendling
08c2862540 Update to new EH scheme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138908 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 21:50:07 +00:00
Bill Wendling
a29a6b9a6c Update to new EH scheme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138906 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 21:44:24 +00:00
Bill Wendling
78ae1f7947 Remove old declare statements. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138905 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 21:41:20 +00:00
Bill Wendling
6b94b67319 Update more tests to the new EH scheme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138904 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 21:40:15 +00:00
Bill Wendling
935903191f Update more tests to the new EH scheme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138903 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 21:39:05 +00:00
Eli Friedman
24adac8b79 Add tests for the transformations SCCP can do on atomic loads and stores (which are safe without any modifications). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138902 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 21:37:06 +00:00
Bill Wendling
fd245d97f1 Revert r138894. This was failing on cmake-clang-i686-msvc10. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138900 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 21:20:25 +00:00
Bill Wendling
ab98f9d155 Update more tests to the new EH scheme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138894 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 21:04:11 +00:00
Bill Wendling
b072dd9ba4 Update the tests to the new EH scheme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138891 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 20:55:40 +00:00
Owen Anderson
721cb1fde0 Fix encoding for tBcc with immediate offset operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138889 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 20:26:14 +00:00
Jim Grosbach
e0e42bf0bb Run the Thumb1 parser tests in Thumb2 mode, as well. 
Thumb2 is a superset of Thumb1, so all of the encodings should still work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138883 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 19:50:28 +00:00
Jim Grosbach
d82175c1f0 Thumb NOP encoding varies depending on ARCH revision. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138876 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 18:35:46 +00:00
Owen Anderson
559c277aa9 Fix roundtripping of Thumb BL/BLX instructions with immediate offsets instead of labels. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138874 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 18:30:20 +00:00
Eli Friedman
ba567d670d Generic expansion for atomic load/store into cmpxchg/atomicrmw xchg; implements 64-bit atomic load/store for ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138872 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 18:26:09 +00:00
Jim Grosbach
72335d55d9 Thumb2 parsing and encoding for ADC(register). 
Also add instruction aliases for non-.w versions of SBC since they're the
same.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138871 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 18:23:08 +00:00
Eli Friedman
4d3f329453 64-bit atomic cmpxchg for ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138868 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 17:52:22 +00:00
David Greene
d92e2e4f88 Compress Repeated Byte Output 
Emit a repeated sequence of bytes using .zero.  This saves an enormous
amount of asm file space for certain programs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138864 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 17:30:56 +00:00
Jim Grosbach
0f3abd8d68 Tweak Thumb1 ADD encoding selection a bit. 
When the destination register of an add immediate instruction is
explicitly specified, encoding T1 is preferred, else encoding T2 is
preferred.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138862 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 17:07:33 +00:00
Benjamin Kramer
31d27ce568 This test requires sse, otherwise x87 ops will block tailcall optimization 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138859 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 16:49:05 +00:00
Bruno Cardoso Lopes
57d6a5e491 - Move all MOVSS and MOVSD patterns close to their definitions 
- Duplicate some store patterns to their AVX forms!
- Catched a bug while restricting the patterns subtarget, fix it
  and update a testcase to check it properly

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138851 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 03:04:20 +00:00
Evan Cheng
0899f5c62d Fix (movhps load) lowering / pattern to match more cases. rdar://10050549 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138848 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 02:05:24 +00:00
Eli Friedman
3d93861c23 Some minor cleanups for r138845. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138846 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 00:41:05 +00:00
Eli Friedman
2bdffe4882 Some 64-bit atomic operations on ARM. 64-bit cmpxchg coming next. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138845 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 00:31:29 +00:00
Benjamin Kramer
8f00ffce50 Fix test typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138843 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 00:02:59 +00:00
Rafael Espindola
f940a1a869 Remove the old tail duplication pass. It is not used and is unable to update 
ssa, so it has to be run really early in the pipeline. Any replacement
should probably use the SSAUpdater.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138841 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 23:03:45 +00:00
Owen Anderson
eaca928a37 Fix issues with disassembly of IT instructions involving condition codes other the EQ/NE. Discovered by roundtrip testing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138840 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 22:58:27 +00:00
Owen Anderson
21df36c57a Fix encoding of CBZ/CBNZ Thumb2 instructions with immediate offsets rather than labels. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138837 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 22:15:17 +00:00
Owen Anderson
a7710edd98 Fix encoding of PC-relative Thumb1 LDR's when using immediate offsets instead of labels. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138835 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 22:10:03 +00:00
Owen Anderson
391ac65377 Fix encoding of Thumb1 B instructions with immediate offsets, which is necessary for round-tripping. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138834 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 22:03:20 +00:00
Rafael Espindola
6cac2025da Add a triple. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138831 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 21:19:37 +00:00
Owen Anderson
1333abc785 Remove empty file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138830 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 21:17:20 +00:00
Owen Anderson
54c4735db3 Speculatively revert r138809 in an attempt to fix DragonEgg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138829 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 21:11:06 +00:00
Owen Anderson
3318d9c27d Port Thumb2 assembler tests over to disassembler tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138822 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 20:03:11 +00:00
Rafael Espindola
b0bf8935ee Some test code to check if correct code is being generated. 
Patch by Sanjoy Das.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138820 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 19:51:29 +00:00
Owen Anderson
6e4be237b0 When walking backwards to eliminate final stores to allocas at the end of a function, encountering an unrelated store should not cause us to give up like encountering a load does. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138809 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 18:51:55 +00:00
Andrew Trick
7c12837916 Lit option for ignoring stderr output. 
This is useful for testing a build a temporarily hand instrumented
build.
Patch by arrowdodger!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138804 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 17:42:33 +00:00
Roman Divacky
0aaa9195b5 Set CR1EQ only when lowering vararg floating arguments (not any vararg 
arguments as before), unset CR1EQ otherwise.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138802 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 17:04:16 +00:00
Craig Topper
3daa5c29d4 Add vvvv support to disassembling of instructions with MRMDestMem and MRMDestReg form. Needed to support mem dest form of vmaskmovps/d. Fixes PR10807. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138795 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 07:09:35 +00:00
Evan Cheng
342e3161d9 Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical 
register dependency (rather than glue them together). This is general
goodness as it gives scheduler more freedom. However it is motivated by
a nasty bug in isel.

When a i64 sub is expanded to subc + sube.
  libcall #1
     \
      \        subc 
       \       /  \
        \     /    \
         \   /    libcall #2
          sube

If the libcalls are not serialized (i.e. both have chains which are dag
entry), legalizer can serialize them in arbitrary orders. If it's
unlucky, it can force libcall #2 before libcall #1 in the above case.

  subc
   |
  libcall #2
   |
  libcall #1
   |
  sube

However since subc and sube are "glued" together, this ends up being a
cycle when the scheduler combine subc and sube as a single scheduling
unit.

The right solution is to fix LegalizeType too chains the libcalls together.
However, LegalizeType is not processing nodes in order so that's harder than
it should be. For now, the move to physical register dependency will do.

rdar://10019576


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138791 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 01:34:54 +00:00
Owen Anderson
694e0ffb8a Add missing encoding information for some of the GPR<->FP register moves. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138780 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 23:15:25 +00:00
Jim Grosbach
abd3f60859 Remove redundant tests from XFAIL'ed test file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138779 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 23:04:04 +00:00
Jim Grosbach
a01e12499f Thumb2 assembly parsing and encoding support for ADC(immediate). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138778 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 23:01:38 +00:00
Jim Grosbach
056cb4c0f6 Remove test file. Superceded by other more exhaustive tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138777 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 23:00:19 +00:00
Jim Grosbach
f8e1e3e729 Thumb2 parsing and encoding for IT blocks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138773 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 22:24:09 +00:00
Kevin Enderby
fff64ca9cf Fix the disassembly of the X86 crc32 instruction. Bug 10702 and rdar://8795217 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138771 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 22:06:28 +00:00
Eli Friedman
f3704769bb Explicitly zero out parts of a vector which are required to be zero by the algorithm in LowerUINT_TO_FP_i32. This only has a substantial effect on the generated code when the input is extracted from a vector register; other ways of loading an i32 do the appropriate zeroing implicitly. Fixes PR10802. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138768 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 21:15:46 +00:00