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42539 Commits

Author SHA1 Message Date
Dan Gohman
f3a925dc7a Consistently use AliasAnalysis::UnknownSize instead of hardcoding ~0u. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116815 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-19 17:06:23 +00:00
Mikhail Glushenkov
99fca5de96 GlobalOpt: EvaluateFunction() must not evaluate stores to weak_odr globals. 
Fixes PR8389.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116812 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-19 16:47:23 +00:00
Che-Liang Chiou
b48f2c2e1d Add lower argument and return of device function 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116805 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-19 13:14:40 +00:00
Bill Wendling
cf2561d111 Fix spelling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116804 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-19 10:18:23 +00:00
Michael J. Spencer
94f7eeb84d X86: Add MS-CRT libcalls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116801 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-19 07:32:52 +00:00
Michael J. Spencer
87b8665878 Fix Whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116800 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-19 07:32:42 +00:00
NAKAMURA Takumi
3b3b0ebd2e lib/CodeGen/TargetLoweringObjectFileImpl.cpp: Tweak to emit ".{section}${name}" instead of ".{section}$linkonce_{name}" for linkonce sections. 
It seems GNU ld/PECOFF relies on section names, linking with g++'s libstdc++.a would fail.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116791 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-19 03:24:42 +00:00
Andrew Trick
dc986d2462 Fix for machine licm assert: RCCost <= RegPressure[RCId] 
in MultiSource/Benchmarks/VersaBench/beamformer/beamformer.
SmallSet.insert returns true if the element is inserted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116790 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-19 02:50:50 +00:00
Rafael Espindola
19785995f6 Fix PR8300 by remembering to keep the bitcast in all cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116788 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-19 02:02:57 +00:00
NAKAMURA Takumi
5c0db76cf2 lib/System/Win32/ThreadLocal.inc: Suppress "unused" warning on -Asserts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116785 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-19 01:22:01 +00:00
NAKAMURA Takumi
1b5de0e7ee lib/Support/raw_ostream.cpp: Fix Cygwin's build. 
setmode is provided by io.h on Cygwin.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116784 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-19 01:21:55 +00:00
Evan Cheng
11e8b74a7a - Add a hook for target to determine whether an instruction def is 
"long latency" enough to hoist even if it may increase spilling. Reloading
  a value from spill slot is often cheaper than performing an expensive
  computation in the loop. For X86, that means machine LICM will hoist
  SQRT, DIV, etc. ARM will be somewhat aggressive with VFP and NEON
  instructions.
- Enable register pressure aware machine LICM by default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116781 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-19 00:55:07 +00:00
Chandler Carruth
b5a2d3f8e3 Move the definition of this to the source file to anchor the vtable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116779 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-19 00:37:30 +00:00
Bob Wilson
3454ed9545 Support alignment for NEON vld-lane and vst-lane instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116776 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-19 00:16:32 +00:00
Kevin Enderby
87f4a1a433 Added a few tweaks to the Intel Descriptor-table support instructions to allow 
word forms and suffixed versions to match the darwin assembler in 32-bit and
64-bit modes.  This is again for use just with assembly source for llvm-mc .


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116773 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-19 00:01:44 +00:00
Jim Grosbach
70987fbc60 ARM encoding information for [SU]SAT* instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116768 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 23:35:38 +00:00
Dan Gohman
eee5400442 Make the representation of AliasSets explicitly differentiate 
between "not known yet" and "known no tbaa info" so that it
can merge them properly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116767 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 23:31:47 +00:00
Eric Christopher
6e5367d6a3 Revert r116220 - thus turning arm fast isel back on by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116762 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 22:53:53 +00:00
Daniel Dunbar
d49e2aa5b8 CrashRecoveryContext: Add missing return, so that the signal fires after we our 
routine is off the stack. Otherwise we show up rather confusingly in the stack
trace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116755 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 21:55:18 +00:00
Dan Gohman
fb8096dee5 Don't pass the raw invalid pointer used to represent conflicting 
TBAA information to AliasAnalysis.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116751 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 21:28:00 +00:00
Bill Wendling
b41ee96d76 Don't recompute MachineRegisterInfo in the Optimize* method. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116750 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 21:22:31 +00:00
Mikhail Glushenkov
9d28fdd722 Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116749 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 21:16:00 +00:00
Rafael Espindola
eada304793 Implement R_386_GOT32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116744 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 20:47:21 +00:00
Dan Gohman
a8702eaf78 Make AliasSetTracker TBAA-aware, enabling TBAA-enabled LICM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116743 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 20:44:50 +00:00
Rafael Espindola
ce2d3c5775 Relocate with .bss instead of using the symbol. Matches gas behavior. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116741 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 20:25:33 +00:00
Rafael Espindola
24dc9ecdc5 Reenable assert. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116738 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 19:33:01 +00:00
Devang Patel
3bcb3a6b8d Transfer debug loc to lowered call. 
Patch by Alexander Herz!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116733 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 18:53:44 +00:00
Dan Gohman
4021fccf9f Add TypeBasedAliasAnalysis to the standard pass lists. Note that it 
is currently inert by default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116732 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 18:50:27 +00:00
Dan Gohman
6cc7c9b8fc Fix BasicAA to pass TBAAInfo through to the chained analysis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116730 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 18:45:11 +00:00
Jim Grosbach
5c57639c28 For Thumb2, try to use frame pointer references for stack slots even when a 
base register is available. rdar://8525298

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116729 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 18:39:46 +00:00
Rafael Espindola
aa85c21633 Produce ELF::R_386_GOTPC relocations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116728 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 18:36:12 +00:00
Dan Gohman
01b58f637c Make TypeBasedAliasAnalysis default to doing nothing, with a command-line 
option to enable it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116722 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 18:17:47 +00:00
Dan Gohman
acf50f5136 Use chaining in TypeBasedAliasAnalysis::pointsToConstantMemory. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116721 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 18:10:31 +00:00
Dan Gohman
c1be92f3bb Make BasicAliasAnalysis a normal AliasAnalysis implementation which 
does normal initialization and normal chaining. Change the default
AliasAnalysis implementation to NoAlias.

Update StandardCompileOpts.h and friends to explicitly request
BasicAliasAnalysis.

Update tests to explicitly request -basicaa.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116720 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 18:04:47 +00:00
Rafael Espindola
9baee3b3a3 Make the bots happy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116719 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 18:03:28 +00:00
Kevin Enderby
7aef62ff8c Added a handful of x86-32 instructions that were missing so that llvm-mc would 
be more complete.  These are only expected to be used by llvm-mc with assembly
source so there is no pattern, [], in the .td files.  Most are being added to
X86InstrInfo.td as Chris suggested and only comments about register uses are
added.  Suggestions welcome on the .td changes as I'm not sure on every detail
of the x86 records.  More missing instructions will be coming.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116716 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 17:04:36 +00:00
Rafael Espindola
9edab3a9e1 Produce a R_386_PLT32 when needed. Moved the default cases of switches to the 
start for consistency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116715 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 16:58:03 +00:00
Jim Grosbach
0f0127f4a6 ARM addrmode4 instructions (ldm, stm and friends) can't encode an immediate 
offset for stack references. Make sure we take that into account when
deciding whether to reserver an emergency spill slot for the register
scavenger. rdar://8559625

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116714 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 16:48:59 +00:00
Jim Grosbach
e038a206df Grammar tweak. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116712 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 16:38:50 +00:00
Rafael Espindola
c97f80efc8 Handle GOTOFF correctly on i386. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116711 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 16:38:04 +00:00
Jim Grosbach
c0c7c2b606 Trivial grammar tweak. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116710 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 16:29:26 +00:00
Kalle Raiskila
940e7965f1 Improve lowering of sext to i128 on SPU. 
The old algorithm inserted a 'rotqmbyi' instruction which was
both redundant and wrong - it made shufb select bytes from the
wrong end of the input quad.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116701 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 09:34:19 +00:00
Eric Christopher
4cf34c6c04 Remove the check for invalid calling conventions. Testing shows that they're 
working just fine.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116698 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 06:49:12 +00:00
Eric Christopher
fa87d66752 Lift arg promotion from the X86 backend. This should be unified at some point. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116694 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 02:17:53 +00:00
Eric Christopher
404be0c04f Now that we handle all allocas via a non-SP reg offset remove all of the 
special case handling for ARM::SP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116688 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-17 11:08:44 +00:00
Benjamin Kramer
4c8a985ed5 std::string cleanup. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116686 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-17 07:39:34 +00:00
Benjamin Kramer
24f1206c7d Fix a typo and silence unused variable warnings in -Asserts build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116685 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-17 07:38:40 +00:00
Eric Christopher
ec8bf972f5 Allow more load types to be materialized through the allocas. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116683 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-17 06:07:26 +00:00
Oscar Fuentes
f0c55a9b97 Build with RTTI and exceptions disabled. Only in GCC for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116682 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-17 02:26:16 +00:00
Eric Christopher
d56d61af01 Optimize GEP off of intermediate allocas. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116681 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-17 01:51:42 +00:00
Eric Christopher
7208dbf2d5 Fix comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116680 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-17 01:42:53 +00:00
Eric Christopher
dc0b0ef6cd Turn on AddOperator folding in GEP. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116679 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-17 01:41:46 +00:00
Eric Christopher
45c607134b Use the i12 immediate versions of the load instructions - they're handled 
more in the post-passes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116678 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-17 01:40:27 +00:00
Rafael Espindola
f230df9af4 Add a MCObjectFormat class so that code common to all targets that use a 
single object format can be shared.

This also adds support for

mov zed+(bar-foo), %eax

on ELF and COFF targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116675 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-16 18:23:53 +00:00
Benjamin Kramer
af81235ef9 Eliminate some calls to Value::getNameStr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116670 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-16 11:28:23 +00:00
Michael J. Spencer
4cee2890a6 MC-COFF: Add support for default-null weak externals. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116666 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-16 08:25:57 +00:00
Michael J. Spencer
84ac4d5a2a X86-Windows: Emit an undefined global __fltused symbol when targeting Windows 
if any floating point arguments are passed to an external function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116665 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-16 08:25:41 +00:00
Michael J. Spencer
e70c526d59 Whitespace! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116664 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-16 08:25:21 +00:00
Daniel Dunbar
138abae2a2 MC/AsmParser: Report .stabs directive as unsupported. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116659 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-16 04:56:42 +00:00
Evan Cheng
03a9fdf2e7 More machine LICM work. It now tracks register pressure for path from preheader to current BB and use the information determine whether hoisting is worthwhile. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116654 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-16 02:20:26 +00:00
Eric Christopher
47650ece37 Fix some funky formatting that got through. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116653 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-16 01:10:35 +00:00
Bill Wendling
07fda9f9b6 ARMCodeEmitter::emitMiscInstruction is dead. Long live 
ARMCodeEmitter::emitMiscInstruction!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116644 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 23:35:12 +00:00
Eric Christopher
c9a91fdaf9 Make sure offset is 0 for load/store register to the stack call. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116640 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 23:07:10 +00:00
Owen Anderson
6549121c66 Generalize MemCpyOpt's handling of call slot forwarding to function properly when the call slot 
forwarding is implemented with a load/store pair rather than a memcpy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116637 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 22:52:12 +00:00
Eric Christopher
00ed59a968 Formatting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116635 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 22:49:28 +00:00
Eric Christopher
315030ca74 Fix else if -> if in store machinery. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116628 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 22:32:37 +00:00
Bill Wendling
2695d8edd1 Reformatting. No functionalogicality changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116625 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 21:50:45 +00:00
Eric Christopher
a322425642 Refactor ARM fast-isel reg + offset to be a base + offset. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116622 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 21:32:12 +00:00
Jim Grosbach
5ad01c7728 Encoding information for the various ARM saturating add/sub instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116612 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 19:49:46 +00:00
Jim Grosbach
84760885e1 ARM binary encoding information for RSB and RSC instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116604 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 18:42:41 +00:00
Jim Grosbach
fd52906478 Don't mark argument value stores as immutable, as otherwise the post-RA 
scheduler may reorder loads from them before the stores and other such
badness. PR8347. Patch by David Meyer

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116602 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 18:34:47 +00:00
Bob Wilson
01b35c25de Use simple RegState::Define flag instead of getDefRegState(true). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116601 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 18:25:59 +00:00
Rafael Espindola
de89b010b0 Refactor alias handling to AliasedSymbol. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116600 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 18:25:33 +00:00
Eric Christopher
2896df897c Expand GEP handling for constant offsets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116594 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 18:02:07 +00:00
Jim Grosbach
6bdc8ae291 When expanding the MOVsr[la]_flag pseudos, the CPSR implicit def becomes 
an explicit def. Make sure to capture that properly. rdar://8556556

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116591 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 17:35:17 +00:00
Jim Grosbach
8abe32af38 ARM mode encoding information for UBFX and SBFX instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116588 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 17:15:16 +00:00
Jakob Stoklund Olesen
50cef5829d Remove unused accessor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116580 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 16:06:40 +00:00
Rafael Espindola
5df0b65e8f Refactor code a bit and avoid creating unnecessary entries in the string 
map.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116579 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 15:39:06 +00:00
Bob Wilson
1dd5a2f4e1 Remove unused ARMISD::AND selection DAG node. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116566 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 04:34:40 +00:00
Bob Wilson
cfbece50f6 ARM instructions that are both predicated and set the condition codes 
have been printed with the "S" modifier after the predicate.  With ARM's
unified syntax, they are supposed to go in the other order.  We fixed this
for Thumb when we switched to unified syntax but missed changing it for
ARM.  Apparently we don't generate these instructions often because no one
noticed until now.  Thanks to Bill Wendling for the testcase!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116563 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 03:23:44 +00:00
Jim Grosbach
197a8df640 Encoding info for extension instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116560 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 02:29:58 +00:00
Jakob Stoklund Olesen
9d5d48bc41 Eliminate curli from SplitEditor. Use the LiveRangeEdit reference instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116547 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 00:34:01 +00:00
Jakob Stoklund Olesen
2a0180fbff Move stack slot assignments into LiveRangeEdit. 
All registers created during splitting or spilling are assigned to the same
stack slot as the parent register.

When splitting or rematting, we may not spill at all. In that case the stack
slot is still assigned, but it will be dead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116546 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 00:16:55 +00:00
Jakob Stoklund Olesen
a17768f582 Create a new LiveRangeEdit class to keep track of the new registers created when 
splitting or spillling, and to help with rematerialization.

Use LiveRangeEdit in InlineSpiller and SplitKit. This will eventually make it
possible to share remat code between InlineSpiller and SplitKit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116543 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 23:49:52 +00:00
Jim Grosbach
58456c0b04 Add missing Rd encoding for MOVs instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116537 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 23:28:31 +00:00
Jim Grosbach
7032f922b1 Refactor the MOVsr[al]_flag and RRX pseudo-instructions to really be pseudos 
and let the ARMExpandPseudoInsts pass fix them up into the real (MOVs)
instruction form.

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 2010-10-14 22:57:13 +00:00
Dan Gohman
c05d8aa6db Tolerate a null parent pointer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116533 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 22:55:57 +00:00
Jim Grosbach
792e9796b3 Tweak the ARM backend to use the RRX mnemonic instead of the 'mov a, b, rrx' 
pseudonym.

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 2010-10-14 20:43:44 +00:00
Francois Pichet
a872a0f5f8 Always use binary mode for output stream. This is important to prevent unwanted end of line conversion on Windows. Should not affect Unix where O_BINARY is not defined. This fix /clang/test/lexer/preamble.c XFAIL on WIN32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116509 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 20:30:58 +00:00
Jim Grosbach
1de588df69 MOVi16 and MOVT ARM mode encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116498 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 18:54:27 +00:00
Jakob Stoklund Olesen
ab00e9f498 Only split around a loop if the live range has uses outside the loop periphery. 
Before we would also split around a loop if any peripheral block had multiple
uses. This could cause repeated splitting when splitting a different live range
would insert uses into the periphery.

Now -spiller=inline passes the nightly test suite again.

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 2010-10-14 18:26:45 +00:00
Jim Grosbach
2d294f564b Simplify encoding information and add 'dst' operand info for TAILJMP. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116488 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 17:24:28 +00:00
Rafael Espindola
a0949b50dc Remove some code duplication. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116484 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 16:34:44 +00:00
Oscar Fuentes
7bd698153d Remove explicit dependency of LLVMARMCodeGen on LLVMARMAsmPrinter. It 
creates a cyclic dependency that breaks the build when
BUILD_SHARED_LIBS=ON

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116480 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 15:54:46 +00:00
Oscar Fuentes
00a9618458 When building shared libraries, link to required system libraries. 
PR 8375

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116479 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 15:54:41 +00:00
Eric Christopher
eae8439771 Handle more complex GEP based loads and add a few TODOs to deal with 
GEP + alloca.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116474 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 09:29:41 +00:00
Bill Wendling
bbbdcd453d Add support for vmov.f64/.f32 encoding. There's a bit of a hack going on 
here. The f32 in FCONSTS is handled as a double instead of a float in the
code. So the encoding of the immediate into the instruction isn't exactly in
line with the documentation in that regard. But given that we know it's handled
as a double, it doesn't cause any harm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116471 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 02:33:26 +00:00
Bill Wendling
946a2740a5 Add encoding for 'fmstat'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116466 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 01:19:34 +00:00
Evan Cheng
0e673919f0 Register pressure and instruction latency aware machine LICM. Work in progress. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116465 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 01:16:09 +00:00
Bill Wendling
88cf038436 - Add encodings for multiply add/subtract instructions in all their glory. 
- Add missing patterns for some multiply add/subtract instructions.
- Add encodings for VMRS and VMSR.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116464 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 01:02:08 +00:00
Chris Lattner
a5bbde8efd fix a bug I introduced, no idea how this didn't repro right. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116462 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 00:30:00 +00:00
Jim Grosbach
bd38acfa6f Regenerate. No functional change, just cleanup. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116459 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 00:15:18 +00:00
Chris Lattner
eafc5cb80d add uadd_ov/usub_ov to apint, consolidate constant folding 
logic to use the new APInt methods.  Among other things this
implements rdar://8501501 - llvm.smul.with.overflow.i32 should constant fold

which comes from "clang -ftrapv", originally brought to my attention from PR8221.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116457 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 00:05:07 +00:00
Chris Lattner
0a0a585e6b constify these methods. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116455 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 23:54:10 +00:00
Jim Grosbach
55561d1882 Detabify and clean up 80 column violations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116454 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 23:47:11 +00:00
Chris Lattner
f2ddc64c87 add a few operations for signed operations that also 
return an overflow flag.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116452 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 23:46:33 +00:00
Jim Grosbach
95369599c6 A few 80 column fixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116451 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 23:34:31 +00:00
Jim Grosbach
3a37866e53 trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116450 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 23:12:26 +00:00
Jim Grosbach
b4b07b93ea Add a FIXME. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116449 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 22:55:33 +00:00
Jim Grosbach
06ef444e5c Add operand encoding bits for SMC and SVC in ARM mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116447 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 22:38:23 +00:00
Jim Grosbach
832859d062 More encoding cleanup. Also add register Rd operands for indirect branches. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116444 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 22:09:34 +00:00
Owen Anderson
ae0a7bc683 CallGraphSCC passes implicity require CallGraph analysis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116443 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 22:00:45 +00:00
Owen Anderson
325e264355 Analysis groups need to initialize their default implementations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116441 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 21:49:58 +00:00
Jim Grosbach
a7dbc1ead7 Simplify some ARM encoding information. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116440 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 21:48:54 +00:00
Eric Christopher
a9c575110f Update comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116438 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 21:41:51 +00:00
Jim Grosbach
6c354fd3f5 Add a FIXME. The ADR instruction is a bit odd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116437 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 21:32:30 +00:00
Jim Grosbach
b3af5de2d9 Refactor the ARM 'setend' instruction pattern. Use a single instruction pattern 
and handle the operand explicitly. Flesh out encoding information. Add an
explicit disassembler testcase for the instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116432 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 21:00:04 +00:00
Bill Wendling
67a704de03 Add MC encodings for VCVT* instrunctions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116431 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 20:58:46 +00:00
Jim Grosbach
596307e133 Add a FIXME. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116428 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 20:38:04 +00:00
Jim Grosbach
fa7d2cb680 Make a few more bits of some simple instructions explicit. nop, yield, wfe, 
wfi, sel, sev and bkpt. All would disassemble properly before, but more
explicitness is good, especially with the integrated assembler coming in
the future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116427 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 20:30:55 +00:00
Jim Grosbach
b35ad41fef Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116421 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 19:56:10 +00:00
Jim Grosbach
e822f94509 Fix encoding for compares. No Rd register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116414 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 18:05:25 +00:00
Jim Grosbach
24989ecc70 Add ARM mode operand encoding information for ADDE/SUBE instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116412 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 18:00:52 +00:00
Rafael Espindola
6d8628061b Fix another case where we were preferring instructions with large 
immediates instead of 8 bits ones.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116410 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 17:14:25 +00:00
Rafael Espindola
dba81cf40e Fix PR8365 by adding a more specialized Pat that checks if an 'and' with 
8 bit constants can be used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116403 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 13:31:20 +00:00
Tobias Grosser
b227930cd6 Add Region::isTopLevelRegion(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116402 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 11:02:44 +00:00
Eric Christopher
ede42b0a22 Start handling more global variables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116401 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 09:11:46 +00:00
Tobias Grosser
c502101000 RegionInfo: Fix trivial error that slipped in last minute. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116400 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 08:00:53 +00:00
Tobias Grosser
592316c419 RegionInfo: Update RegionInfo after a BB was split. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116398 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 05:54:13 +00:00
Tobias Grosser
c69bd733c0 RegioInfo: Add getExpandedRegion(). 
getExpandedRegion() enables us to create non canonical regions. Those regions
can be used to define the largerst region, that fullfills a certain property.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116397 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 05:54:11 +00:00
Tobias Grosser
4bcc0228dc RegionInfo: Allow to update exit and entry of a region. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116396 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 05:54:10 +00:00
Tobias Grosser
9649390e1f RegionInfo: Enhance addSubregion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116395 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 05:54:09 +00:00
Tobias Grosser
9ee5c50776 RegionInfo: Allow to set the parent region of a basic block. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116394 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 05:54:07 +00:00
Rafael Espindola
6688c4a742 Fix PR8313 by changing ValueToValueMap use a TrackingVH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116390 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 02:08:17 +00:00
Evan Cheng
14ce175216 Limit load / store issues (at least until we have a true multi-issue aware scheduler). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116389 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 01:54:21 +00:00
Rafael Espindola
1ed219a9d2 Be more consistent in using ValueToValueMapTy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116387 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 01:36:30 +00:00
Bill Wendling
6932643a37 Add encodings for VNEG and VSQRT. Also add encodings for VMOV, but not a test 
just yet.


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 2010-10-13 01:17:33 +00:00
Bill Wendling
54908dd72b Add encodings for VCVT instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116385 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 00:56:35 +00:00
Jim Grosbach
89c898f8af Add ARM encoding information for comparisons, forced-cc-out arithmetics, and 
arithmetic-with-carry-in instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116384 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 00:50:27 +00:00
Bill Wendling
1fc6d8837f Add VCMPZ and VABS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116383 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 00:38:07 +00:00
Tobias Grosser
67be08a2f1 RegionInfo: Free the RegionNodes in cache. 
Contributed by: ether

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 2010-10-13 00:07:59 +00:00
Bill Wendling
cd77686254 Refactor VCMP instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116379 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 00:04:29 +00:00
Jim Grosbach
ef324d7044 Add the rest of the ARM so_reg encoding options (register shifted register) 
and move to a custom operand encoder. Remove the last of the special handling
stuff from ARMMCCodeEmitter::EncodeInstruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116377 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-12 23:53:58 +00:00
Bill Wendling
5a1fd8cf68 Add encodings for VNMUL[SD]. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116375 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-12 23:47:37 +00:00
Bill Wendling
caa3d467ab Add encodings for VDIV and VMUL. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116370 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-12 23:22:27 +00:00
Evan Cheng
3f490f3469 Turn some fp stackifier assertion into errors to avoid silently generating bad code when assertions are off. rdar://8540457. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116368 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-12 23:19:28 +00:00
Jim Grosbach
2a6a93d542 Move the ARM so_imm encoding into a custom operand encoder and remove the 
explicit handling of the instructions referencing it from the MC code
emitter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116367 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-12 23:18:08 +00:00
Bill Wendling
52061f83e7 Refactor some of the encoding logic into a base class. This keeps us from having 
to add 10+ lines to every instruction.

It may turn out that we can move this base class into it's parent class.


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 2010-10-12 23:06:54 +00:00
Jim Grosbach
08bd54987f Add custom encoder for the 's' bit denoting whether an ARM arithmetic 
instruction should set the processor status flags or not. Remove the now
unnecessary special handling for the bit from the MCCodeEmitter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116360 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-12 23:00:24 +00:00
Bill Wendling
dd3bc112e6 Add encoding for VSUB and VCMP. 
Fear not! I'm going to try a refactoring right now. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116359 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-12 22:55:35 +00:00