Chris Lattner
a046e0d79f
Add ELF and darwin support for static ctors and dtors
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24693 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 04:53:51 +00:00
Evan Cheng
c937ffafba
Beautify a few patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24690 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 02:40:18 +00:00
Evan Cheng
763b029b28
Some shl patterns which do load + store folding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24689 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 02:34:51 +00:00
Evan Cheng
605c415046
A few helper fragments for loads. e.g. (i8 (load addr:$src)) -> (loadi8 addr:$src). Only to improve readibility.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24688 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 01:57:51 +00:00
Evan Cheng
0ef3a77bdf
Add and, or, and xor patterns which fold load + stores.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24687 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 01:41:36 +00:00
Evan Cheng
6cad276c90
Add inc + dec patterns which fold load + stores.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24686 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 01:02:47 +00:00
Evan Cheng
5ce4edb967
Add neg and not patterns which fold load + stores.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24685 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 00:54:44 +00:00
Evan Cheng
5a38e0210d
Missed a couple redundant explicit type casts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24684 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 00:25:07 +00:00
Evan Cheng
9b6b642647
Fix some bad choice of names: i16SExt8 ->i16immSExt8, etc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24683 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 00:14:11 +00:00
Evan Cheng
b3558540b6
* Split immSExt8 to i16SExt8 and i32SExt8 for i16 and i32 immediate operands.
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This enables the removal of some explicit type casts.
* Rename immZExt8 to i16ZExt8 as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24682 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 00:01:09 +00:00
Evan Cheng
f281e02cbd
Add some integer mul patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24681 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 23:47:46 +00:00
Evan Cheng
d160d48a2b
Add some sub patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24675 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 21:54:05 +00:00
Evan Cheng
e5280536a3
When SelectLEAAddr() fails, it shouldn't cause the side effect of having the
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base or index operands being selected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24674 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 21:49:40 +00:00
Evan Cheng
cbd6ed4d6b
For ISD::RET, if # of operands >= 2, try selection the real data dep. operand
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first before the chain.
e.g.
int X;
int foo(int x)
{
x += X + 37;
return x;
}
If chain operand is selected first, we would generate:
movl X, %eax
movl 4(%esp), %ecx
leal 37(%ecx,%eax), %eax
rather than
movl $37, %eax
addl 4(%esp), %eax
addl X, %eax
which does not require %ecx. (Due to ADD32rm not matching.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24673 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 20:32:18 +00:00
Chris Lattner
a763969837
remove some never-completed and now-obsolete code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24671 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 20:12:20 +00:00
Evan Cheng
ee93f9db87
Add a few more add / store patterns. e.g. ADD32mi8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24670 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 19:45:23 +00:00
Evan Cheng
b51a059b2c
* Added X86 store patterns.
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* Added X86 dec patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24654 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10 00:48:20 +00:00
Evan Cheng
ab24ed2a32
Added patterns for ADD8rm, etc. These fold load operands. e.g. addb 4(%esp), %al
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24648 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 22:48:48 +00:00
Evan Cheng
670fd8f8dd
Added explicit type field to ComplexPattern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24637 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 02:15:07 +00:00
Evan Cheng
ec693f77c0
* Added intelligence to X86 LEA addressing mode matching routine so it returns
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false if the match is not profitable. e.g. leal 1(%eax), %eax.
* Added patterns for X86 integer loads and LEA32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24635 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 02:01:35 +00:00
Chris Lattner
e80242a948
X86 doesn't support sextinreg for 8-bit things either.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24631 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-07 17:59:14 +00:00
Evan Cheng
8d202230b4
Remove unnecessary let hasCtrlDep=1 now it can be inferred.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24611 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 23:09:43 +00:00
Chris Lattner
3d36a9f6f4
Several things:
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1. Remove redundant type casts now that PR673 is implemented.
2. Implement the OUT*ir instructions correctly. The port number really
*is* a 16-bit value, but the patterns should only match if the number
is 0-255. Update the patterns so they now match.
3. Fix patterns for shifts to reflect that the shift amount is always an
i8, not an i16 as they were believed to be before. This previous fib
stopped working when we started knowing that CL has type i8.
4. Change use of i16i8imm in SH*ri patterns to all be imm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24599 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:40:25 +00:00
Evan Cheng
d35b8c1adb
Added isel patterns for RET, JMP, and WRITEPORT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24588 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 08:19:43 +00:00
Chris Lattner
df65de42cf
Fix PR672 another way which should be more robust
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24585 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 06:03:50 +00:00
Chris Lattner
a027ba885a
Fix test/Regression/ExecutionEngine/2005-12-02-TailCallBug.ll and PR672.
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This also fixes 177.mesa, the only program that fails with --enable-x86-fastcc
turned on. Given a clean nightly tester run, we should be able to turn it
on by default!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24578 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-03 07:15:55 +00:00
Chris Lattner
865874c88a
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24572 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-02 00:11:20 +00:00
Nate Begeman
6510b22cec
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
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work. This change has no effect on generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24563 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 04:51:06 +00:00
Evan Cheng
640f299b44
Proper support for shifts with register shift value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24559 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 00:43:55 +00:00
Chris Lattner
350d22e14d
SelectNodeTo now returns its result, we must pay attention to it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24550 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 22:59:19 +00:00
Nate Begeman
85a168a734
Fix a typo in my latest change
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24542 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 18:57:39 +00:00
Nate Begeman
391c5d231a
No longer track value types for asm printer operands, and remove them as
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an argument to every operand printing function. Requires some slight
tweaks to x86, the only user.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24541 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 18:54:35 +00:00
Chris Lattner
5b9bbc8792
Fix a bug in a recent patch that broke shifts
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24526 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 05:11:18 +00:00
Evan Cheng
bd3d25c6b1
Added support to STORE and shifts to DAG to DAG isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24525 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 02:51:20 +00:00
Evan Cheng
345c3f370d
Fixed a minor bug: - -offset != offset iff offset == MININT
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24522 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 01:59:00 +00:00
Evan Cheng
f0701842f7
Add more X86 ISel patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24520 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 19:38:52 +00:00
Chris Lattner
f73bae1b73
No targets support line number info yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24513 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 06:16:21 +00:00
Chris Lattner
1e4ed93599
Add a missed optimization
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24495 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-28 04:52:39 +00:00
Chris Lattner
ac2902bcb5
Use HasDotTypeDotSizeDirective instead of forELF
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24481 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 23:06:54 +00:00
Chris Lattner
9787c6443f
Remove a level of indentation by using a continue.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24479 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 22:48:18 +00:00
Chris Lattner
d460f57d65
Simplify the subtarget info, allow the asmwriter to do some target sensing
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based on TargetType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24478 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 22:43:58 +00:00
Chris Lattner
a35a8e87fa
Use subtarget information computed by X86Subtarget instead of rolling our own.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24477 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 22:39:40 +00:00
Chris Lattner
e5600e5509
Make the X86 subtarget compute the basic target type: ELF, Cygwin, Darwin,
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or native Win32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24476 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 22:31:58 +00:00
Chris Lattner
5df14ca0a1
Add a forELF flag, allowing the removal of forCygwin and simplification of
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conditionals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24475 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 22:19:48 +00:00
Chris Lattner
8fccc97b0b
simplify and genericize this code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24473 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 19:50:31 +00:00
Chris Lattner
69191f8f05
prune #include
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24468 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 08:33:17 +00:00
Chris Lattner
d939f6c85d
Switch to using the shared constant pool printer, along with using shorter
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CPI ids
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24467 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 08:32:23 +00:00
Chris Lattner
8b8b9515d6
Adjust to capitalized AsmPrinter method names
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24456 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:51:23 +00:00
Chris Lattner
64965ba8b0
Use PrivateGlobalPrefix for basic block labels. This allows the x86 darwin
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port to properly use L for the bb prefix instead of .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24454 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:43:59 +00:00
Chris Lattner
7b6e53cde7
convert the rest of this over to use SwitchSection
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24448 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:16:34 +00:00
Chris Lattner
224cfc2eac
Start using the AsmPrinter shared SwitchSection code. This allows the X86
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backend to implement global variables in sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24447 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:11:11 +00:00
Chris Lattner
62cbf2aab9
Rename SwitchSection -> switchSection to avoid conflicting with a future
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change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24443 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 06:55:27 +00:00
Chris Lattner
c41cc83117
Naturally align doubles in the constant pool, set PrivateGlobalPrefix on
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darwin, use it when printing the constant pool indices so the labels are
appropriately private, emit cp entries to .const instead of .data on darwin
and only emit a single .section for the constant pool, not one for each
entry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24440 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 06:46:22 +00:00
Chris Lattner
81f803df80
Lower READCYCLECOUNTER correctly, preserving the chain result
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24438 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-20 22:57:19 +00:00
Chris Lattner
441b223c9b
encode rdtsc correctly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24435 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-20 22:13:18 +00:00
Chris Lattner
81363c3871
use chain operands to ensure the copies don't wander from the rdtsc instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24434 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-20 22:01:40 +00:00
Andrew Lenharth
b873ff322c
The second patch of X86 support for read cycle counter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24430 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-20 21:41:10 +00:00
Chris Lattner
6adaf79ad7
Teach the x86 backend about the register constraints of its addressing mode.
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Patch by Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24423 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-19 07:01:30 +00:00
Chris Lattner
f9ce9fb49b
Add load and other support to the dag-dag isel. Patch contributed by Evan
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Cheng!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24419 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-19 02:11:08 +00:00
Chris Lattner
f124d5e500
add more patterns, patch by Evan Cheng.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24406 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-18 01:04:42 +00:00
Chris Lattner
78432feff8
Add patterns for some 16-bit immediate instructions, patch contributed by
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Evan Cheng.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24384 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 02:01:55 +00:00
Chris Lattner
7a12537843
Add patterns for several simple instructions that take i32 immediates.
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Patch contributed by Evan Cheng!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24382 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-16 22:59:19 +00:00
Chris Lattner
c961eea6cb
initial step at adding a dag-to-dag isel for X86 backend. Patch contributed
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by Evan Cheng!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24371 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-16 01:54:32 +00:00
Chris Lattner
dbdbf0ce2e
Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. Patch
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contributed by Evan Cheng.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24358 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-15 00:40:23 +00:00
Chris Lattner
ce8eb0c16b
Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24233 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-08 02:11:51 +00:00
Chris Lattner
ffff6175ef
add a note that Nate mentioned last week
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23898 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-23 21:44:59 +00:00
Chris Lattner
1171ff4fd7
Put some of my random notes somewhere public
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23897 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-23 19:52:42 +00:00
Nate Begeman
405e3ecb56
Invert the TargetLowering flag that controls divide by consant expansion.
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Add a new flag to TargetLowering indicating if the target has really cheap
signed division by powers of two, make ppc use it. This will probably go
away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23853 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 00:02:42 +00:00
Nate Begeman
34f342e36f
Remove some dead code now that the dag combiner exists.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23754 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 22:08:02 +00:00
Nate Begeman
14e2cf62f4
Properly split f32 and f64 into separate register classes for scalar sse fp
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fixing a bunch of nasty hackery
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23735 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 22:06:00 +00:00
Chris Lattner
3cf8760dc5
silence some warnings
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23594 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 16:29:36 +00:00
Chris Lattner
56bcae0de9
simplify this code using the new regclass info passed in
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23557 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 17:12:38 +00:00
Chris Lattner
97d5e6461a
Pass extra regclasses into spilling code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23537 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 01:29:42 +00:00
Chris Lattner
3e2bafd640
Add FP versions of the binary operators, keeping the int and fp worlds seperate.
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Though I have done extensive testing, it is possible that this will break
things in configs I can't test. Please let me know if this causes a problem
and I'll fix it ASAP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23505 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-28 22:29:17 +00:00
Chris Lattner
a92aab74dd
Implement the isLoadFromStackSlot interface
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23387 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-19 05:23:44 +00:00
Chris Lattner
43ef1318c6
give all operands names
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23356 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-14 21:10:24 +00:00
Chris Lattner
3452d23c34
fix a major regression from my patch this afternoon
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23347 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-14 06:06:45 +00:00
Chris Lattner
82da52299c
This code is no longer needed, it is moved to the target-indep code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23332 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-13 19:31:44 +00:00
Chris Lattner
fb8b8a75ff
Handle any_extend like zext
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23202 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-02 00:16:09 +00:00
Jim Laskey
b1e1180ca0
1. Use SubtargetFeatures in llc/lli.
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2. Propagate feature "string" to all targets.
3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23192 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-01 21:38:21 +00:00
Reid Spencer
dd22dc85ea
Adjust to member variable name change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23119 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-27 19:09:48 +00:00
Chris Lattner
143b675393
Fix a bug in my previous checkin
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23082 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 17:18:44 +00:00
Chris Lattner
5839bf2b3b
Change ConstantPoolSDNode to actually hold the Constant itself instead of
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putting it into the constant pool. This allows the isel machinery to
create constants that it will end up deciding are not needed, without them
ending up in the resultant function constant pool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23081 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 17:15:30 +00:00
Chris Lattner
7cad4f2089
Fix a warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23031 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-25 00:05:15 +00:00
Chris Lattner
d177579860
Adjust to new livevars interface
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22991 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-23 23:41:14 +00:00
Chris Lattner
76eb08bcda
Simplify this code by using LiveVariables::KillsRegister
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22988 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-23 22:49:55 +00:00
Chris Lattner
ecbce617ca
Split RegisterClass 'Methods' into MethodProtos and MethodBodies
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22929 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 19:13:20 +00:00
Chris Lattner
03ba7b9f25
Put register classes into namespaces
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22925 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 18:51:57 +00:00
Chris Lattner
2505d6b727
The simple isel being gone makes this dead!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22914 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 18:32:03 +00:00
Chris Lattner
9d9dc816d0
add a few missing cases
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22891 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 00:41:29 +00:00
Chris Lattner
b822abade7
Give ADJCALLSTACKDOWN/UP the correct operands.
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Give a whole bunch of other stuff variable operands, particularly FP. The
FP stackifier is playing fast and loose with operands here, so we have to
mark them all as variable. This will have to be fixed before we can dag->dag
the X86 backend. The solution is for the pre-stackifier and post-stackifier
instructions to all be disjoint.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22890 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 00:38:22 +00:00
Chris Lattner
679c408768
The variable SAR's only take one operand too
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22888 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 00:31:37 +00:00
Chris Lattner
fd444b2a69
Stop adding bogus operands to variable shifts on X86. These instructions
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only take one operand. The other comes implicitly in through CL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22887 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 00:16:17 +00:00
Nate Begeman
73bfa71524
Remove the X86 and PowerPC Simple instruction selectors; their time has
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passed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22886 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 23:53:15 +00:00
Chris Lattner
707ebc5dd6
update the backends to work with the new CopyFromReg/CopyToReg/ImplicitDef nodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22807 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-16 21:56:37 +00:00
Nate Begeman
7cbd525ba8
Implement BR_CC and BRTWOWAY_CC. This allows the removal of a rather nasty
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fixme from the PowerPC backend. Emit slightly better code for legalizing
select_cc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22805 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-16 19:49:35 +00:00
Nate Begeman
889f2c1acf
Fix last night's X86 regressions by putting code for SSE in the if(SSE)
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block. nur.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22788 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-14 18:37:02 +00:00
Nate Begeman
875f360e22
Fix FP_TO_UINT with Scalar SSE2 now that the legalizer can handle it. We
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now generate the relatively good code sequences:
unsigned short foo(float a) { return a; }
_foo:
movss 4(%esp), %xmm0
cvttss2si %xmm0, %eax
movzwl %ax, %eax
ret
and
unsigned bar(float a) { return a; }
_bar:
movss .CPI_bar_0, %xmm0
movss 4(%esp), %xmm1
movapd %xmm1, %xmm2
subss %xmm0, %xmm2
cvttss2si %xmm2, %eax
xorl $-2147483648, %eax
cvttss2si %xmm1, %ecx
ucomiss %xmm0, %xmm1
cmovb %ecx, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22786 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-14 04:36:51 +00:00
Chris Lattner
88ac32ca26
Update the targets to the new SETCC/CondCodeSDNode interfaces.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22729 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-09 20:21:10 +00:00
Chris Lattner
8c4a8735ec
adjust to change in getSubtarget() api
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22687 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-05 21:54:27 +00:00