Commit Graph

171 Commits

Author SHA1 Message Date
Jim Laskey
2ad9f17fee Simplify lowering and selection of exception ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34488 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-22 14:56:36 +00:00
Jim Laskey
62819f3144 Support to provide exception and selector registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34482 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-21 22:54:50 +00:00
Nate Begeman
bcc5f36765 Finish off bug 680, allowing targets to custom lower frame and return
address nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33636 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-29 22:58:52 +00:00
Jim Laskey
1ee2925742 Make LABEL a builtin opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33537 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-26 14:34:52 +00:00
Reid Spencer
47857812e2 For PR950:
Three changes:
1. Convert signed integer types to signless versions.
2. Implement the @sext and @zext parameter attributes. Previously the
   type of an function parameter was used to determine whether it should
   be sign extended or zero extended before the call. This information is
   now communicated via the function type's parameter attributes.
3. The interface to LowerCallTo had to be changed in order to accommodate
   the parameter attribute information. Although it would have been
   convenient to pass in the FunctionType itself, there isn't always one
   present in the caller. Consequently, a signedness indication for the
   result type and for each parameter was provided for in the interface
   to this method. All implementations were changed to make the adjustment
   necessary.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32788 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-31 05:55:36 +00:00
Bill Wendling
f5da13367f What should be the last unnecessary <iostream>s in the library.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32333 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-07 22:21:48 +00:00
Evan Cheng
c0f64ffab9 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
of opcode and number of operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-27 23:37:22 +00:00
Evan Cheng
0d53826f36 Match tblegen changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31571 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-08 20:34:28 +00:00
Evan Cheng
c35497fc2a All targets expand BR_JT for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31294 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-30 08:02:39 +00:00
Evan Cheng
8b2794aeff Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-13 21:14:26 +00:00
Evan Cheng
466685d41a Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30844 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-09 20:57:25 +00:00
Evan Cheng
786225adf0 Make use of getStore().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30759 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-05 23:01:46 +00:00
Evan Cheng
c548428c5d Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
extra operand to LOADX to specify the exact value extension type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30714 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-04 00:56:09 +00:00
Evan Cheng
c356a572e3 Reflects MachineConstantPoolEntry changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30279 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-12 21:04:05 +00:00
Evan Cheng
95514bae73 SelectNodeTo now returns a SDNode*.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29901 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-26 08:00:10 +00:00
Evan Cheng
9ade218533 Select() no longer require Result operand by reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29898 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-26 05:34:46 +00:00
Evan Cheng
6da2f3268d Match tblgen changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29895 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-26 01:07:58 +00:00
Evan Cheng
23329f5e03 SelectNodeTo() may return a SDOperand that is different from the input.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29726 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-16 07:30:09 +00:00
Evan Cheng
64a752f7c7 Match tablegen changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29604 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 09:08:15 +00:00
Chris Lattner
bd564bfc63 Start eliminating temporary vectors used to create DAG nodes. Instead, pass
in the start of an array and a count of operands where applicable.  In many
cases, the number of operands is known, so this static array can be allocated
on the stack, avoiding the heap.  In many other cases, a SmallVector can be
used, which has the same benefit in the common cases.

I updated a lot of code calling getNode that takes a vector, but ran out of
time.  The rest of the code should be updated, and these methods should be
removed.

We should also do the same thing to eliminate the methods that take a
vector of MVT::ValueTypes.

It would be extra nice to convert the dagiselemitter to avoid creating vectors
for operands when calling getTargetNode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29566 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-08 02:23:42 +00:00
Evan Cheng
2ef88a09b7 Match tablegen isel changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29549 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-07 22:28:20 +00:00
Evan Cheng
2641cad180 Remove InFlightSet hack. No longer needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29373 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-28 00:47:19 +00:00
Evan Cheng
a7dc4a59cb Type of extract_element index operand should be iPTR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28797 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-15 08:18:06 +00:00
Evan Cheng
6848be1a27 Change RET node to include signness information of the return values. i.e.
RET chain, value1, sign1, value2, sign2, ...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28510 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 23:10:12 +00:00
Chris Lattner
8b5fbc5cd4 Add support for the missing FP condition codes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28482 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 22:26:02 +00:00
Evan Cheng
6a3d5a62f0 Assert if InflightSet is not cleared after instruction selecting a BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28459 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 00:24:28 +00:00
Evan Cheng
afe358e7d4 Clear HandleMap and ReplaceMap after instruction selection. Or it may cause
non-deterministic behavior.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28454 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-24 20:46:25 +00:00
Chris Lattner
d74ea2bbd8 Patches to make the LLVM sources more -pedantic clean. Patch provided
by Anton Korobeynikov!  This is a step towards closing PR786.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28447 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-24 17:04:05 +00:00
Chris Lattner
27aaa398ee Remove dead variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28247 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12 17:31:21 +00:00
Nate Begeman
37efe67645 JumpTable support! What this represents is working asm and jit support for
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27947 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-22 18:53:45 +00:00
Nate Begeman
f15485a8d0 SelectionDAGISel can now natively handle Switch instructions, in the same
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks.  The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.

This functionality is currently only enabled on x86, but should be safe for
every target.  In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27156 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-27 01:32:24 +00:00
Chris Lattner
420736dc85 #include Intrinsics.h into all dag isels
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27109 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-25 06:47:10 +00:00
Nate Begeman
81e8097377 Remove BRTWOWAY*
Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26814 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-17 01:40:33 +00:00
Chris Lattner
9601a86a64 Copysign needs to be expanded everywhere. Note that Alpha and IA64 should
implement copysign as a native op if they have it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26541 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-05 05:08:37 +00:00
Nate Begeman
551bf3f800 kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC
and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26255 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17 05:43:56 +00:00
Nate Begeman
368e18d56a Rework the SelectionDAG-based implementations of SimplifyDemandedBits
and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26238 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16 21:11:51 +00:00
Chris Lattner
6fa1f57c66 Fix SingleSource/Regression/C/2004-08-12-InlinerAndAllocas.c on Sparc.
The ABI specifies that there is a register save area at the bottom of the
stack, which means the actual used pointer needs to be an offset from
the subtracted value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26202 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15 06:41:34 +00:00
Chris Lattner
94dd29216c Switch targets over to using SelectionDAG::getCALLSEQ_START to create
CALLSEQ_START nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26143 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-13 09:00:43 +00:00
Chris Lattner
ad7a3e6208 Use the auto-generated call matcher. Remove a broken impl of the frameaddr/returnaddr
intrinsics.

Autogen frameindex matcher


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26107 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-10 07:35:42 +00:00
Evan Cheng
7e9b26fc73 Match getTargetNode() changes (now return SDNode* instead of SDOperand).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26085 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09 07:17:49 +00:00
Chris Lattner
3029f92051 Adjust to MachineConstantPool interface change: instead of keeping a
value/alignment pair for each constant, keep a value/offset pair.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26078 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09 04:46:04 +00:00
Evan Cheng
34167215a8 Change Select() from
SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26067 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09 00:37:58 +00:00
Chris Lattner
c26017a4ae Fix the Sparc backend with Evan's recent tblgen changes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26009 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-05 08:35:50 +00:00
Evan Cheng
900c826bc7 Use SelectRoot() as the entry to any tblgen based isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25998 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-05 06:51:51 +00:00
Chris Lattner
7c90f73a1b Rename SPARC V8 target to be the LLVM SPARC target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25985 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-05 05:50:24 +00:00
Chris Lattner
c275dfa727 Custom lower VAARG for the case when we are doing vaarg(double). In this
case, the double being loaded may not be 8-byte aligned, so we have to use
our standard bit_convert game.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25967 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04 08:31:30 +00:00
Evan Cheng
b8973bd8f5 Allow the specification of explicit alignments for constant pool entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25855 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 22:23:14 +00:00
Chris Lattner
c03468bafa add a missing break that caused a lot of failures last night :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25851 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 17:20:06 +00:00
Chris Lattner
7a4d2913ea treat conditional branches the same way as conditional moves (giving them
an operand that contains the condcode), making things significantly simpler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25840 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 06:56:30 +00:00
Chris Lattner
6788faa06a compactify all of the integer conditional moves into one instruction that takes
a CC as an operand.  Much smaller, much happier.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25839 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 06:49:09 +00:00
Chris Lattner
86638b94c1 Compile this:
void %X(int %A) {
        %C = setlt int %A, 123          ; <bool> [#uses=1]
        br bool %C, label %T, label %F

T:              ; preds = %0
        call int %main( int 0 )         ; <int>:0 [#uses=0]
        ret void

F:              ; preds = %0
        ret void
}

to this:

X:
        save -96, %o6, %o6
        subcc %i0, 122, %l0
        bg .LBBX_2      ! F
        nop
...

not this:

X:
        save -96, %o6, %o6
        sethi 0, %l0
        or %g0, 1, %l1
        subcc %i0, 122, %l2
        bg .LBBX_4      !
        nop
.LBBX_3:        !
        or %g0, %l0, %l1
.LBBX_4:        !
        subcc %l1, 0, %l0
        bne .LBBX_2     ! F
        nop


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25833 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 05:05:52 +00:00
Chris Lattner
b716343851 I don't see why this optimization isn't safe, but it isn't, so disable it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25829 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 02:45:52 +00:00
Chris Lattner
2adc05cf5b Fix FP constants, and the SparcV8/2006-01-22-BitConvertLegalize.ll failure from last night
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25819 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 22:20:49 +00:00
Chris Lattner
3772bcb333 Revamp the ICC/FCC reading instructions to be parameterized in terms of the
SPARC condition codes, not in terms of the DAG condcodes.  This allows us to
write nice clean patterns for cmovs/branches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25815 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 07:43:04 +00:00
Chris Lattner
9072c05cd8 Compile:
uint %test(uint %X) {
        %Y = call uint %llvm.ctpop.i32(uint %X)
        ret uint %Y
}

to:

test:
        save -96, %o6, %o6
        sll %i0, 0, %l0
        popc %l0, %i0
        restore %g0, %g0, %g0
        retl
        nop

instead of to 40 logical ops.  Note the shift-by-zero that clears the top
part of the 64-bit V9 register.

Testcase here: CodeGen/SparcV8/ctpop.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25814 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 06:14:02 +00:00
Chris Lattner
76afdc9a80 First step towards V9 instructions in the V8 backend, two conditional move
patterns.  This allows emission of this code:

t1:
        save -96, %o6, %o6
        subcc %i0, %i1, %l0
        move %icc, %i0, %i2
        or %g0, %i2, %i0
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

t1:
        save -96, %o6, %o6
        subcc %i0, %i1, %l0
        be .LBBt1_2     !
        nop
.LBBt1_1:       !
        or %g0, %i2, %i0
.LBBt1_2:       !
        restore %g0, %g0, %g0
        retl
        nop

for this:

int %t1(int %a, int %b, int %c) {
        %tmp.2 = seteq int %a, %b
        %tmp3 = select bool %tmp.2, int %a, int %c
        ret int %tmp3
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25809 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 05:35:57 +00:00
Chris Lattner
dea9528f7f When lowering SELECT_CC, see if the input is a lowered SETCC. If so, fold
the two operations together.  This allows us to compile this:

void %two(int %a, int* %b) {
        %tmp.2 = seteq int %a, 0
        %tmp.0.0 = select bool %tmp.2, int 10, int 20
        store int %tmp.0.0, int* %b
        ret void
}

into:

two:
        save -96, %o6, %o6
        or %g0, 20, %l0
        or %g0, 10, %l1
        subcc %i0, 0, %l2
        be .LBBtwo_2    ! entry
        nop
.LBBtwo_1:      ! entry
        or %g0, %l0, %l1
.LBBtwo_2:      ! entry
        st %l1, [%i1]
        restore %g0, %g0, %g0
        retl
        nop

instead of:

two:
        save -96, %o6, %o6
        sethi 0, %l0
        or %g0, 1, %l1
        or %g0, 20, %l2
        or %g0, 10, %l3
        subcc %i0, 0, %l4
        be .LBBtwo_2    ! entry
        nop
.LBBtwo_1:      ! entry
        or %g0, %l0, %l1
.LBBtwo_2:      ! entry
        subcc %l1, 0, %l0
        bne .LBBtwo_4   ! entry
        nop
.LBBtwo_3:      ! entry
        or %g0, %l2, %l3
.LBBtwo_4:      ! entry
        st %l3, [%i1]
        restore %g0, %g0, %g0
        retl
        nop


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25806 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 04:34:44 +00:00
Chris Lattner
c6fd6cd65c Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25803 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 04:09:27 +00:00
Chris Lattner
4a397e0e94 Implement isMaskedValueZeroForTargetNode for the various v8 selectcc nodes,
allowing redundant and's to be eliminated by the dag combiner.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25800 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 03:51:45 +00:00
Chris Lattner
44ea7b1a6c Use V8ISD::CALL instead of ISD::CALL
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25716 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 23:30:03 +00:00
Nate Begeman
ee625573b5 Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for
the same functionality.  This addresses another piece of bug 680.  Next,
on to fixing Alpha VAARG, which I broke last time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25696 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 21:09:22 +00:00
Chris Lattner
4dcfaac2e3 Rest of subtarget support, remove references to ppc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25642 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-26 07:22:22 +00:00
Evan Cheng
0577a22c67 Set SchedulingForLatency to be the default scheduling preference for all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25607 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-25 18:52:42 +00:00
Nate Begeman
acc398c195 First part of bug 680:
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25606 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-25 18:21:52 +00:00
Evan Cheng
7558b0e80c Default scheduling preference is SchedulingForLatency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25603 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-25 09:15:54 +00:00
Chris Lattner
46030a6b0a implement support for f32 arguments past the first 6 words
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25450 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-19 07:22:29 +00:00
Chris Lattner
99cf50937d Silly Sparc is big endian. If we have to load args out of incoming stack slots
that are smaller than an int, make sure to adjust the frame pointer to take
this into consideration.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25351 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-16 01:40:00 +00:00
Chris Lattner
f7511b4943 Make sure that bool,byte and short arguments are the right type when loaded
from memory.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25346 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-15 22:22:01 +00:00
Chris Lattner
7f9975a793 Disable a broken optimization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25340 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-15 19:15:46 +00:00
Chris Lattner
934ea49a55 Have legalize take care of DYNAMIC_STACKALLOC for us, implement llvm.stacksave/stackrestore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25332 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-15 08:55:25 +00:00
Chris Lattner
bce8887cee Implement DYNAMIC_STACKALLOC for V8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25330 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-15 08:43:57 +00:00
Nate Begeman
d88fc03602 bswap implementation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25312 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-14 03:14:10 +00:00
Chris Lattner
b99329e8a0 expand unsupported stacksave/stackrestore nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25272 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-13 02:42:53 +00:00
Chris Lattner
4bb91024ac Fix branches on FP compares
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25249 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-12 17:05:32 +00:00
Chris Lattner
138d322e96 fix a bug in my previous checkin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25244 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-12 07:38:04 +00:00
Chris Lattner
72878a463b Give V8ISD nodes symbolic names in dumps
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25243 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-12 07:31:15 +00:00
Nate Begeman
35ef913ec2 Add bswap, rotl, and rotr nodes
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25222 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 21:21:00 +00:00
Chris Lattner
7ec6a6e96e This is no longer needed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25219 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 19:52:46 +00:00
Chris Lattner
b9169ceb23 Use Evan's outflag stuff to implement V8cmpicc. This allows us to write a
pattern for SUBCCrr, and makes it trivial to add support for SUBCCri, eliminating
an instruction in the common "setcc X, imm" case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25212 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 07:49:38 +00:00
Chris Lattner
3fbb726141 Fix a bug in i32->f64 conversion lowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25211 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 07:27:40 +00:00
Chris Lattner
cb83374bd9 silence a bogus gcc warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25129 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-06 17:56:38 +00:00
Jim Laskey
e0bce71c42 Had expand logic backward.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25105 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-05 01:47:43 +00:00
Jim Laskey
abf6d1784b Added initial support for DEBUG_LABEL allowing debug specific labels to be
inserted in the code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25104 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-05 01:25:28 +00:00
Evan Cheng
941334f0b0 Remove some dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25102 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-05 00:26:14 +00:00
Chris Lattner
330ea12667 fix something-o
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24987 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-23 07:08:39 +00:00
Chris Lattner
74fa64b072 implement vaarg. Varargs now should work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24986 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-23 06:37:38 +00:00
Chris Lattner
c4769bb529 implement vastart. The dag isel compiles this:
void test3(va_list Y);
void test2(int F, ...) {
  va_list X;
  va_start(X, F);
  test3(X);
}

into this:

test2:
        save -104, %o6, %o6
        st %i5, [%i6+88]
        st %i4, [%i6+84]
        st %i3, [%i6+80]
        st %i2, [%i6+76]
        st %i1, [%i6+72]
        add %i6, 72, %o0
        st %o0, [%i6+-4]
        call test3
        nop
        restore %g0, %g0, %g0
        retl
        nop

The simple isel emits:

test2:
        save -96, %o6, %o6
        st %i0, [%i6+68]
        st %i1, [%i6+72]
        st %i2, [%i6+76]
        st %i3, [%i6+80]
        st %i4, [%i6+84]
        st %i5, [%i6+88]
        or %g0, 1, %l0
        or %g0, 4, %l1
        umul %l0, %l1, %l0
        add %l0, 7, %l0
        and %l0, -8, %l0
        sub %o6, %l0, %o6
        add %o6, 96, %l0
        add %i6, 72, %l1
        st %l1, [%l0]
        ld [%l0], %o0
        call test3
        nop
        restore %g0, %g0, %g0
        retl
        nop


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24985 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-23 06:24:04 +00:00
Chris Lattner
53e884587b make sure bit_converts are expanded
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24978 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-23 05:13:35 +00:00
Chris Lattner
3cb7187d5f fix the int<->fp instructions, which apparently take a single float register
to represent the int part (because it's always 32-bits)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24976 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-23 05:00:16 +00:00
Chris Lattner
a01874fc89 Use BIT_CONVERT to simplify this code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24975 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-23 02:31:39 +00:00
Jim Laskey
e81aecbae6 Disengage DEBUG_LOC from non-PPC targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24919 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 20:51:37 +00:00
Chris Lattner
7669a51c34 remove dead code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24896 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 05:27:51 +00:00
Chris Lattner
7c423b4df1 Fix pifft by correcting the case when a i64/f64 straddles O5 and memory:
we were storing into [FP+88] instead of [FP+92].
Improve codegen by emitting [FP+92], instead of emitting a copy of FP into
another GPR which wouldn't be coallesced because FP isn't register allocated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24859 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-19 07:57:53 +00:00
Chris Lattner
eb0966693b Fix calls to functions returning i64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24856 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-19 02:15:51 +00:00
Chris Lattner
61772c20ee mark some unsupported ops as unsupported
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24852 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-19 01:39:40 +00:00
Chris Lattner
6554beffe4 Keep stack frames 8-byte aligned. This fixes olden/voronoi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24849 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-19 01:15:13 +00:00
Chris Lattner
8ba0423660 Elimiante SP and FP, which weren't members of the IntRegs register class
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24844 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-19 00:06:52 +00:00
Chris Lattner
311f8c21d0 Add support for calls to external symbols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24838 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 23:07:11 +00:00
Chris Lattner
e90ac3a3e7 we have no memcpy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24837 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 23:00:27 +00:00
Chris Lattner
b4d899e21c Fix a crash on a call with no arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24836 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 22:57:47 +00:00