Chris Lattner
908d8e82b5
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123752 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 07:47:48 +00:00
Venkatraman Govindaraju
687ae9606b
SPARC backend: Modified LowerCall and LowerFormalArguments so that they use CallingConv assignments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123749 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 06:09:55 +00:00
Daniel Dunbar
4b462672d2
McARM: Use accessors where appropriate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123746 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 05:55:27 +00:00
Daniel Dunbar
6ec56204f3
McARM: Fill in ASMOperand::dump() for memory operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123745 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 05:55:21 +00:00
Daniel Dunbar
2637dc9a25
McARM: Make ARMOperand use a union where appropriate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123744 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 05:55:15 +00:00
Daniel Dunbar
05d8b71424
McARM: Unify ParseMemory() successfull return.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123740 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 05:34:24 +00:00
Daniel Dunbar
0571093f4c
McARM: Early exit on failure (NEFC).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123739 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 05:34:17 +00:00
Daniel Dunbar
d3df5f32c0
McARM: Always keep an offset expression, if used (instead of assuming == 0 if used but not present), and simplify logic.
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Also, clean up various non-sensicalisms in isMemModeRegThumb() and isMemModeImmThumb().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123738 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 05:34:11 +00:00
Daniel Dunbar
023835d51b
McARM: Add a variety of asserts on the sanity of memory operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123737 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 05:34:05 +00:00
Daniel Dunbar
81f453c4b9
McARM: Use a consistent marker for not-set OffsetRegNum.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123736 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 05:33:57 +00:00
Daniel Dunbar
2e3cea3153
McARM: Start marking T2 address operands as such, for the benefit of the parser.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123722 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 03:06:03 +00:00
Eric Christopher
cdfe3c359b
The stub routine that we're calling uses test and so clobbers
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the flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123712 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 01:37:20 +00:00
Chris Lattner
32899199c0
minor change to rafael's recent patches: if something is
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constant but requires a unique address, we can still put it in a
readonly section, just not a mergable one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123711 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 01:23:44 +00:00
Jeffrey Yasskin
955ed73d12
Remove unused variables found by gcc-4.6's -Wunused-but-set-variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123707 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 00:51:23 +00:00
Douglas Gregor
e735882224
Add a missing <cctype> include, from Joerg Sonnenberger!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123670 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-17 19:17:01 +00:00
Kalle Raiskila
9dcb98cbe7
Split up RotateShift itinerary in SPU.
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'rotq*' and 'shlq*' instructions go to the odd pipeline,
wheras the inter-vector equivalents 'rot*', 'shl*' go
to the even.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123622 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-17 13:33:19 +00:00
Kalle Raiskila
8702e8be8d
Don't crash SPU BE with memory accesses with big alignmnet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123620 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-17 11:59:20 +00:00
Evan Cheng
5de5d4b6d0
Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g.
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movw r0, :lower16:(L_foo$non_lazy_ptr-(LPC0_0+4))
movt r0, :upper16:(L_foo$non_lazy_ptr-(LPC0_0+4))
LPC0_0:
add r0, pc, r0
It's not yet enabled by default as some tests are failing. I suspect bugs in
down stream tools.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123619 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-17 08:03:18 +00:00
Anton Korobeynikov
1d8334eabc
Provide instruction sizes for ARMv5 variants of MUL instructions.
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This fixes PR8987
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123598 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16 21:28:33 +00:00
Anders Carlsson
5822b86e4d
Update README.txt to remove the DAE enhancement.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123597 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16 21:26:15 +00:00
Rafael Espindola
7010401c6b
Only put unnamed_addr constants in mergeable sections. Fixes PR8297.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123585 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16 17:19:34 +00:00
Chris Lattner
dec28ceb02
fix PR8514, a bug where the "heroic" transformation of shift/and
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into and/shift would cause nodes to move around and a dangling pointer
to happen. The code tried to avoid this with a HandleSDNode, but
got the details wrong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123578 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16 08:48:11 +00:00
Chris Lattner
b0daffc609
add some commentary
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123572 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16 06:39:44 +00:00
Evan Cheng
df55fea807
Spill R4 if it's going to be used to restore SP from FP.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123567 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16 05:14:33 +00:00
Venkatraman Govindaraju
c1a62834a2
Implement AnalyzeBranch in Sparc Backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123561 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16 03:15:11 +00:00
Chris Lattner
9cd3da47f9
fix PR8981, a crash trying to form a conditional inc with a floating point compare.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123560 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16 02:56:53 +00:00
Chris Lattner
b99fdee325
reapply my fix for PR8961 with a tweak to properly handle
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multi-instruction sequences like calls. Many thanks to Jakob for
finding a testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123559 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16 02:27:38 +00:00
Chandler Carruth
cad33c624e
Simplify a README.txt entry significantly to expose the core issue.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123556 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16 01:40:23 +00:00
Eric Christopher
a0f720f500
80-col.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123505 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-15 00:25:09 +00:00
Bob Wilson
ca3f06963c
Fix a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123497 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-15 00:09:18 +00:00
Eric Christopher
41262da6cc
Fix 80-cols.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123494 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 23:50:53 +00:00
Ted Kremenek
d7f696edec
'HiReg' is written but never read. Nuke its
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declaration and its assignments.
Found by clang static analyzer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123486 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 22:34:13 +00:00
Anton Korobeynikov
3965b5e974
Add a possibility to switch between CFI directives- and table-based frame description emission. Currently all the backends use table-based stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123476 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 21:58:08 +00:00
Anton Korobeynikov
e749911372
Cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123475 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 21:57:58 +00:00
Chris Lattner
d357e88740
revert my fastisel patch again which apparently still gives the
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llvm-gcc-i386-linux-selfhost buildbot heartburn...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123431 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 06:14:33 +00:00
Chris Lattner
9e27cc8049
reapply r123414 now that the botz are calmed down and the fix is already in.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123427 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 04:24:28 +00:00
Evan Cheng
f3eb3bba16
Completed :lower16: / :upper16: support for movw / movt pairs on Darwin.
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- Fixed :upper16: fix up routine. It should be shifting down the top 16 bits first.
- Added support for Thumb2 :lower16: and :upper16: fix up.
- Added :upper16: and :lower16: relocation support to mach-o object writer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123424 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 02:38:49 +00:00
Chris Lattner
a899d1c264
r123414 broke llvm-gcc bootstrap apparently, revert
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123422 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 02:07:32 +00:00
Chris Lattner
d754041493
fix PR8961 - a fast isel miscompilation where we'd insert a new instruction
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after sext's generated for addressing that got folded. Previously we compiled
test5 into:
_test5: ## @test5
## BB#0:
movq -8(%rsp), %rax ## 8-byte Reload
movq (%rdi,%rax), %rdi
addq %rdx, %rdi
movslq %esi, %rax
movq %rax, -8(%rsp) ## 8-byte Spill
movq %rdi, %rax
ret
which is insane and wrong. Now we produce:
_test5: ## @test5
## BB#0:
movslq %esi, %rax
movq (%rdi,%rax), %rax
addq %rdx, %rax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123414 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 00:01:01 +00:00
Owen Anderson
0c9f250d54
Recognize alternative register names like ip -> r12.
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Fixes <rdar://problem/8857982>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123409 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 22:50:36 +00:00
Jakob Stoklund Olesen
f7ca976e74
Fix a few more places that should use MBB::getLastNonDebugInstr().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123408 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 22:47:43 +00:00
Chris Lattner
4c5456a56f
typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123406 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 22:11:56 +00:00
Chris Lattner
4cd18f98f7
memcpy + metadata = bliss :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123405 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 22:08:15 +00:00
Owen Anderson
e4e5e2aae7
Add support to the ARM MC infrastructure to support mcr and friends. This requires supporting
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the symbolic immediate names used for these instructions, fixing their pretty-printers, and
adding proper encoding information for them.
With this, we can properly pretty-print and encode assembly like:
mrc p15, #0 , r3, c13, c0, #3
Fixes <rdar://problem/8857858>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123404 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 21:46:02 +00:00
Jakob Stoklund Olesen
4f28c1c714
Teach frame lowering to ignore debug values after the terminators.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123399 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 21:28:52 +00:00
Bob Wilson
422578547e
Tidy comments, indentation, and 80-column violations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123397 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 21:10:12 +00:00
Kevin Enderby
67b212e03b
Fix ARMAsmParser::ParseOperand() to allow it to parse . as a branch target and
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directional local labels like 1f and 2b.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123393 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 20:32:36 +00:00
Jim Grosbach
5f3e2be7c9
When updating a tSpill/tRestore instruction to be a tSTRr/tLDRr, correctly
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set up the source operands. The original instr has an immediate operand that
should be replaced with the frame reg operand rather than just adding the
reg operand. Previously, the instruction ended up with too many operands
causing an assert() when adding the default predicate. rdar://8825456
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123387 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 19:16:48 +00:00
Evan Cheng
7597212abc
Model :upper16: and :lower16: as ARM specific MCTargetExpr. This is a step
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in the right direction. It eliminated some hacks and will unblock codegen
work. But it's far from being done. It doesn't reject illegal expressions,
e.g. (FOO - :lower16:BAR). It also doesn't work in Thumb2 mode at all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123369 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 07:58:56 +00:00
Eric Christopher
04f5079ca1
Experiment with changing the default 32-bit linux stack alignment to
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16 bytes for PR8969. Update all testcases accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123367 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 06:47:10 +00:00
Kevin Enderby
fef9ff4922
Add a FIXME and two asserts for now in the ARMAsmParser when it sees .code 16 or
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.code 32 if the TargetMachine's isThumb() boolean does not match. The correct
fix is to switch ARM subtargets at that point and is tracked by rdar://8856789
which is bigger task.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123353 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 01:07:01 +00:00
Jason W Kim
8a8696db6b
Change call to Error() to assert()
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123350 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 00:27:00 +00:00
Jason W Kim
8dc602d245
Added clarifying comment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123341 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 23:25:02 +00:00
Jason W Kim
650b7d76af
JimG sez: "The value-kinds look like masks, but they're not consistently used
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that way, unfortunately. If you want to change them to work additively instead
of a one-variant-kind-per-symbolref, that's great and I completely agree it's
worth doing, but it really should be a separate patch. Until then, this isn't
correct."
So I am reverting this bit until a more opportune time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123340 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 23:21:49 +00:00
Bill Wendling
7caebff83d
Sort the register list based on the *actual* register numbers rather than the
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enum values we give to them. <rdar://problem/8823730>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123321 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 21:20:59 +00:00
Matt Beaumont-Gay
5f8a917b65
Mostly undo r123297, but move the default case in EvaluateAsPCRel to the top
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of the switch block to appease GCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123317 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 18:02:55 +00:00
Nick Lewycky
e45f2dfde6
Add another note taken from the gcc bugzilla.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123315 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 09:06:19 +00:00
Venkatraman Govindaraju
860b64cb1e
Implement RETURNADDR and FRAMEADDR lowering in SPARC backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123310 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 05:08:36 +00:00
Venkatraman Govindaraju
c178308b23
Remove SPARC backend getpcx instruction's Uses. Also, insert an assert to
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ensure %o7 is not assigned as the destination of getpcx instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123304 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 03:52:59 +00:00
Venkatraman Govindaraju
7d29ffbe5b
Fix SPARC backend call instruction so that arguments passed through registers
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are correctly marked as used instead of passing all possible argument registers
as used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123301 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 03:18:21 +00:00
Matt Beaumont-Gay
676943b31a
Prefer llvm_unreachable to assert(0)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123297 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 01:42:42 +00:00
Jason W Kim
86a97f2e4d
1. Support ELF pcrel relocations for movw/movt:
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R_ARM_MOVT_PREL and R_ARM_MOVW_PREL_NC.
2. Fix minor bug in ARMAsmPrinter - treat bitfield flag as a bitfield, not an enum.
3. Add support for 3 new elf section types (no-ops)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123294 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 00:19:25 +00:00
Jason W Kim
9081b4b4cf
Workaround for bug 8721.
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.s Test added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123292 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 23:53:41 +00:00
Venkatraman Govindaraju
f27df33b02
SPARC backend: correct ICC/FCC uses for ADDX and SELECT_CC
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123281 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 22:38:28 +00:00
Evan Cheng
b72d2a92b7
Clean up ARM subtarget code by using Triple ADT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123276 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 21:46:47 +00:00
Daniel Dunbar
eb9f3f91c0
McARM: Fill in GetMnemonicAcceptInfo().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123253 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 19:06:29 +00:00
Bob Wilson
6c562f69fe
Fix a comment: We now have intrinsics for vcvtr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123246 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 17:56:41 +00:00
Chris Lattner
3a5004dc3e
Fix PR8946, a missing reg/reg form of movdqu.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123242 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 17:04:55 +00:00
Daniel Dunbar
3771dd041f
McARM: Sketch some logic for determining when to add carry set and predication code operands based on the "canonical mnemonic".
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123239 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 15:59:53 +00:00
Daniel Dunbar
352e148cbe
McARM: Add more hard coded logic to SplitMnemonicAndCC to also split out the
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carry setting flag from the mnemonic.
Note that this currently involves me disabling a number of working cases in
arm_instructions.s, this is a hopefully short term evil which will be rapidly
fixed (and greatly surpassed), assuming my current approach flies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123238 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 15:59:50 +00:00
Kalle Raiskila
b9505f6bed
Fix a thinko in 123226 that caused test failures on "other" platforms.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123229 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 11:27:56 +00:00
Kalle Raiskila
76020ed6f3
Add a "nop filler" pass to SPU.
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Filling no-ops is done just before emitting of assembly,
when the instruction stream is final. No-ops are inserted
to align the instructions so the dual-issue of the pipeline
is utilized. This speeds up generated code with a minimum of
1% on a select set of algorithms.
This pass may be redundant if the instruction scheduler and
all subsequent passes that modify the instruction stream
(prolog+epilog inserter, register scavenger, are there others?)
are made aware of the instruction alignments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123226 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 09:07:54 +00:00
Chandler Carruth
15ed90c859
Teach constant folding to perform conversions from constant floating
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point values to their integer representation through the SSE intrinsic
calls. This is the last part of a README.txt entry for which I have real
world examples.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123206 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 01:07:24 +00:00
Owen Anderson
da1c122da5
Fix a random missed optimization by making InstCombine more aggressive when determining which bits are demanded by
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a comparison against a constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123203 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 00:36:45 +00:00
Eric Christopher
94bb7b561c
Even if we don't have 7 bytes of stack space we may need to save and
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restore the stack pointer from the frame pointer on thumbv6.
Fixes rdar://8819685
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123196 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 00:16:04 +00:00
Eric Christopher
4dd312f233
Expand on the safeness of restoring the sp from the fp a bit more.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123193 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 23:10:59 +00:00
Chris Lattner
4a6fb94c40
+0.0 vs -0.0 differences can be handled by looking at the user of the
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operation in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123190 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 21:01:17 +00:00
Daniel Dunbar
8ab1112bdc
McARM: Flush out hard coded known non-predicated mnemonic list.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123189 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 21:01:03 +00:00
Daniel Dunbar
8d66b7852a
McARM: Mark some T2 ...s instructions as codegen only, they aren't real
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instructions but are restricted pseudo forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123177 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 15:26:39 +00:00
Daniel Dunbar
238100aaa7
ARM/MC: Mark several '...S' instructions as codegen only, they aren't real
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instructions but are restricted pseudo forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123176 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 15:26:35 +00:00
Daniel Dunbar
6a5c22ed89
MC/ARM/AsmParser: Minor nitty fixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123175 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 15:26:21 +00:00
Anton Korobeynikov
2c8bd754de
Fix merge fallout
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123172 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 12:56:18 +00:00
Anton Korobeynikov
7af6fad0a7
Update CMake stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123171 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 12:39:23 +00:00
Anton Korobeynikov
16c29b5f28
Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123170 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 12:39:04 +00:00
Daniel Dunbar
badbd2fde9
MC/ARM/AsmParser: Split out SplitMnemonicAndCC().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123169 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 12:24:52 +00:00
Jakob Stoklund Olesen
c9df025e33
Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.
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These functions not longer assert when passed 0, but simply return false instead.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123155 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 02:58:51 +00:00
Chris Lattner
00a35d0f14
expand on a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123145 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 00:33:01 +00:00
Chris Lattner
66d7a5793c
typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123142 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 23:48:41 +00:00
Chris Lattner
7cc4e304a6
xref a PR #
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123141 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 23:42:22 +00:00
Chandler Carruth
fb00e2715b
Add a note about the inability to model FP -> int conversions which
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perform rounding other than truncation in the IR. Common C code for this
turns into really an LLVM intrinsic call that blocks a lot of further
optimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123135 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 22:36:18 +00:00
Jakob Stoklund Olesen
be97e906e0
Teach TargetRegisterInfo how to cram stack slot indexes in with the virtual and
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physical register numbers.
This makes the hack used in LiveInterval official, and lets LiveInterval be
oblivious of stack slots.
The isPhysicalRegister() and isVirtualRegister() predicates don't know about
this, so when a variable may contain a stack slot, isStackSlot() should always
be tested first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123128 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 21:17:37 +00:00
Chandler Carruth
96b1b6c135
Add a note about a missed FP optimization.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123126 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 21:00:19 +00:00
Chandler Carruth
694d753b09
Another missed memset in std::vector initialization.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123116 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 11:29:57 +00:00
Chandler Carruth
27a2a13b62
Fix a cut-paste-o so that the sample code is correct for my last note.
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Also, switch to a more clear 'sink' function with its declaration to
avoid any confusion about 'g'. Thanks for the suggestion Frits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123113 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 10:10:59 +00:00
Chandler Carruth
e5ca494ae6
Another missed optimization of trivial vector code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123112 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 09:58:36 +00:00
Chandler Carruth
d8723a9b55
Add a note about vector's size-constructor producing dead stores.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123111 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 09:58:33 +00:00
Jakob Stoklund Olesen
4314268128
Replace TargetRegisterInfo::printReg with a PrintReg class that also works without a TRI instance.
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Print virtual registers numbered from 0 instead of the arbitrary
FirstVirtualRegister. The first virtual register is printed as %vreg0.
TRI::NoRegister is printed as %noreg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123107 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 03:05:53 +00:00
Chandler Carruth
75fbd3793f
Add a note about a missed memset optimization from std::fill.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123103 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 01:32:55 +00:00
Jakob Stoklund Olesen
b258135301
Fix the last virtual register enumerations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123102 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-08 23:11:11 +00:00
Evan Cheng
55d4200336
Recognize inline asm 'rev /bin/bash, ' as a bswap intrinsic call.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123048 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-08 01:24:27 +00:00
Evan Cheng
c36b7069b4
Do not model all INLINEASM instructions as having unmodelled side effects.
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Instead encode llvm IR level property "HasSideEffects" in an operand (shared
with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check
the operand when the instruction is an INLINEASM.
This allows memory instructions to be moved around INLINEASM instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123044 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07 23:50:32 +00:00
Bob Wilson
70f85730b1
Add an explanatory message for an assertion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123042 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07 23:40:46 +00:00
Matt Beaumont-Gay
697970286a
Eliminate variable only used in debug builds.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123040 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07 22:34:58 +00:00
Bob Wilson
11a1dfffc8
Lower some BUILD_VECTORS using VEXT+shuffle.
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Patch by Tim Northover.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123035 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07 21:37:30 +00:00
Benjamin Kramer
eaff66a895
Revert 122959, it needs more thought. Add it back to README.txt with additional notes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123030 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07 20:42:20 +00:00
Evan Cheng
a5e1362f96
Revert r122955. It seems using movups to lower memcpy can cause massive regression (even on Nehalem) in edge cases. I also didn't see any real performance benefit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123015 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07 19:35:30 +00:00
Bob Wilson
5e8b833707
Add ARM patterns to match EXTRACT_SUBVECTOR nodes.
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Also fix an off-by-one in SelectionDAGBuilder that was preventing shuffle
vectors from being translated to EXTRACT_SUBVECTOR.
Patch by Tim Northover.
The test changes are needed to keep those spill-q tests from testing aligned
spills and restores. If the only aligned stack objects are spill slots, we
no longer realign the stack frame. Prior to this patch, an EXTRACT_SUBVECTOR
was legalized by loading from the stack, which created an aligned frame index.
Now, however, there is nothing except the spill slot in the stack frame, so
I added an aligned alloca.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122995 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07 04:59:04 +00:00
Chris Lattner
01cdc2016d
With Benjamin's recent amazing patches, we should be able to do even better things :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122978 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06 22:25:00 +00:00
Bob Wilson
6819dbb6f8
PR8921: LDM/POP do not support interworking prior to v5t.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122970 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06 19:24:41 +00:00
Bob Wilson
28f1015e36
Remove extra whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122969 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06 19:24:36 +00:00
Bob Wilson
0fef58465c
Fix comment typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122968 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06 19:24:32 +00:00
Benjamin Kramer
fa36680076
Add a note from llvmdev, this time with more info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122966 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06 17:35:50 +00:00
Rafael Espindola
2f867a63da
Correctly disassemble truncated asm.
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Patch by Richard Simth.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122962 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06 16:48:42 +00:00
Benjamin Kramer
7d9f51f4b5
EarlyCSE does this now (and GVN always did it).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122960 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06 13:19:46 +00:00
Benjamin Kramer
240d42d185
InstCombine: If we call llvm.objectsize on a malloc call we can replace it with the size passed to malloc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122959 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06 13:11:05 +00:00
Benjamin Kramer
5191e7cc26
Remove dead code and silence warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122957 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06 13:01:02 +00:00
Evan Cheng
461f1fc359
Use movups to lower memcpy and memset even if it's not fast (like corei7).
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The theory is it's still faster than a pair of movq / a quad of movl. This
will probably hurt older chips like P4 but should run faster on current
and future Intel processors. rdar://8817010
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122955 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06 07:58:36 +00:00
Chris Lattner
cce240d26b
add a note about object size from drystone, add a poorly optimized loop from 179.art.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122954 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06 07:41:22 +00:00
Chris Lattner
c1853e4a03
add a trivial instcombine missed in Dhrystone
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122953 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06 07:09:23 +00:00
Evan Cheng
0521928ae7
Re-implement r122936 with proper target hooks. Now getMaxStoresPerMemcpy
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etc. takes an option OptSize. If OptSize is true, it would return
the inline limit for functions with attribute OptSize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122952 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06 06:52:41 +00:00
Bill Wendling
a99ec28134
PR8919 - LLVM incorrectly generates "_alloca" as the stack probing call. That
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works only on MinGW32. On 64-bit, the function to call is "__chkstk".
Patch by KS Sreeram!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122934 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06 00:50:34 +00:00
Bill Wendling
78d15761e4
PR8918 - When used with MinGW64, LLVM generates a "calll __main" at the
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beginning of the "main" function. The assembler complains about the invalid
suffix for the 'call' instruction. The right instruction is "callq __main".
Patch by KS Sreeram!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122933 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06 00:47:10 +00:00
Chris Lattner
c010e61ae1
fix PR8900, a shuffle miscompilation. Patch by Nadav Rotem!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122921 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-05 22:28:46 +00:00
Chris Lattner
c46ec649b1
silence more self assignment warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122920 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-05 22:26:52 +00:00
Chris Lattner
54c6d6f42d
fix some -Wself-assign warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122893 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-05 18:41:05 +00:00
Wesley Peck
3d2148f5ac
Commit 122778 broke DWARF debug output when using the MBlaze backend. Fixed by overriding TargetFrameInfo::getFrameIndexOffset to take into account the new frame index information.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122889 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-05 17:34:20 +00:00
Jakob Stoklund Olesen
631ee4b89f
Use the EdgeBundles analysis in X86FloatingPoint instead of recomputing CFG
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bundles in the pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122833 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-04 21:10:11 +00:00
Jakob Stoklund Olesen
8dd070edc2
Turn the EdgeBundles class into a stand-alone machine CFG analysis pass.
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The analysis will be needed by both the greedy register allocator and the
X86FloatingPoint pass. It only needs to be computed once when the CFG doesn't
change.
This pass is very fast, usually showing up as 0.0% wall time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122832 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-04 21:10:05 +00:00
Dale Johannesen
1e08cd1eae
Eliminate a warning compiling with llvm-gcc. (IMO the
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warning is overzealous but gcc is what it is.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122829 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-04 19:31:24 +00:00
Andrew Trick
6018deefe8
Fix the ARM IIC_iCMPsi itinerary and add an important assert.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122794 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-04 00:32:57 +00:00
Bill Wendling
2c502f915f
Formatting changes. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122789 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-03 23:59:05 +00:00
Evan Cheng
7158e08b8e
Use pushq / popq instead of subq $8, %rsp / addq $8, %rsp to adjust stack in
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prologue and epilogue if the adjustment is 8. Similarly, use pushl / popl if
the adjustment is 4 in 32-bit mode.
In the epilogue, takes care to pop to a caller-saved register that's not live
at the exit (either return or tailcall instruction).
rdar://8771137
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122783 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-03 22:53:22 +00:00
Wesley Peck
b020808f0d
Fix more stack layout issues in the MBlaze backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122778 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-03 21:40:26 +00:00
Benjamin Kramer
80220369b0
Try to reuse the value when lowering memset.
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This allows us to compile:
void test(char *s, int a) {
__builtin_memset(s, a, 15);
}
into 1 mul + 3 stores instead of 3 muls + 3 stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122710 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-02 19:57:05 +00:00
Oscar Fuentes
3458534f11
A workaround for a bug in cmake 2.8.3 diagnosed on PR 8885.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122706 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-02 19:32:31 +00:00
Chris Lattner
527b47d189
update a bunch of entries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122700 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-02 18:31:38 +00:00
Chris Lattner
cf078f2b20
Allow loop-idiom to run on multiple BB loops, but still only scan the loop
...
header for now for memset/memcpy opportunities. It turns out that loop-rotate
is successfully rotating loops, but *DOESN'T MERGE THE BLOCKS*, turning "for
loops" into 2 basic block loops that loop-idiom was ignoring.
With this fix, we form many *many* more memcpy and memsets than before, including
on the "history" loops in the viterbi benchmark, which look like this:
for (j=0; j<MAX_history; ++j) {
history_new[i][j+1] = history[2*i][j];
}
Transforming these loops into memcpy's speeds up the viterbi benchmark from
11.98s to 3.55s on my machine. Woo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122685 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-02 07:58:36 +00:00
Chris Lattner
15df04472a
a missed __builtin_object_size case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122676 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-01 22:57:31 +00:00
Chris Lattner
9c8fb9e820
various updates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122675 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-01 22:52:11 +00:00
Rafael Espindola
03277e7fb4
Add support for the 'H' modifier.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122667 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-01 20:58:46 +00:00
Anton Korobeynikov
4d72860835
Model operand restrictions of mul-like instructions on ARMv5 via
...
earlyclobber stuff. This should fix PRs 2313 and 8157.
Unfortunately, no testcase, since it'd be dependent on register
assignments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122663 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-01 20:38:38 +00:00
Duncan Sands
124708d9b4
Revert commit 122654 at the request of Chris, who reckons that instsimplify
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is the wrong hammer for this nail, and is probably right.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122661 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-01 20:08:02 +00:00
Duncan Sands
7cf85e74e3
Fix a README item by having InstructionSimplify do a mild form of value
...
numbering, in which it considers (for example) "%a = add i32 %x, %y" and
"%b = add i32 %x, %y" to be equal because the operands are equal and the
result of the instructions only depends on the values of the operands.
This has almost no effect (it removes 4 instructions from gcc-as-one-file),
and perhaps slows down compilation: I measured a 0.4% slowdown on the large
gcc-as-one-file testcase, but it wasn't statistically significant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122654 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-01 16:12:09 +00:00
Che-Liang Chiou
c88e91b875
ptx: remove reg-reg addressing mode and st.const
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122653 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-01 11:58:58 +00:00
Che-Liang Chiou
ad83c1d383
ptx: add store instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122652 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-01 10:50:37 +00:00
Oscar Fuentes
ba6f918a6d
Add to the list of cmake files the object file, not the asm file. This
...
is necessary for executing the custom command that runs the
assember. Fixes PR8877.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122649 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-31 20:15:37 +00:00
Nick Lewycky
c00210cef2
Add another non-commutable instruction that gas accepts commuted forms for.
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Fixes PR8861.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122641 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-30 22:10:49 +00:00
Che-Liang Chiou
d34f19f7ba
ptx: add state spaces
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122638 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-30 10:41:27 +00:00
Wesley Peck
b4aec92453
Fix stack layout error in MBlaze backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122631 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-29 19:46:28 +00:00
Venkatraman Govindaraju
12db7b68b6
SPARC backend fix: correctly passing arguments through stack
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122626 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-29 05:37:15 +00:00
NAKAMURA Takumi
7d63a2c2e8
CMake: Add disabling optimization on MSVC8 and MSVC10 as workaround for some files in Target/ARM and Target/X86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122623 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-29 03:59:27 +00:00
Venkatraman Govindaraju
f661277a9b
Multiple SPARC backend fixes: added Y register; updated select_cc, subx, subxcc defs/uses;
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and fixed CustomInserter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122607 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-28 20:39:17 +00:00
Chris Lattner
1dc5db2beb
add a note from llvmdev
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122603 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-28 18:45:02 +00:00
Rafael Espindola
3a83c40ab6
Add support for the same encodings of the personality function that gnu as
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supports.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122577 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-27 00:36:05 +00:00
Chris Lattner
6dbb5dc5eb
fix some sort of weird pasto
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122560 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-26 12:05:11 +00:00
Chris Lattner
8a4893e013
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122559 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-26 03:53:31 +00:00
Andrew Trick
2da8bc8a5f
Various bits of framework needed for precise machine-level selection
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DAG scheduling during isel. Most new functionality is currently
guarded by -enable-sched-cycles and -enable-sched-hazard.
Added InstrItineraryData::IssueWidth field, currently derived from
ARM itineraries, but could be initialized differently on other targets.
Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is
active, and if so how many cycles of state it holds.
Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry
into the scheduler's available queue.
ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to
get information about it's SUnits, provides RecedeCycle for bottom-up
scheduling, correctly computes scoreboard depth, tracks IssueCount, and
considers potential stall cycles when checking for hazards.
ScheduleDAGRRList now models machine cycles and hazards (under
flags). It tracks MinAvailableCycle, drives the hazard recognizer and
priority queue's ready filter, manages a new PendingQueue, properly
accounts for stall cycles, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122541 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 05:03:26 +00:00
Andrew Trick
6e8f4c4048
whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122539 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 04:28:06 +00:00
Jim Grosbach
f12eee75d1
Use a StringSwitch<> instead of a manually constructed string matcher.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122530 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 00:03:39 +00:00
Evan Cheng
e4a2dd2f1a
Code clean up. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122528 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 23:54:17 +00:00
Jim Grosbach
b0ad9cf935
Remove dead patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122524 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 23:20:13 +00:00
Jim Grosbach
940c8e5494
Recognize a few more documented register name aliases for ARM in the asm lexer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122523 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 23:19:54 +00:00
Bob Wilson
3c904694fc
Radar 8803471: Fix expansion of ARM BCCi64 pseudo instructions.
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If the basic block containing the BCCi64 (or BCCZi64) instruction ends with
an unconditional branch, that branch needs to be deleted before appending
the expansion of the BCCi64 to the end of the block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122521 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 22:45:49 +00:00
Chris Lattner
036609bd7d
Flag -> Glue, the ongoing saga
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122513 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 18:28:41 +00:00
Chris Lattner
29d8f0cae4
flags -> glue for selectiondag
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122509 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 17:24:32 +00:00
Benjamin Kramer
9d071cbb92
Remove/fix invalid README entries. The well thought out strcpy function doesn't return a pointer to the end of the string.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122496 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 15:32:07 +00:00
Benjamin Kramer
3e4106105b
Remove some obsolete README items, add a new one off the top of my head.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122495 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 15:07:02 +00:00
Jeffrey Yasskin
8e68c38735
Change all self assignments X=X to (void)X, so that we can turn on a
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new gcc warning that complains on self-assignments and
self-initializations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122458 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 00:58:24 +00:00
Jim Grosbach
9584bd83e6
Trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122456 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 23:26:02 +00:00
Benjamin Kramer
e915ff30cd
X86: Lower a select directly to a setcc_carry if possible.
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int test(unsigned long a, unsigned long b) { return -(a < b); }
compiles to
_test: ## @test
cmpq %rsi, %rdi ## encoding: [0x48,0x39,0xf7]
sbbl %eax, %eax ## encoding: [0x19,0xc0]
ret ## encoding: [0xc3]
instead of
_test: ## @test
xorl %ecx, %ecx ## encoding: [0x31,0xc9]
cmpq %rsi, %rdi ## encoding: [0x48,0x39,0xf7]
movl $-1, %eax ## encoding: [0xb8,0xff,0xff,0xff,0xff]
cmovael %ecx, %eax ## encoding: [0x0f,0x43,0xc1]
ret ## encoding: [0xc3]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122451 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 23:09:28 +00:00
Che-Liang Chiou
fc7072c3c4
ptx: add ld instruction and test
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122398 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 10:38:51 +00:00
Wesley Peck
9eb337a2b7
Don't generate carry bit when loading immediate values on the Microblaze.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122385 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 01:29:32 +00:00
Wesley Peck
6b3bbb149f
Add support for some of the LLVM atomic operations to the MBlaze backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122384 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 01:15:01 +00:00
Wesley Peck
5f996d1025
Modeling the carry bit in the MSR register of the MicroBlaze.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122381 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 00:53:07 +00:00
Wesley Peck
025c4587d7
Fix a regression introduced into the MBlaze delay slot filler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122379 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 00:22:59 +00:00
Benjamin Kramer
7d6fe13efc
Add some x86 specific dagcombines for conditional increments.
...
(add Y, (sete X, 0)) -> cmp X, 1; adc 0, Y
(add Y, (setne X, 0)) -> cmp X, 1; sbb -1, Y
(sub (sete X, 0), Y) -> cmp X, 1; sbb 0, Y
(sub (setne X, 0), Y) -> cmp X, 1; adc -1, Y
for
unsigned foo(unsigned a, unsigned b) {
if (a == 0) b++;
return b;
}
we now get:
foo:
cmpl $1, %edi
movl %esi, %eax
adcl $0, %eax
ret
instead of:
foo:
testl %edi, %edi
sete %al
movzbl %al, %eax
addl %esi, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122364 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-21 21:41:44 +00:00
Bob Wilson
316009054e
Add ARM-specific DAG combining to cast i64 vector element load/stores to f64.
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Type legalization splits up i64 values into pairs of i32 values, which leads
to poor quality code when inserting or extracting i64 vector elements.
If the vector element is loaded or stored, it can be treated as an f64 value
and loaded or stored directly from a VPR register. Use the pre-legalization
DAG combiner to cast those vector elements to f64 types so that the type
legalizer won't mess them up. Radar 8755338.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122319 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-21 06:43:19 +00:00
Eric Christopher
c19aadb8b0
Arm and thumb call instructions are also in different orders.
...
Fixes rdar://8782223
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122313 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-21 03:50:43 +00:00
Chris Lattner
f1b4eafbfe
rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for
...
something that just glues two nodes together, even if it is
sometimes used for flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-21 02:38:05 +00:00
Eric Christopher
6e90ce21cc
If we're not using reg+reg offset we're using reg+imm, set the opcode
...
to be the one we want to use. bugpoint reduced testcase is a little large,
I'll see if I can simplify it down more.
Fixes part of rdar://8782207
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122307 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-21 02:12:07 +00:00
Bill Wendling
a519d57725
Fix a copy-pasto. When the tBR_JTr instruction was converted to using the
...
tPseudoInst class, its size was changed from "special" to "2 bytes". This is
incorrect because the jump table will no longer be taken into account when
calculating branch offsets.
<rdar://problem/8782216>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122303 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-21 01:57:15 +00:00
Bill Wendling
9a4d2e40a0
Comment cleanups.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122302 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-21 01:54:40 +00:00
Nate Begeman
672fb6225b
Implement feedback from Bruno on making pblendvb an x86-specific ISD node in addition to being an intrinsic, and convert
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lowering to use it. Hopefully the pattern fragment is doing the right thing with XMM0, looks correct in testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122277 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20 22:04:24 +00:00
Wesley Peck
d66a32c35f
Teach the MBlaze disassembler to disassemble special purpose registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122269 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20 21:18:04 +00:00
Wesley Peck
9c0068f0a3
Teach the MBlaze asm parser how to parse special purpose register names.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122261 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20 20:43:24 +00:00
Daniel Dunbar
67e0c212c2
Add header...
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122247 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20 15:45:51 +00:00
Daniel Dunbar
9b2f25e313
X86/MC/Mach-O: Split out createX86MachObjectWriter().
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122246 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20 15:07:39 +00:00
Chris Lattner
23a0199f05
now that addc/adde are gone, "ADDC" in the X86 backend uses EFLAGS results,
...
the same as setcc. Optimize ADDC(0,0,FLAGS) -> SET_CARRY(FLAGS). This is
a step towards finishing off PR5443. In the testcase in that bug we now get:
movq %rdi, %rax
addq %rsi, %rax
sbbq %rcx, %rcx
testb $1, %cl
setne %dl
ret
instead of:
movq %rdi, %rax
addq %rsi, %rax
movl $0, %ecx
adcq $0, %rcx
testq %rcx, %rcx
setne %dl
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122219 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20 01:37:09 +00:00
Chris Lattner
39ffcb7b62
We lower setb to sbb with the hope that the and will go away, when it
...
doesn't, match it back to setb.
On a 64-bit version of the testcase before we'd get:
movq %rdi, %rax
addq %rsi, %rax
sbbb %dl, %dl
andb $1, %dl
ret
now we get:
movq %rdi, %rax
addq %rsi, %rax
setb %dl
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122217 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20 01:16:03 +00:00
Chris Lattner
d8ff7eca8c
use for loop over types.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122214 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20 01:03:27 +00:00
Chris Lattner
5b85654844
Change the X86 backend to stop using the evil ADDC/ADDE/SUBC/SUBE nodes (which
...
their carry depenedencies with MVT::Flag operands) and use clean and beautiful
EFLAGS dependences instead.
We do this by changing the modelling of SBB/ADC to have EFLAGS input and outputs
(which is what requires the previous scheduler change) and change X86 ISelLowering
to custom lower ADDC and friends down to X86ISD::ADD/ADC/SUB/SBB nodes.
With the previous series of changes, this causes no changes in the testsuite, woo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122213 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20 00:59:46 +00:00
Mon P Wang
a0fd0d5b27
Prevents PerformShuffleCombine from creating a node with an illegal type after legalize types
...
has run, e.g., prevent creating an i64 node from a v2i64 when i64 is not a legal type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122206 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19 23:55:53 +00:00
Chris Lattner
c19d1c3ba2
improve the setcc -> setcc_carry optimization to happen more
...
consistently by moving it out of lowering into dag combine.
Add some missing patterns for matching away extended versions of setcc_c.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122201 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19 22:08:31 +00:00
Chris Lattner
481eebc931
simplify some code to just reuse a setcc if we can instead of
...
going through the CSE maps to get it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122196 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19 21:23:48 +00:00
Nick Lewycky
476b242fe7
Add missing standard headers. Patch by Joerg Sonnenberger!
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122193 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19 20:43:38 +00:00
Nick Lewycky
2402123413
Add missing std:: prefixes to some calls. C++ doesn't require that <cfoo>
...
headers provide symbols outside namespace std and the LLVM coding standards
state that we should prefix all of them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122192 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19 20:42:43 +00:00
Chris Lattner
2a786eb030
now that generic vector types aren't selected onto MMX operations,
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we don't need -disable-mmx anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122189 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19 20:19:20 +00:00
Chris Lattner
e019ec168b
reduce copy/paste programming with the power of for loops.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122187 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19 20:07:10 +00:00
Chris Lattner
a34b3cf953
X86 supports i8/i16 overflow ops (except i8 multiplies), we should
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generate them.
Now we compile:
define zeroext i8 @X(i8 signext %a, i8 signext %b) nounwind ssp {
entry:
%0 = tail call %0 @llvm.sadd.with.overflow.i8(i8 %a, i8 %b)
%cmp = extractvalue %0 %0, 1
br i1 %cmp, label %if.then, label %if.end
into:
_X: ## @X
## BB#0: ## %entry
subl $12, %esp
movb 16(%esp), %al
addb 20(%esp), %al
jo LBB0_2
Before we were generating:
_X: ## @X
## BB#0: ## %entry
pushl %ebp
movl %esp, %ebp
subl $8, %esp
movb 12(%ebp), %al
testb %al, %al
setge %cl
movb 8(%ebp), %dl
testb %dl, %dl
setge %ah
cmpb %cl, %ah
sete %cl
addb %al, %dl
testb %dl, %dl
setge %al
cmpb %al, %ah
setne %al
andb %cl, %al
testb %al, %al
jne LBB0_2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122186 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19 20:03:11 +00:00
Chris Lattner
e5cbdca3bd
recognize an unsigned add with overflow idiom into uadd.
...
This resolves a README entry and technically resolves PR4916,
but we still get poor code for the testcase in that PR because
GVN isn't CSE'ing uadd with add, filed as PR8817.
Previously we got:
_test7: ## @test7
addq %rsi, %rdi
cmpq %rdi, %rsi
movl $42, %eax
cmovaq %rsi, %rax
ret
Now we get:
_test7: ## @test7
addq %rsi, %rdi
movl $42, %eax
cmovbq %rsi, %rax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122182 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19 19:37:52 +00:00
Anton Korobeynikov
c8bd78c16b
Restore the behavior of frame lowering before my refactoring.
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It turns out that ppc backend has really weird interdependencies
over different hooks and all stuff is fragile wrt small changes.
This should fix PR8749
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122155 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 19:53:14 +00:00
Rafael Espindola
1ec5bd31fe
Remove the MCObjectFormat class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122147 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 05:37:28 +00:00
Rafael Espindola
bff66a86e6
Move some data to the TargetWriter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122134 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 03:27:34 +00:00
Bill Wendling
a68a4fdf37
r120333 changed the opcode for the Thumb1 stuff from ARM::tMOVr to
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ARM::tMOVgpr2gpr. But this check didn't change. As a result, we were getting
misaligned references to the jump table from an ADR instruction.
There is a test case, but unfortunately it's sensitive to random code changes.
<rdar://problem/8782223>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122131 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 02:13:59 +00:00
Bill Wendling
cd080249fc
RemoveUnusedCPEntries can change things. Track it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122129 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 01:53:06 +00:00
Rafael Espindola
1ee03a835e
Relax push instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122121 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 01:01:34 +00:00
Bob Wilson
094dd80ecc
Rearrange some Neon multiclasses. No functional changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122119 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 00:42:58 +00:00
Bob Wilson
3deb45149a
Fix result type of Neon floating-point comparisons against zero.
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The result vector elements are always integers. Radar 8782191.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122112 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 00:04:33 +00:00
Bob Wilson
3a75b9bc8f
Add some missing entries in ARMTargetLowering::getTargetNodeName.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122111 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 00:04:26 +00:00
Bill Wendling
976ef86689
During local stack slot allocation, the materializeFrameBaseRegister function
...
may be called. If the entry block is empty, the insertion point iterator will be
the "end()" value. Calling ->getParent() on it (among others) causes problems.
Modify materializeFrameBaseRegister to take the machine basic block and insert
the frame base register at the beginning of that block. (It's very similar to
what the code does all ready. The only difference is that it will always insert
at the beginning of the entry block instead of after a previous materialization
of the frame base register. I doubt that that matters here.)
<rdar://problem/8782198>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122104 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 23:09:14 +00:00
Bob Wilson
9bb43e1675
Avoid report_fatal_error in ARM's PrintAsmOperand method.
...
The standard error handling in AsmPrinter::EmitInlineAsm handles this much
better, so just use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122100 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 23:06:42 +00:00
Nate Begeman
b65c175d32
Add support for matching psign & plendvb to the x86 target
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Remove unnecessary pandn patterns, 'vnot' patfrag looks through bitcasts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122098 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 22:55:37 +00:00
Jim Grosbach
a3dbd3a244
If The ARM WriteNopData() gets an unaligned byte count to pad out, fill in with
...
a partial value. rdar://8782954
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122078 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 19:03:02 +00:00
Jim Grosbach
f0db261e97
Add bits 31-28 to the Thumb2 encoding of TBB/TBH.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122076 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 18:42:56 +00:00
Jim Grosbach
6ec6eeb692
Handle 2 and 4 byte data blob fixup values for ARM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122075 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 18:39:10 +00:00
Benjamin Kramer
d53f3c864b
Pass StringRefs by value, for consistency.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122074 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 18:19:06 +00:00
Rafael Espindola
6024c97ffa
Stub out explicit MCELFObjectTargetWriter interface.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122067 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 17:45:22 +00:00
Rafael Espindola
285b3e5b61
Move createELFObjectWriter to its own header.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122064 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 16:59:53 +00:00
Kalle Raiskila
18aa393153
Don't feed 19 bit immediates to ILA.
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Patch (slightly modified) by Visa Putkinen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122052 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 09:36:09 +00:00
Daniel Dunbar
1139d5090a
MC/ARM: Use aggressive symbol folding (important for jump tables, for example).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122044 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 06:00:24 +00:00
Daniel Dunbar
b87422778c
MC/Mach-O: On second thought, use a custom hook for enabling aggressive
...
IsSymbolRefDifferenceFullyResolved, it turns out this does change behavior on
enough cases for x86-32 that I would rather wait a bit on it.
- In practice, we will want to change this eventually because it only means we
generate less relocations (it also eliminates the need for the horrible
'.set' hack that Darwin requires in some places).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122042 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 05:50:29 +00:00
Daniel Dunbar
7b62afac0a
MC/Target: Remove HasScatteredSymbols target hook variable, which has been
...
superceded and was effectively dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122024 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 02:06:08 +00:00
Bob Wilson
a1f544b62e
Use PairDRegs to implement ConcatVectors. No functionality change.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122017 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 01:21:08 +00:00
Rafael Espindola
3ee33aa6f9
Make pushq produce signed relocations.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122005 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 22:50:01 +00:00
Wesley Peck
8a28f21379
Fix MBlaze backend call instructions so that arguments passed through registers
...
are correctly marked as used. This removes a hack where the call instructions
marked all possible argument registers as used in the tablegen description.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121994 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 19:41:31 +00:00
Jim Grosbach
3efad8fad4
Pseudo-ize the Thumb1 tBfar pattern. rdar://8777974
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121990 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 19:11:16 +00:00
Daniel Dunbar
5d05d9769e
MC/Mach-O: Lift some MachObjectWriter arguments into the target specific
...
interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121981 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 17:21:02 +00:00
Daniel Dunbar
ae5abd595f
MC/Mach-O: Stub out explicit MCMachObjectTargetWriter interface.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121973 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 16:09:19 +00:00
Daniel Dunbar
297ed28bf9
Fix indentation (per style guide).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121972 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 16:08:43 +00:00
Daniel Dunbar
aa4b7dd13b
MC/Mach-O: Move createMachObjectWriter into MCMachObjectWriter.h.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121971 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 16:08:33 +00:00
Daniel Dunbar
2761fc4270
MC: Move target specific fixup info descriptors to TargetAsmBackend instead of
...
the MCCodeEmitter, which seems like a better organization.
- Also, cleaned up some magic constants while in the area.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121953 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 03:20:06 +00:00
Daniel Dunbar
745dacc91d
MC: Make TargetAsmBackend available to the AsmStreamer.
...
- Treaty talks on the non-proliferation of MC objects broke down.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121949 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 03:05:59 +00:00
Matt Beaumont-Gay
656b3d22f7
Delete an extra "Imm5 = ", caught by GCC's -Wsequence-point but not by Clang
...
(see PR4579).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121939 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 01:34:26 +00:00
Bill Wendling
6baf46dbea
Remove fixup_arm_thumb_ldst. The code was never calling the "fixup" stuff for
...
it. I.e., it was always an immediate value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121932 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 00:50:33 +00:00
Bill Wendling
5a54516adf
Add tSpill and tRestore to the opcodes to replace with tSTRi and tLDRi
...
respectively.
It may be a bug that these opcodes are getting this far into machine code
generation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121931 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 00:49:54 +00:00
Bill Wendling
dedec2b89d
Add encodings for Thumb1 Spill and Restore pseudos.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121929 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 00:38:41 +00:00
Jim Grosbach
3e333637f1
Thumb1 had two patterns for the same load-from-constant-pool instruction.
...
Canonicalize on tLDRpci and remove tLDRcp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121920 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 23:52:36 +00:00
Eric Christopher
836c6245ad
Don't handle -arm-long-calls in fast isel for now.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121919 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 23:47:29 +00:00
Bill Wendling
7a905a82f7
If we're changing the frame register to a physical register other than SP, we
...
need to use tLDRi and tSTRi instead of tLDRspi and tSTRspi respectively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121915 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 23:32:27 +00:00
Bill Wendling
dc3813750e
Whitespace cleanups.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121914 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 23:31:24 +00:00
Evan Cheng
f735f2da6e
Only rr forms of ADD*_DB are commutable.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121908 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 22:57:36 +00:00
Bob Wilson
0406356cd4
Add Neon VCVT instructions for f32 <-> f16 conversions.
...
Clang is now providing intrinsics for these and so we need to support them
in the backend. Radar 8068427.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121902 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 22:14:12 +00:00
Wesley Peck
dc9d87a9bb
Lower the MBlaze target specific calling conventions for "interrupt_handler"
...
and "save_volatiles" correctly. This completes the custom calling convention
functionality changes for the MBlaze backend that were started in 121888.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121891 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 20:27:28 +00:00
Wesley Peck
d5f4bc2c33
Add some special purpose register definitions to the MBlaze backend and cleanup some old, unused floating point register definitions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121882 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 19:35:36 +00:00
Jim Grosbach
d481110ef7
Tweak a few pseudo-inst pattern base classes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121878 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 19:03:16 +00:00
Jim Grosbach
41b1d4e472
The new t2LEApcrel* pseudo instructions need the size specified.
...
rdar://8768390
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121876 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 18:48:45 +00:00
Owen Anderson
47dbd429da
Implement cleanups suggested by Daniel.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121875 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 18:48:27 +00:00
Bill Wendling
22447ae54b
Add fixups for Thumb LDR/STR instructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121858 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 08:51:02 +00:00
Chris Lattner
9448184b99
add another overflow idiom
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121854 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 07:28:58 +00:00
Chris Lattner
08859ffa63
add a note about overflow idiom recognition.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121853 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 07:25:55 +00:00