Commit Graph

2631 Commits

Author SHA1 Message Date
Rafael Espindola
5bf7c534cf Lower TLS_addr32 and TLS_addr64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120225 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-27 20:43:02 +00:00
Benjamin Kramer
ce750f0332 Implement the "if (X == 6 || X == 4)" -> "if ((X|2) == 6)" optimization.
This currently only catches the most basic case, a two-case switch, but can be
extended later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119964 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22 09:45:38 +00:00
Dale Johannesen
76eb5f2401 Prefetch has a MemOperand now. FileCheckize a test.
This finishes up 8460971.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119848 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 21:49:38 +00:00
Mon P Wang
cab98e3168 Make isScalarToVector to return false if the node is a scalar. This will prevent
DAGCombine from making an illegal transformation of bitcast of a scalar to a
vector into a scalar_to_vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119819 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 19:08:12 +00:00
Duncan Sands
dcfd3a798f The DAGCombiner was threading select over pairs of extending loads even
if the extension types were not the same.  The result was that if you
fed a select with sext and zext loads, as in the testcase, then it
would get turned into a zext (or sext) of the select, which is wrong
in the cases when it should have been an sext (resp. zext).  Reported
and diagnosed by Sebastien Deldon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119728 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 20:05:18 +00:00
Rafael Espindola
5c0556341e Change CodeGen to use .loc directives. This produces a lot more readable output
and testing is easier.  A good example is the unknown-location.ll test that
now can just look for ".loc 1 0 0".  We also don't use a DW_LNE_set_address for
every address change anymore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119613 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 02:04:25 +00:00
Dale Johannesen
b4ac2858da Do not throw away alignment when generating the DAG for
memset; we may need it to decide between MOVAPS and MOVUPS
later.  Adjust a test that was looking for wrong code.
PR 3866 / 8675131.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119605 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 01:35:23 +00:00
John Thompson
d3b809d476 Fixed to use input redirection for source - to eliminate .s output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119599 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 00:50:20 +00:00
John Thompson
7730318000 Bug 8621 fix - pointer cast stripped from inline asm constraint argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119590 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 23:58:47 +00:00
Peter Collingbourne
948cf0289f Recognise 32-bit ror-based bswap implementation used by uclibc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119007 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-13 19:54:30 +00:00
Dan Gohman
efb8a9d0c2 Remove the memmove->memcpy optimization from CodeGen. MemCpyOpt does this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118789 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-11 16:24:49 +00:00
Duncan Sands
68c39552a5 Testcase for PR8211 (llc crash at -O0).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118509 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-09 16:22:27 +00:00
Dan Gohman
6a559cd695 Fix DAGCombiner to avoid folding a sext-in-reg or similar through a shl
in order to fold it into a load.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118471 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-09 01:54:35 +00:00
Dan Gohman
be7c5116a7 Delete an extraneous svn:executable property.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118470 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-09 01:51:06 +00:00
Dale Johannesen
71365d3774 Fix an inline asm pasto from 117667; was preventing
{i64, i64} from matching i128.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118465 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-09 01:15:07 +00:00
Chris Lattner
db28788e4a go to great lengths to work around a GAS bug my previous patch
exposed:

GAS doesn't accept "fcomip %st(1)", it requires "fcomip %st(1), %st(0)"
even though st(0) is implicit in all other fp stack instructions.

Fortunately, there is an alias for fcomip named "fcompi" and gas does
accept the default argument for the alias (boggle!).

As such, switch the canonical form of this instruction to "pi" instead
of "ip".  This makes the code generator and disassembler generate pi,
avoiding the gas bug.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118356 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06 21:37:06 +00:00
Dale Johannesen
d5ce456161 This test assumes SSE is present; that is not the default
on non-X86 hosts.  Hopefully fixes ppc-host buildbot.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118182 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03 18:08:41 +00:00
Dan Gohman
394d6298bc Fix DAGCombiner to avoid going into an infinite loop when it
encounters (and:i64 (shl:i64 (load:i64), 1), 0xffffffff).
This fixes rdar://8606584.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118143 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03 01:47:46 +00:00
John Thompson
45c21ff044 Inline asm mult-alt constraint tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118107 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02 23:01:44 +00:00
Devang Patel
a90b305af9 Use frameindex, if available, as a last resort to emit debug info for a parameter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118020 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02 17:01:30 +00:00
Dale Johannesen
e49406fd63 Fix pastos in handling of AVX cvttsd2si, PR8491.
Bruno, please review, but I'm pretty sure this is right.
Patch by Alex Mac!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117514 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 00:35:54 +00:00
Dale Johannesen
d155d7e428 An stdcall function calling a non-stdcall function
cannot use tailcall.  PR 8461.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117322 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 22:17:05 +00:00
Michael J. Spencer
c527407010 X86: Emit _fltused instead of __fltused on Windows x64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117205 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 09:06:59 +00:00
Evan Cheng
134982daa9 More accurate estimate / tracking of register pressure.
- Initial register pressure in the loop should be all the live defs into the
  loop. Not just those from loop preheader which is often empty.
- When an instruction is hoisted, update register pressure from loop preheader
  to the original BB.
- Treat only use of a virtual register as kill since the code is still SSA.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116956 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 22:03:58 +00:00
Evan Cheng
2312842de0 Re-enable register pressure aware machine licm with fixes. Hoist() may have
erased the instruction during LICM so UpdateRegPressureAfter() should not
reference it afterwards.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116845 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 18:58:51 +00:00
Daniel Dunbar
9869413802 Revert r116781 "- Add a hook for target to determine whether an instruction def
is", which breaks some nightly tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116816 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 17:14:24 +00:00
Evan Cheng
11e8b74a7a - Add a hook for target to determine whether an instruction def is
"long latency" enough to hoist even if it may increase spilling. Reloading
  a value from spill slot is often cheaper than performing an expensive
  computation in the loop. For X86, that means machine LICM will hoist
  SQRT, DIV, etc. ARM will be somewhat aggressive with VFP and NEON
  instructions.
- Enable register pressure aware machine LICM by default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116781 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 00:55:07 +00:00
Michael J. Spencer
84ac4d5a2a X86-Windows: Emit an undefined global __fltused symbol when targeting Windows
if any floating point arguments are passed to an external function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116665 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-16 08:25:41 +00:00
Rafael Espindola
6d8628061b Fix another case where we were preferring instructions with large
immediates instead of 8 bits ones.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116410 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 17:14:25 +00:00
Rafael Espindola
dba81cf40e Fix PR8365 by adding a more specialized Pat that checks if an 'and' with
8 bit constants can be used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116403 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 13:31:20 +00:00
Eric Christopher
8f9145b0eb FileCheckize this in a hope to quiet a valgrind warning on grep.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116376 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 23:47:58 +00:00
Andrew Trick
0a434dbb91 PR8297
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116223 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 21:08:42 +00:00
Andrew Trick
1a2cf3b4d9 Fixes bug 8297: i386 cmpxchg8b, missing MachineMemOperand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116214 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 19:02:04 +00:00
Michael J. Spencer
92bf38c956 X86: MinGW should always use libgcc on Windows.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116177 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-10 23:11:06 +00:00
Michael J. Spencer
1802a9f8fe X86: Call _alldiv instead of __divdi3 on Windows (excluding cygwin).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116174 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-10 22:04:34 +00:00
Cameron Esfahani
ec37b00b17 Recommit 116056, now with the missing file...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116083 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 19:24:18 +00:00
Andrew Trick
5900201aa7 reverting 116056: win64_params.ll may need to be conditionalized?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116063 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 17:22:42 +00:00
Cameron Esfahani
d7b8d91d4a Small patch to restore home register stack space allocation for the Win64 case. Add test case. This code eventually needs to be tighter, since it's always allocating it, even in leaf routines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116056 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 10:31:30 +00:00
Chris Lattner
4075546739 testcase that goes with r116053
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116054 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 05:12:30 +00:00
Chris Lattner
77c7008469 rename test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116052 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 05:05:06 +00:00
Chris Lattner
4a26318224 merge tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116051 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 05:04:58 +00:00
Chris Lattner
48b03bc70a filecheckize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116050 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 05:02:29 +00:00
Chris Lattner
15df55d8c2 reapply: Use the new TB_NOT_REVERSABLE flag instead of special
reapply: reimplement the second half of the or/add optimization.  We should now

with no changes.  Turns out that one missing "Defs = [EFLAGS]" can upset things
a bit.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116040 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 03:57:25 +00:00
Daniel Dunbar
32f0cdba30 Revert "reimplement the second half of the or/add optimization. We should now",
which depends on r116007, which I am about to revert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116031 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 02:07:26 +00:00
Chris Lattner
cd3167b281 reimplement the second half of the or/add optimization. We should now
only end up emitting LEA instead of OR.  If we aren't able to promote
something into an LEA, we should never be emitting it as an ADD.

Add some testcases that we emit "or" in cases where we used to produce
an "add".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116026 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 01:05:10 +00:00
Chris Lattner
00e94baf4e convert cmp to use a multipattern
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115978 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-07 20:56:25 +00:00
Evan Cheng
835580fc3a Canonicalize X86ISD::MOVDDUP nodes to v2f64 to make sure all cases match. Also eliminate unneeded isel patterns. rdar://8520311
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115977 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-07 20:50:20 +00:00
Bill Wendling
0659b045cf PSHUFW is in SSE, not SSSE3.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115691 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-05 21:58:12 +00:00
Owen Anderson
3a9e7690ba Use a more efficient lowering of uint64_t --> float that can take advantage of hardware signed integer conversion without
having to do a double cast (uint64_t --> double --> float).  This is based on the algorithm from compiler_rt's __floatundisf
for X86-64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-05 17:24:05 +00:00
NAKAMURA Takumi
605789564c test/CodeGen/X86/atomic_op.ll: Rename @main to @func. Extra sequences will be inserted to @main as prologue on cygming, to fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115611 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-05 11:16:24 +00:00
Anton Korobeynikov
e7beda183d va_args support for Win64.
Patch by Cameron!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115480 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-03 22:52:07 +00:00
Anton Korobeynikov
6af61ca789 Properly emit stack probe on win64 (for non-mingw targets).
Based on the patch by Cameron Esfahani!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115479 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-03 22:02:38 +00:00
Chris Lattner
ece290226a unbreak buildbot
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115476 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-03 20:02:48 +00:00
Bill Wendling
8e956f7e3e Add test to make sure that the MMX intrinsic calls make it out the other end in
tact.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115458 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-03 03:30:30 +00:00
Bill Wendling
43c78cda10 Need to specify SSE4 for machines which don't have SSE4. The code checked for is generated by SSE4. Otherwise, we get something else.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115352 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01 21:39:35 +00:00
Bill Wendling
273ac840bc We must check for something.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115309 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01 10:20:10 +00:00
Bill Wendling
c160218081 Disable tests until I can figure out why they're failing on just two machines but not others.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115308 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01 10:01:10 +00:00
Bill Wendling
cc958c928f Try adding an mtriple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115307 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01 09:40:50 +00:00
Bill Wendling
b1170f0e62 FileCheck-ize this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115304 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01 08:55:48 +00:00
Bill Wendling
2b0ab5c370 FileCheck-ize this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115303 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01 08:50:12 +00:00
Chris Lattner
2831a19495 fix rdar://8494845 + PR8244 - a miscompile exposed by my patch in r101350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115294 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01 05:36:09 +00:00
Dale Johannesen
b0ab5d04dd One more +sse2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115293 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01 05:08:18 +00:00
Dale Johannesen
5db1eea91a Mark all these as needing SSE2. Should fix PPC and
maybe even Linux.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115291 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01 04:17:55 +00:00
Dale Johannesen
81a0b9e41c Disable these tests for now; it's not obvious why they fail on Linux.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115257 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01 00:59:21 +00:00
Dale Johannesen
9efef89b80 Make test not sensitive to register choice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115250 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01 00:16:17 +00:00
Dale Johannesen
0488fb649a Massive rewrite of MMX:
The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.

Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics. 

MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces.  Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.

The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115243 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-30 23:57:10 +00:00
NAKAMURA Takumi
929910925d test/CodeGen/X86/sibcall.ll: Add explicit triplets and remove XFAIL: apple-darwin8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115215 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-30 22:02:06 +00:00
Jakob Stoklund Olesen
7eb589d3f9 Try again to disable critical edge splitting in CodeGenPrepare.
The bug that broke i386 linux has been fixed in r115191.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115204 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-30 20:51:52 +00:00
Jakob Stoklund Olesen
2622f4622c When isel is emitting instructions for an x86 target without CMOV, the CFG is
edited during emission.

If the basic block ends in a switch that gets lowered to a jump table, any
phis at the default edge were getting updated wrong. The jump table data
structure keeps a pointer to the header blocks that wasn't getting updated
after the MBB is split.

This bug was exposed on 32-bit Linux when disabling critical edge splitting in
codegen prepare.

The fix is to uipdate stale MBB pointers whenever a block is split during
emission.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115191 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-30 19:44:31 +00:00
Bill Wendling
e48155b25a And remove r114997's test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115003 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-28 23:24:18 +00:00
Bill Wendling
2ff6e1e62c Revert r114997. It was causing a failure on darwin10-selfhost.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115002 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-28 23:11:55 +00:00
Bill Wendling
4edab1a9e8 Fix a FIXME. _foo.eh symbols are currently always exported so that the linker
knows about them. This is not necessary on 10.6 and later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114997 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-28 22:36:56 +00:00
Jakob Stoklund Olesen
08342f2d11 Revert "Disable codegen prepare critical edge splitting. Machine instruction passes now"
This reverts revision 114633. It was breaking llvm-gcc-i386-linux-selfhost.

It seems there is a downstream bug that is exposed by
-cgp-critical-edge-splitting=0. When that bug is fixed, this patch can go back
in.

Note that the changes to tailcallfp2.ll are not reverted. They were good are
required.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114859 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-27 18:43:48 +00:00
Evan Cheng
dd3a41a6b3 Disable codegen prepare critical edge splitting. Machine instruction passes now
break critical edges on demand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114633 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-23 06:55:34 +00:00
Owen Anderson
ed1088afb5 A select between a constant and zero, when fed by a bit test, can be efficiently
lowered using a series of shifts.
Fixes <rdar://problem/8285015>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114599 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 22:58:22 +00:00
Cameron Esfahani
4af1eaee70 Fix PR8201: Update the code to call via X86::CALL64pcrel32 in the 64-bit case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114597 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 22:35:21 +00:00
Chris Lattner
1eb1b68e3a Fix an inconsistency in the x86 backend that led it to reject "calll foo" on
x86-32: 32-bit calls were named "call" not "calll".  64-bit calls were correctly
named "callq", so this only impacted x86-32.

This fixes rdar://8456370 - llvm-mc rejects 'calll'

This also exposes that mingw/64 is generating a 32-bit call instead of a 64-bit call,
I will file a bugzilla.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114534 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 05:49:14 +00:00
Chris Lattner
f93b90c5df reimplement elf TLS support in terms of addressing modes, eliminating SegmentBaseAddress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114529 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 04:39:11 +00:00
Chris Lattner
40d66052f4 linux has a different stack alignment than the mac, relax this a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114519 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 00:46:26 +00:00
Chris Lattner
8864155a35 give VZEXT_LOAD a memory operand, it now works with segment registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114515 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 00:34:38 +00:00
Chris Lattner
0b79cfee15 revert r114386 now that address modes work correctly, we get a nice
call through gs-relative memory now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114510 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 00:11:31 +00:00
Chris Lattner
93c4a5bef7 give LCMPXCHG_DAG[8] a memory operand, allowing it to work with addrspace 256/257
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114508 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 23:59:42 +00:00
Chris Lattner
b72d53d8ef filecheckize
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114507 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 23:57:27 +00:00
Devang Patel
161f0caaf9 Use FileCheck
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114475 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 20:50:32 +00:00
Owen Anderson
c004eec71b When adding the carry bit to another value on X86, exploit the fact that the carry-materialization
(sbbl x, x) sets the registers to 0 or ~0.  Combined with two's complement arithmetic, we can fold
the intermediate AND and the ADD into a single SUB.

This fixes <rdar://problem/8449754>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114460 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 18:41:19 +00:00
Chris Lattner
08bad54baf fix rdar://8453210, a crash handling a call through a GS relative load.
For now, just disable folding the load into the call.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114386 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 03:37:00 +00:00
Evan Cheng
44be1a8d66 Enable machine sinking critical edge splitting. e.g.
define double @foo(double %x, double %y, i1 %c) nounwind {
  %a = fdiv double %x, 3.2
  %z = select i1 %c, double %a, double %y
  ret double %z
}

Was:
_foo:
        divsd   LCPI0_0(%rip), %xmm0
        testb   $1, %dil
        jne     LBB0_2
        movaps  %xmm1, %xmm0
LBB0_2:
        ret

Now:
_foo:
        testb   $1, %dil
        je      LBB0_2
        divsd   LCPI0_0(%rip), %xmm0
        ret
LBB0_2:
        movaps  %xmm1, %xmm0
        ret

This avoids the divsd when early exit is taken.
rdar://8454886


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114372 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-20 22:52:00 +00:00
Owen Anderson
4a9f150926 When TCO is turned on, it is possible to end up with aliasing FrameIndex's. Therefore,
CombinerAA cannot assume that different FrameIndex's never alias, but can instead use
MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing.

This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll
when CombinerAA is enabled, modulo a different register allocation sequence.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114348 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-20 20:39:59 +00:00
NAKAMURA Takumi
e6af80d11d test/CodeGen/X86: Add explicit triplet -mtriple=i686-linux to 3 tests incompatible to Win32 codegen.
r114297 raises 3 failures. They might fail also on mingw.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114317 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-19 21:58:55 +00:00
Owen Anderson
14ac1dd2be Invert the logic of reachesChainWithoutSideEffects(). What we want to check is that there is
NO path to the destination containing side effects, not that SOME path contains no side effects.
In  practice, this only manifests with CombinerAA enabled, because otherwise the chain has little
to no branching, so "any" is effectively equivalent to "all".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114268 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-18 04:45:14 +00:00
Evan Cheng
6edb0eac87 Teach machine sink to
1) Do forward copy propagation. This makes it easier to estimate the cost of the
   instruction being sunk.
2) Break critical edges on demand, including cases where the value is used by
   PHI nodes.
Critical edge splitting is not yet enabled by default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114227 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-17 22:28:18 +00:00
Dan Gohman
d8c0a51362 Avoid emitting a PIC base register if no PIC addresses are needed.
This fixes rdar://8396318.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114201 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-17 20:24:24 +00:00
Dale Johannesen
677c6ecd08 When substituting sunkaddrs into indirect arguments an asm, we were
walking the asm arguments once and stashing their Values.  This is
wrong because the same memory location can be in the list twice, and
if the first one has a sunkaddr substituted, the stashed value for the
second one will be wrong (use-after-free).  PR 8154.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114104 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-16 18:30:55 +00:00
Bruno Cardoso Lopes
ae4f7421c0 Add one more pattern to fallback movddup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113522 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-09 18:48:34 +00:00
Devang Patel
af3c8024b1 remove these tests for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113293 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 22:03:44 +00:00
Devang Patel
1dde7c257a There is no need to force target if the test is going to run on other x86 platforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113285 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 20:59:09 +00:00
Devang Patel
49be606954 Fix command line used to link these test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113237 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 18:17:56 +00:00
Devang Patel
fa7f82ce5c Reintroduce dbg-declare tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113232 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 18:01:49 +00:00
Devang Patel
1fa4a97624 Remove last three tests. I need to make them independent of my setup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113213 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 17:08:57 +00:00
Devang Patel
85b0258e64 Add a test case to check handling of dbg-declare during hybrid mode where we begin using fast-isel but switch back to DAG building at some point.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113210 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 17:03:44 +00:00
Devang Patel
5a0f9bf63e Add a test case to check handling of dbg-declare by selection DAG builder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113209 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 16:56:35 +00:00
Devang Patel
db44c12b85 Add a test case to check handling of dbg-declare by fast-isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113208 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 16:40:53 +00:00
Chris Lattner
beac75da37 implement rdar://6653118 - fastisel should fold loads where possible.
Since mem2reg isn't run at -O0, we get a ton of reloads from the stack,
for example, before, this code:

int foo(int x, int y, int z) {
  return x+y+z;
}

used to compile into:

_foo:                                   ## @foo
	subq	$12, %rsp
	movl	%edi, 8(%rsp)
	movl	%esi, 4(%rsp)
	movl	%edx, (%rsp)
	movl	8(%rsp), %edx
	movl	4(%rsp), %esi
	addl	%edx, %esi
	movl	(%rsp), %edx
	addl	%esi, %edx
	movl	%edx, %eax
	addq	$12, %rsp
	ret

Now we produce:

_foo:                                   ## @foo
	subq	$12, %rsp
	movl	%edi, 8(%rsp)
	movl	%esi, 4(%rsp)
	movl	%edx, (%rsp)
	movl	8(%rsp), %edx
	addl	4(%rsp), %edx    ## Folded load
	addl	(%rsp), %edx     ## Folded load
	movl	%edx, %eax
	addq	$12, %rsp
	ret

Fewer instructions and less register use = faster compiles.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113102 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-05 02:18:34 +00:00
Dale Johannesen
caa9ba228d Remove the rest of the nonexistent 64-bit AVX instructions.
Bruno, please review.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113014 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 21:23:00 +00:00
NAKAMURA Takumi
9dceb1305c test/CodeGen/X86: Add explicit -mtriple=(i686|x86_64)-linux for Win32 host.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112947 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 03:24:08 +00:00
Bruno Cardoso Lopes
95f1e2d6b5 AVX doesn't support mm operations neither its instrinsics.
The AVX versions of PALIGN and PABS* should only exist for
128-bit. Remove the unnecessary stuff.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112944 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 02:08:45 +00:00
Anton Korobeynikov
ace53f2fbc Properly emit __chkstk call instead of __alloca on non-mingw windows targets.
Patch by Cameron Esfahani!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112902 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 23:03:46 +00:00
Dan Gohman
24bde5bce1 Don't narrow the load and store in a load+twiddle+store sequence unless
there are clearly no stores between the load and the store. This fixes
this miscompile reported as PR7833.

This breaks the test/CodeGen/X86/narrow_op-2.ll optimization, which is
safe, but awkward to prove safe. Move it to X86's README.txt.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112861 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 21:18:42 +00:00
NAKAMURA Takumi
b51633b476 test/loop-strength-reduce4: Add explicit triplet for Win32 host.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112802 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 03:45:58 +00:00
NAKAMURA Takumi
fd03a5124d test/twoaddr-coalesce: Do not use @main.
Win32 codegen emits implicit invoking __main into, to fail.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112801 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 03:45:51 +00:00
Bruno Cardoso Lopes
29c353b9c3 Using target specific nodes for shuffle nodes makes the mask
check more strict, breaking some cases not checked in the
testsuite, but also exposes some foldings not done before,
as this example:

  movaps  (%rdi), %xmm0
  movaps  (%rax), %xmm1
  movaps  %xmm0, %xmm2
  movss %xmm1, %xmm2
  shufps  $36, %xmm2, %xmm0

now is generated as:

  movaps  (%rdi), %xmm0
  movaps  %xmm0, %xmm1
  movlps  (%rax), %xmm1
  shufps  $36, %xmm1, %xmm0



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112753 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01 22:33:20 +00:00
Jakob Stoklund Olesen
0077114efc Teach RemoveCopyByCommutingDef to check all aliases, not just subregisters.
This caused a miscompilation in WebKit where %RAX had conflicting defs when
RemoveCopyByCommutingDef was commuting a %EAX use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112751 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01 22:15:35 +00:00
Dan Gohman
191bd64a39 Revert 112442 and 112440 until the compile time problems introduced
by 112440 are resolved.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112692 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01 01:45:53 +00:00
Chris Lattner
1875ce4ad9 two changes:
1) nuke ConstDataCoalSection, which is dead.
2) revise my previous patch for rdar://8018335,
  which was completely wrong.  Specifically, it doesn't 
  make sense to mark __TEXT,__const_coal as PURE_INSTRUCTIONS,
  because it is for readonly data.  templates (it turns out)
  go to const_coal_nt.  The real fix for rdar://8018335 was
  to give ConstTextCoalSection a section kind of ReadOnly 
  instead of Text.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112496 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-30 18:12:35 +00:00
Duncan Sands
cdd4f8c7cb Correct bogus module triple specifications.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112469 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-30 10:48:29 +00:00
Dan Gohman
eaa40ff74e Make IVUsers iterative instead of recursive.
This has the side effect of reversing the order of most of
IVUser's results.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112442 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-29 16:40:03 +00:00
Dan Gohman
2b5258c5f9 Make this test less dependent on register allocation choices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112426 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-29 14:49:42 +00:00
Chris Lattner
82457d08f9 merge a bunch of shuffle tests into sse2.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112398 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-29 03:19:04 +00:00
Chris Lattner
c19b9477c9 add some nounwind's
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112396 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-29 03:07:47 +00:00
Chris Lattner
24faf611a3 fix the buildvector->insertp[sd] logic to not always create a redundant
insertp[sd] $0, which is a noop.  Before:

_f32:                                   ## @f32
	pshufd	$1, %xmm1, %xmm2
	pshufd	$1, %xmm0, %xmm3
	addss	%xmm2, %xmm3
	addss	%xmm1, %xmm0
                                        ## kill: XMM0<def> XMM0<kill> XMM0<def>
	insertps	$0, %xmm0, %xmm0
	insertps	$16, %xmm3, %xmm0
	ret

after:

_f32:                                   ## @f32
	movdqa	%xmm0, %xmm2
	addss	%xmm1, %xmm2
	pshufd	$1, %xmm1, %xmm1
	pshufd	$1, %xmm0, %xmm3
	addss	%xmm1, %xmm3
	movdqa	%xmm2, %xmm0
	insertps	$16, %xmm3, %xmm0
	ret

The extra movs are due to a random (poor) scheduling decision.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112379 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-28 17:59:08 +00:00
Chris Lattner
3ddcc43040 fix the BuildVector -> unpcklps logic to not do pointless shuffles
when the top elements of a vector are undefined.  This happens all
the time for X86-64 ABI stuff because only the low 2 elements of
a 4 element vector are defined.  For example, on:

_Complex float f32(_Complex float A, _Complex float B) {
  return A+B;
}

We used to produce (with SSE2, SSE4.1+ uses insertps):

_f32:                                   ## @f32
	movdqa	%xmm0, %xmm2
	addss	%xmm1, %xmm2
	pshufd	$16, %xmm2, %xmm2
	pshufd	$1, %xmm1, %xmm1
	pshufd	$1, %xmm0, %xmm0
	addss	%xmm1, %xmm0
	pshufd	$16, %xmm0, %xmm1
	movdqa	%xmm2, %xmm0
	unpcklps	%xmm1, %xmm0
	ret

We now produce:

_f32:                                   ## @f32
	movdqa	%xmm0, %xmm2
	addss	%xmm1, %xmm2
	pshufd	$1, %xmm1, %xmm1
	pshufd	$1, %xmm0, %xmm3
	addss	%xmm1, %xmm3
	movaps	%xmm2, %xmm0
	unpcklps	%xmm3, %xmm0
	ret

This implements rdar://8368414


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112378 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-28 17:28:30 +00:00
Dan Gohman
badcda4afa Completely disable tail calls when fast-isel is enabled, as fast-isel
doesn't currently support dealing with this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112341 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-28 00:51:03 +00:00
Chris Lattner
e197fd5182 get this test passing on linux builders.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112280 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-27 18:49:08 +00:00
Daniel Dunbar
d8d36e61fd X86: Fix an encoding issue with LOCK_ADD64mr, which could lead to very hard to find miscompiles with the integrated assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112250 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-27 01:30:14 +00:00
Chris Lattner
341fa09a3c Add a hackaround for PR7993 which is causing failures on x86 builders that lack sse2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112175 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26 06:57:07 +00:00
Chris Lattner
4bbdb4c78c I think enough general codegen bugs are fixed to allow this to work
on random hosts, lets see!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112172 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26 05:52:42 +00:00
Chris Lattner
8306968c14 implement SplitVecOp_CONCAT_VECTORS, fixing the included testcase with SSE1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112171 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26 05:51:22 +00:00
Chris Lattner
8de3bdb16a Make sure this forces the x86 targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112169 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26 05:25:05 +00:00
Chris Lattner
97a2a56f43 fix sse1 only codegen in x86-64 mode, which is something we
apparently try to support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112168 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26 05:24:29 +00:00
Chris Lattner
c87a6d4fb0 temporarily disable this, which started failing on the llvm-i686-linux
builder.  I will investigate tonight.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112113 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25 23:43:14 +00:00
Chris Lattner
e6f7c267df Change handling of illegal vector types to widen when possible instead of
expanding: e.g. <2 x float> -> <4 x float> instead of -> 2 floats.  This
affects two places in the code: handling cross block values and handling
function return and arguments.  Since vectors are already widened by 
legalizetypes, this gives us much better code and unblocks x86-64 abi
and SPU abi work.

For example, this (which is a silly example of a cross-block value):
define <4 x float> @test2(<4 x float> %A) nounwind {
 %B = shufflevector <4 x float> %A, <4 x float> undef, <2 x i32> <i32 0, i32 1>
 %C = fadd <2 x float> %B, %B
  br label %BB
BB:
 %D = fadd <2 x float> %C, %C
 %E = shufflevector <2 x float> %D, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
 ret <4 x float> %E
}

Now compiles into:

_test2:                                 ## @test2
## BB#0:
 addps %xmm0, %xmm0
 addps %xmm0, %xmm0
 ret

previously it compiled into:

_test2:                                 ## @test2
## BB#0:
 addps %xmm0, %xmm0
 pshufd $1, %xmm0, %xmm1
                                        ## kill: XMM0<def> XMM0<kill> XMM0<def>
 insertps $0, %xmm0, %xmm0
 insertps $16, %xmm1, %xmm0
 addps %xmm0, %xmm0
 ret

This implements rdar://8230384



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112101 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25 22:49:25 +00:00
Bruno Cardoso Lopes
ddd10affab Convert test to use filecheck and make it more specific
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112016 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25 01:47:16 +00:00
Dan Gohman
92b651fb19 Fix X86's isLegalAddressingMode to recognize that static addresses
need not be RIP-relative in small mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111917 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24 15:55:12 +00:00
Chris Lattner
d80c7e1232 Add a new llvm.x86.int intrinsic, allowing access to the
x86 int and int3 instructions.  Patch by Peter Housel!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111831 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-23 19:39:25 +00:00
Dan Gohman
8bef744518 Fix x86 fast-isel's cmp+branch folding to avoid folding when the
comparison is in a different basic block from the branch. In such
cases, the comparison's operands may not have initialized virtual
registers available.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111709 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-21 02:32:36 +00:00
Evan Cheng
e5e7946018 It's possible to sink a def if its local uses are PHI's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111537 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-19 18:33:29 +00:00
Dan Gohman
4a8d7db6cf When sending stats output to stdout for grepping, don't emit normal
output to standard output also.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111401 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-18 20:32:46 +00:00
Dan Gohman
bbc1da8ded Tweak IVUsers' concept of "interesting" to exclude add recurrences
where the step value is an induction variable from an outer loop, to
avoid trouble trying to re-expand such expressions. This effectively
hides such expressions from indvars and lsr, which prevents them
from getting into trouble.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111317 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17 22:50:37 +00:00
Evan Cheng
b9072fdaad Add nounwind.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111312 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17 22:35:20 +00:00
Dale Johannesen
6cf64a631a Make fast scheduler handle asm clobbers correctly.
PR 7882.  Follows suggestion by Amaury Pouly, thanks.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111306 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17 22:17:24 +00:00
Evan Cheng
97b9b97853 PHI elimination should not break back edge. It can cause some significant code placement issues. rdar://8263994
good:
LBB0_2:
  mov     r2, r0
  . . .
  mov     r1, r2
  bne     LBB0_2

bad:
LBB0_2:
  mov     r2, r0
  . . .
@ BB#3:
  mov     r1, r2
  b       LBB0_2


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111221 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17 01:20:36 +00:00
Benjamin Kramer
bde87c4d2a Test expects SSE, give him SSE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111115 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-15 23:32:03 +00:00
Benjamin Kramer
1d81e0eed3 Restore arch on these test, they fail on arm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111109 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-15 20:42:56 +00:00
Dale Johannesen
a01818c292 Mark as XFAIL on darwin 8. PR 7886.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111108 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-15 19:40:29 +00:00
Dale Johannesen
1b4051095d Revert 110491. While not wrong, it was based on a
misanalysis and is undesirable.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111028 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13 18:43:45 +00:00
Bruno Cardoso Lopes
642eb02045 - Teach SSEDomainFix to switch between different levels of AVX instructions. Here we guess that AVX will have domain issues, so just implement them for consistency and in the future we remove if it's unnecessary.
- Make foldMemoryOperandImpl aware of 256-bit zero vectors folding and support the 128-bit counterparts of AVX too.
- Make sure MOV[AU]PS instructions are only selected when SSE1 is enabled, and duplicate the patterns to match AVX.
- Add a testcase for a simple 128-bit zero vector creation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110946 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 20:20:53 +00:00
Bruno Cardoso Lopes
8c05a850f4 Begin to support some vector operations for AVX 256-bit intructions. The long
term goal here is to be able to match enough of vector_shuffle and build_vector
so all avx intrinsics which aren't mapped to their own built-ins but to
shufflevector calls can be codegen'd. This is the first (baby) step, support
building zeroed vectors.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110897 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 02:06:36 +00:00
Devang Patel
fd56f3c91a This is x86 only test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110887 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 00:17:38 +00:00
Bruno Cardoso Lopes
4fd393cc26 Add testcases for all AVX 256-bit intrinsics added in the last couple days
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110854 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 21:12:09 +00:00
Bruno Cardoso Lopes
1d72aeebf9 Reapply r109881 using a more strict command line for llc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110833 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 17:39:23 +00:00
Jakob Stoklund Olesen
dc0830947a Fix test for more architectures. Patch by Tobias Grosser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110685 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-10 16:48:24 +00:00
Tobias Grosser
0e28b1507f Fix failing testcase.
Those look like typos to me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110664 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-10 09:54:29 +00:00
Devang Patel
2936807564 Handle TAG_constant for integers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110656 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-10 07:11:13 +00:00
Dale Johannesen
7f6eb639bd Use sdmem and sse_load_f64 (etc.) for the vector
form of CMPSD (etc.)  Matching a 128-bit memory
operand is wrong, the instruction uses only 64 bits
(same as ADDSD etc.)  8193553.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110491 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-07 00:33:42 +00:00
Eric Christopher
e74a088d92 Add an option to always emit realignment code for a particular module.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110404 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-05 23:57:43 +00:00
Devang Patel
baefea4498 Move x86 specific tests into test/CodeGen/X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110372 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-05 20:25:37 +00:00
Dan Gohman
a34c885d51 Move x86-specific tests out of test/Transforms/LoopStrengthReduce and
into test/CodeGen/X86, so that they aren't run when the x86 target is
not enabled.

Fix uglygep.ll to not be x86-specific.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110343 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-05 17:04:15 +00:00
Daniel Dunbar
feaac8f7ff tests: CodeGen/X86/GC tests require X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110338 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-05 15:45:33 +00:00
Bill Wendling
af33b7b4a7 The lower invoke pass needs to have unreachable code elimination run after it
because it could create such things. This fixes a MingW buildbot test failure.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110279 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-04 23:36:02 +00:00
Eli Friedman
7752442bfa PR7814: Truncates cannot be ignored for signed comparisons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110268 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-04 22:40:58 +00:00
Stuart Hastings
b884666a38 call-imm.ll test case regex fix. Patch by Dimitry Andric!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110199 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-04 15:31:35 +00:00
Jakob Stoklund Olesen
0055f97f72 OK, that's it. This test is going away now. But don't worry, I am taking it to a
nice farm in the country where it can play with other tests. And bunnies.

It is not clear what is being tested, and the revision history shows a bunch of
random changes to the expected instruction count. Clearly, we are just fudging
it to pass whenever it fails.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110118 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-03 17:21:14 +00:00
Bob Wilson
6945ef380c Revert new AVX intrinsic tests. They are breaking buildbots and Bruno is
away from a computer now.
--- Reverse-merging r109881 into '.':
D    test/CodeGen/X86/avx-intrinsics-x86.ll
D    test/CodeGen/X86/avx-intrinsics-x86_64.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109959 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-31 22:36:03 +00:00
Bruno Cardoso Lopes
74273b8822 A *bunch* of tests for AVX intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109881 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-30 19:57:56 +00:00
Eli Friedman
ad78a88711 Fix for bug reported by Evzen Muller on llvm-commits: make sure to correctly
check the range of the constant when optimizing a comparison between a
constant and a sign_extend_inreg node.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109854 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-30 06:44:31 +00:00
Nate Begeman
51409214d7 Implement a vectorized algorithm for <16 x i8> << <16 x i8>
This is about 4x faster and smaller than the existing scalarization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109566 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-28 00:21:48 +00:00
Nate Begeman
bdcb5afb77 ~40% faster vector shl <4 x i32> on SSE 4.1 Larger improvements for smaller types coming in future patches.
For:

define <2 x i64> @shl(<4 x i32> %r, <4 x i32> %a) nounwind readnone ssp {
entry:
  %shl = shl <4 x i32> %r, %a                     ; <<4 x i32>> [#uses=1]
  %tmp2 = bitcast <4 x i32> %shl to <2 x i64>     ; <<2 x i64>> [#uses=1]
  ret <2 x i64> %tmp2
}

We get:

_shl:                                   ## @shl
	pslld	$23, %xmm1
	paddd	LCPI0_0, %xmm1
	cvttps2dq	%xmm1, %xmm1
	pmulld	%xmm1, %xmm0
	ret

Instead of:

_shl:                                   ## @shl
	pshufd	$3, %xmm0, %xmm2
	movd	%xmm2, %eax
	pshufd	$3, %xmm1, %xmm2
	movd	%xmm2, %ecx
	shll	%cl, %eax
	movd	%eax, %xmm2
	pshufd	$1, %xmm0, %xmm3
	movd	%xmm3, %eax
	pshufd	$1, %xmm1, %xmm3
	movd	%xmm3, %ecx
	shll	%cl, %eax
	movd	%eax, %xmm3
	punpckldq	%xmm2, %xmm3
	movd	%xmm0, %eax
	movd	%xmm1, %ecx
	shll	%cl, %eax
	movd	%eax, %xmm2
	movhlps	%xmm0, %xmm0
	movd	%xmm0, %eax
	movhlps	%xmm1, %xmm1
	movd	%xmm1, %ecx
	shll	%cl, %eax
	movd	%eax, %xmm0
	punpckldq	%xmm0, %xmm2
	movdqa	%xmm2, %xmm0
	punpckldq	%xmm3, %xmm0
	ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109549 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-27 22:37:06 +00:00
Dan Gohman
cd20c6fb18 Use the proper type for shift counts. This fixes a bootstrap error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109265 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 21:08:12 +00:00
Dan Gohman
a4f4d699ec DAGCombine (shl (anyext x, c)) to (anyext (shl x, c)) if the high bits
are not demanded. This often allows the anyext to be folded away.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109242 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 18:03:30 +00:00
Eric Christopher
9a9d275dc7 Custom lower the memory barrier instructions and add support
for lowering without sse2.  Add a couple of new testcases.

Fixes a few libgomp tests and latent bugs.  Remove a few todos.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109078 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22 02:48:34 +00:00
Dan Gohman
fc3678a346 Fix SCEV denormalization of expressions where the exit value from
one loop is involved in the increment of an addrec for another
loop. This fixes rdar://8168938.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108863 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 17:06:20 +00:00
Duncan Sands
6bf8eee264 The same problem was being tracked in PR7652.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108843 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 15:52:32 +00:00
Dan Gohman
c6e59b71f5 After a custom inserter, in a block which has constant instructions,
update the current basic block in addition to the current insert
position, so that they remain consistent. This fixes rdar://8204072.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108765 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 22:48:56 +00:00
Owen Anderson
54026c0f1b Remove r108639 now that it is handled by InstCombine instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108688 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 08:10:24 +00:00
Owen Anderson
fd73c9162e Add a testcase for r108639.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108640 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-18 08:57:19 +00:00
Bill Wendling
dc86704114 Consider this function:
void foo() { __builtin_unreachable(); }

It will output the following on Darwin X86:

_func1:
Leh_func_begin0:
        pushq %rbp
Ltmp0:
        movq %rsp, %rbp
Ltmp1:
Leh_func_end0:

This prolog adds a new Call Frame Information (CFI) row to the FDE with an
address that is not within the address range of the code it describes -- part is
equal to the end of the function -- and therefore results in an invalid EH
frame. If we emit a nop in this situation, then the CFI row is now within the
address range.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108568 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-16 22:51:10 +00:00
Jakob Stoklund Olesen
468a2a44e2 Remove the X86::FP_REG_KILL pseudo-instruction and the X86FloatingPointRegKill
pass that inserted it.

It is no longer necessary to limit the live ranges of FP registers to a single
basic block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108536 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-16 17:41:44 +00:00
Jakob Stoklund Olesen
18c479c600 Add forgotten test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108506 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-16 04:45:35 +00:00
Dan Gohman
e667e01723 Use the source-order scheduler instead of the "fast" scheduler at -O0,
because it's more likely to keep debug line information in its original
order.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108496 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-16 02:01:19 +00:00
Bill Wendling
a60f0e7f81 Revert. This isn't the correct way to go.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108478 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-15 23:42:21 +00:00
Bill Wendling
e9bf7e692e Handle code gen for the unreachable instruction if it's the only instruction in
the function. We'll just turn it into a "trap" instruction instead.

The problem with not handling this is that it might generate a prologue without
the equivalent epilogue to go with it:

$ cat t.ll
define void @foo() {
entry:
  unreachable
}
$ llc -o - t.ll -relocation-model=pic -disable-fp-elim -unwind-tables
        .section        __TEXT,__text,regular,pure_instructions
        .globl  _foo
        .align  4, 0x90
_foo:                                   ## @foo
Leh_func_begin0:
## BB#0:                                ## %entry
        pushq   %rbp
Ltmp0:
        movq    %rsp, %rbp
Ltmp1:
Leh_func_end0:
...

The unwind tables then have bad data in them causing all sorts of problems.

Fixes <rdar://problem/8096481>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108473 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-15 23:32:40 +00:00
Evan Cheng
60108e96bb Split -enable-finite-only-fp-math to two options:
-enable-no-nans-fp-math and -enable-no-infs-fp-math. All of the current codegen fp math optimizations only care whether the fp arithmetics arguments and results can never be NaN.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108465 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-15 22:07:12 +00:00
Chris Lattner
6a624a65f4 fix the definitions of ConstTextCoalSection/ConstDataCoalSection
to keep "Text" in sync with the "pure instructions" section attribute.
Lack of this attribute was preventing the assembler from emitting
multibyte noops instructions for templates (and inlines, and other
coalesced stuff) and was causing the assembler to mismatch .o files.

This fixes rdar://8018335



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108461 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-15 21:22:00 +00:00
Devang Patel
07538ad975 Fix crash reported in PR7653.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108441 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-15 18:45:27 +00:00
Dan Gohman
c88c1a4581 Watch out for a constant offset cancelling out a base register, forming
a zero. This situation arrises in Fortran code with induction variables
that start at 1 instead of 0. This fixes PR7651.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108424 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-15 15:14:45 +00:00
Devang Patel
c7c601ea5a Make it a .ll test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108370 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-14 23:12:52 +00:00
Dan Gohman
2dd50e656f Delete fast-isel's trivial load optimization; it breaks debugging because
it can look past points where a debugger might modify user variables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108336 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-14 17:25:37 +00:00
Evan Cheng
dedd974e7e Fix for PR7193 was overly conservative. The only case where sibcall callee
address cannot be allocated a register is in 32-bit mode where the first
three arguments are marked inreg. In that case EAX, EDX, and ECX will be
used for argument passing.

This fixes PR7610.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108327 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-14 06:44:01 +00:00
Evan Cheng
44a44ad3bc Re-enable the test with fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108319 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-14 05:49:23 +00:00
Chris Lattner
f4e594740f temporarily disable to test to fix buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-14 02:21:59 +00:00
Evan Cheng
db89809037 Teach ProcessImplicitDefs to transform more COPY instructions into IMPLICIT_DEF (and subsequently eliminate them). This allows machine LICM to hoist IMPLICIT_DEF's. PR7620.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108304 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-14 01:22:19 +00:00
Dale Johannesen
b5611a6230 In inline asm treat indirect 'X' constraint as 'm'.
This may not be right in all cases, but it's better
than asserting which it was doing before.  PR 7528.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108268 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-13 20:17:05 +00:00
Evan Cheng
ea4cdb7ead -enable-unsafe-fp-math should not imply -enable-finite-only-fp-math.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108254 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-13 18:46:14 +00:00
Dale Johannesen
24bb7bdb1e Fix PR number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108251 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-13 18:14:47 +00:00
Dan Gohman
cfbf0ed8b0 Apply the SSE dependence idiom for SSE unary operations to
SD instructions too, in addition to SS instructions. And
add a comment about it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108191 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-12 20:46:04 +00:00
Dan Gohman
e695de0c5f Fix this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108059 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 22:42:12 +00:00
Jakob Stoklund Olesen
5d6f892197 FileCheckize inline asm FP stack tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108046 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 16:30:25 +00:00
Dan Gohman
84023e0fbe Reapply bottom-up fast-isel, with several fixes for x86-32:
- Check getBytesToPopOnReturn().
 - Eschew ST0 and ST1 for return values.
 - Fix the PIC base register initialization so that it doesn't ever
   fail to end up the top of the entry block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108039 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 09:00:22 +00:00
Jakob Stoklund Olesen
9c50e8b890 Fix a few tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108011 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 20:43:09 +00:00
Dan Gohman
f870e566ee Add a target triple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108003 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 19:17:36 +00:00
Dan Gohman
aa7426070d Fix MachineLICM to actually visit inner loops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108001 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 18:49:45 +00:00
Bob Wilson
02266e29f9 --- Reverse-merging r107947 into '.':
U    utils/TableGen/FastISelEmitter.cpp
--- Reverse-merging r107943 into '.':
U    test/CodeGen/X86/fast-isel.ll
U    test/CodeGen/X86/fast-isel-loads.ll
U    include/llvm/Target/TargetLowering.h
U    include/llvm/Support/PassNameParser.h
U    include/llvm/CodeGen/FunctionLoweringInfo.h
U    include/llvm/CodeGen/CallingConvLower.h
U    include/llvm/CodeGen/FastISel.h
U    include/llvm/CodeGen/SelectionDAGISel.h
U    lib/CodeGen/LLVMTargetMachine.cpp
U    lib/CodeGen/CallingConvLower.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
U    lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
U    lib/CodeGen/SelectionDAG/FastISel.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
U    lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
U    lib/CodeGen/SelectionDAG/InstrEmitter.cpp
U    lib/CodeGen/SelectionDAG/TargetLowering.cpp
U    lib/Target/XCore/XCoreISelLowering.cpp
U    lib/Target/XCore/XCoreISelLowering.h
U    lib/Target/X86/X86ISelLowering.cpp
U    lib/Target/X86/X86FastISel.cpp
U    lib/Target/X86/X86ISelLowering.h


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107987 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 16:37:18 +00:00
Dan Gohman
bf87e24917 Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emitting
a DBG_VALUE after a terminator, or emitting any instructions before an EH_LABEL.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107943 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 00:39:23 +00:00
Bill Wendling
c930cbcada Extension of r107506. Make sure that we don't mark a function as having a call
if the inline ASM doesn't need a stack frame.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107922 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-08 22:38:02 +00:00
Eric Christopher
fb31ccb68c A slight reworking of the custom patterns for x86-64 tpoff codegen and
correct the testcase for valid assembly.

Needs more tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107860 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-08 07:36:46 +00:00
Dan Gohman
f595141525 Revert 107840 107839 107813 107804 107800 107797 107791.
Debug info intrinsics win for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107850 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-08 01:00:56 +00:00
Jakob Stoklund Olesen
f2e4afd96c Allow copies between GR8_ABCD_L and GR8_ABCD_H.
This fixes PR7540.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107809 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-07 20:33:27 +00:00
Dan Gohman
4df83ed159 Implement bottom-up fast-isel. This has the advantage of not requiring
a separate DCE pass over MachineInstrs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107804 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-07 19:20:32 +00:00
Dan Gohman
f423a69839 Add X86FastISel support for return statements. This entails refactoring
a bunch of stuff, to allow the target-independent calling convention
logic to be employed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107800 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-07 18:32:53 +00:00
Dale Johannesen
e2b448c208 Accept RIP-relative symbols with 'i' constraint, and
print the (%rip) only if the 'a' modifier is present.
PR 7528.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107727 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-06 23:27:00 +00:00
Dale Johannesen
e6fd5ad6f4 Make test not hang waiting for input.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107721 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-06 23:06:58 +00:00
Jakob Stoklund Olesen
9c2e7ca351 Be more forgiving when calculating alias interference for physreg coalescing.
It is OK for an alias live range to overlap if there is a copy to or from the
physical register. CoalescerPair can work out if the copy is coalescable
independently of the alias.

This means that we can join with the actual destination interval instead of
using the getOrigDstReg() hack. It is no longer necessary to merge clobber
ranges into subregisters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107695 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-06 20:31:51 +00:00
Devang Patel
be35be614c Fix PR7545 crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107678 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-06 18:18:32 +00:00
Eric Christopher
7d26218ebe Remove mistakenly added test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107641 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-06 05:20:13 +00:00
Eric Christopher
f7a0c7bf8b Fix up -fstack-protector on linux to use the segment
registers.  Split out testcases per architecture and os
now.

Patch from Nelson Elhage.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107640 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-06 05:18:56 +00:00
Chris Lattner
11b3d1621d another v2f32 case, in this case showing poor codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107614 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-05 05:52:56 +00:00
Chris Lattner
4fd1ab3bec fix test on non-x86 hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107608 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-05 03:56:55 +00:00
Chris Lattner
f172ecd964 Just rip v2f32 support completely out of the X86 backend. In
the example in the testcase, we now generate:

_test1:                                 ## @test1
	movss	4(%esp), %xmm0
	addss	8(%esp), %xmm0
	movl	12(%esp), %eax
	movss	%xmm0, (%eax)
	ret

instead of:

_test1:                                                     ## @test1
	subl	$20, %esp
	movl	24(%esp), %eax
	movq	%mm0, (%esp)
	movq	%mm0, 8(%esp)
	movss	(%esp), %xmm0
	addss	12(%esp), %xmm0
	movss	%xmm0, (%eax)
	addl	$20, %esp
	ret

v2f32 support did not work reliably because most of the X86
backend didn't know it was legal.  It was apparently only added
to support returning source-level v2f32 values in MMX registers
in x86-32 mode.  If ABI compatibility is important on this
GCC-extended-vector type for some reason, then the frontend
should generate IR that returns v2i32 instead of v2f32.  However,
we generally don't try very hard to be abi compatible on gcc
extended vectors. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107601 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-04 23:07:25 +00:00
Chris Lattner
e35d9842f7 fix PR7518 - terrible codegen of <2 x float>, by only marking
v2f32 as legal in 32-bit mode.  It is just as terrible there,
but I just care about x86-64 and noone claims it is valuable
in 64-bit mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107600 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-04 22:57:10 +00:00
Evan Cheng
98ec91ea80 - Two-address pass should not assume unfolding is always successful.
- X86 unfolding should check if the instructions being unfolded has memoperands.
  If there is no memoperands, then it must assume conservative alignment. If this
  would introduce an expensive sse unaligned load / store, then unfoldMemoryOperand
  etc. should not unfold the instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107509 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02 20:36:18 +00:00
Dale Johannesen
f1e309eb48 Propagate the AlignStack bit in InlineAsm's to the
PrologEpilog code, and use it to determine whether
the asm forces stack alignment or not.  gcc consistently
does not do this for GCC-style asms; Apple gcc inconsistently
sometimes does it for asm blocks.  There is no
convenient place to put a bit in either the SDNode or
the MachineInstr form, so I've added an extra operand
to each; unlovely, but it does allow for expansion for
more bits, should we need it.  PR 5125.  Some
existing testcases are affected.
The operand lists of the SDNode and MachineInstr forms
are indexed with awesome mnemonics, like "2"; I may
fix this someday, but not now.  I'm not making it any
worse.  If anyone is inspired I think you can find all
the right places from this patch.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107506 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02 20:16:09 +00:00
Bill Wendling
5e721d7682 Implement the "linker_private_weak" linkage type. This will be used for
Objective-C metadata types which should be marked as "weak", but which the
linker will remove upon final linkage. However, this linkage isn't specific to
Objective-C.

For example, the "objc_msgSend_fixup_alloc" symbol is defined like this:

      .globl l_objc_msgSend_fixup_alloc
      .weak_definition l_objc_msgSend_fixup_alloc
      .section __DATA, __objc_msgrefs, coalesced
      .align 3
l_objc_msgSend_fixup_alloc:
       .quad   _objc_msgSend_fixup
       .quad   L_OBJC_METH_VAR_NAME_1

This is different from the "linker_private" linkage type, because it can't have
the metadata defined with ".weak_definition".

Currently only supported on Darwin platforms.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107433 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01 21:55:59 +00:00
Dan Gohman
63b95a6f82 Temporarily disable on-demand fast-isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107393 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01 12:15:30 +00:00
Dan Gohman
7fbcc98f20 Teach fast-isel to avoid loading a value from memory when it's already
available in a register. This is pretty primitive, but it reduces the
number of instructions in common testcases by 4%.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107380 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01 03:49:38 +00:00
Dan Gohman
20d4be151b Enable on-demand fast-isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107377 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01 02:58:57 +00:00
Dan Gohman
5c87bf64d6 Teach X86FastISel to fold constant offsets and scaled indices in
the same address.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107373 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01 02:27:15 +00:00
Dale Johannesen
a5989f8e22 In asm's, output operands with matching input constraints
have to be registers, per gcc documentation.  This affects
the logic for determining what "g" should lower to.  PR 7393.
A couple of existing testcases are affected.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107079 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-28 22:09:45 +00:00
Jakob Stoklund Olesen
61c35e835e Don't write temporary files in test directory
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107049 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-28 20:01:15 +00:00
Jakob Stoklund Olesen
0b9b85647c Add a triple so test runs on Linux as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107045 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-28 19:31:15 +00:00
Jakob Stoklund Olesen
d843b3925f Add more special treatment for inline asm in RegAllocFast.
When an instruction has tied operands and physreg defines, we must take extra
care that the tied operands conflict with neither physreg defs nor uses.

The special treatment is given to inline asm and instructions with tied operands
/ early clobbers and physreg defines.

This fixes PR7509.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107043 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-28 18:34:34 +00:00
Benjamin Kramer
a2938e7e5f Fix some tests that didn't test anything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106954 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-26 20:05:06 +00:00
Jakob Stoklund Olesen
4f5d84e4ad When creating X86 MUL8 and DIV8 instructions, make sure we don't produce
CopyFromReg nodes for aliasing registers (AX and AL). This confuses the fast
register allocator.

Instead of CopyFromReg(AL), use ExtractSubReg(CopyFromReg(AX), sub_8bit).

This fixes PR7312.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106934 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-26 00:39:23 +00:00
Dale Johannesen
1784d160e4 The hasMemory argument is irrelevant to how the argument
for an "i" constraint should get lowered; PR 6309.  While
this argument was passed around a lot, this is the only
place it was used, so it goes away from a lot of other
places.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106893 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 21:55:36 +00:00
Dan Gohman
ca5b8553ea pcmpeqd and friends are Commutable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106886 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 21:05:35 +00:00
Bill Wendling
730c07e50d - Reapply r106066 now that the bzip2 build regression has been fixed.
- 2010-06-25-CoalescerSubRegDefDead.ll is the testcase for r106878.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106880 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 20:48:10 +00:00
Dan Gohman
1cf753c87d Don't write an output file to cwd, and put an rdar prefix on
an rdar number.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106810 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 23:45:15 +00:00
Dan Gohman
fe5e4dabbf Teach EmitLiveInCopies to omit copies for unused virtual registers,
and to clean up unused incoming physregs from the live-in list.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106805 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 22:23:02 +00:00
Dale Johannesen
e5ff9ef195 Disallow matching "i" constraint to symbol addresses when
address requires a register or secondary load to compute
(most PIC modes).  This improves "g" constraint handling.  8015842.

The test from 2007 is attempting to test the fix for PR1761,
but since -relocation-model=static doesn't work on Darwin
x86-64, it was not testing what it was supposed to be testing
and was passing erroneously.  Fixed to use Linux x86-64.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106779 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 20:14:51 +00:00
Dan Gohman
ee1c870778 Eliminate the other half of the BRCOND optimization, and update
as many tests as possible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106749 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 15:24:03 +00:00
Dan Gohman
102f3851bb Eliminate the first have of the optimization which eliminates BRCOND
when the condition is constant. This optimization shouldn't be
necessary, because codegen shouldn't be able to find dead control
paths that the IR-level optimizer can't find. And it's undesirable,
because it encourages bugpoint to leave "br i1 false" branches
in its output. And it wasn't updating the CFG.

I updated all the tests I could, but some tests are too reduced
and I wasn't able to meaningfully preserve them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106748 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 15:04:11 +00:00
Dan Gohman
4e39e9da0f Reapply r106634, now that the bug it exposed is fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106746 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 14:30:44 +00:00
Dan Gohman
8e0163ac1e Optimize the "bit test" code path for switch lowering in the
case where the bit mask has exactly one bit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 02:06:24 +00:00
Bill Wendling
151d26d15d MorphNodeTo doesn't preserve the memory operands. Because we're morphing a node
into the same node, but with different non-memory operands, we need to replace
the memory operands after it's finished morphing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106643 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 18:16:24 +00:00
Daniel Dunbar
cbe762b5d1 Revert r106263, "Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,"... it was causing both 'file' (with clang) and 176.gcc (with llvm-gcc) to be miscompiled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 17:09:26 +00:00
Daniel Dunbar
d24c9d5f91 Revert r106066, "Create a more targeted fix for not sinking instructions into a range where it"... it causes bzip2 to be miscompiled by Clang.
Conflicts:

	lib/CodeGen/MachineSink.cpp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106614 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 00:48:25 +00:00
Dan Gohman
dd2fa4bbea Loosen up this test so that it doesn't depend as much on register
allocation details.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106599 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 23:32:47 +00:00
Dan Gohman
caf71ab473 Fix OptimizeMax to handle an odd case where one of the max operands
is another max which folds. This fixes PR7454.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106594 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 23:07:13 +00:00
Dale Johannesen
cda351e1b3 Add SSE so these actually pass on non-X86 hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106575 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 20:54:03 +00:00
Mon P Wang
23a8fc6e48 Move v-binop-widen tests to X86 since they don't work on all platforms
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106562 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 19:40:50 +00:00
Jakob Stoklund Olesen
6ff1c3f36c Remove the SimpleJoin optimization from SimpleRegisterCoalescing.
Measurements show that it does not speed up coalescing, so there is no reason
the keep the added complexity around.

Also clean out some unused methods and static functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106548 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 16:13:57 +00:00