Commit Graph

1097 Commits

Author SHA1 Message Date
Chris Lattner
4172b10ca1 Use new PPC-specific nodes to represent shifts which require the 6-bit
amount handling that PPC provides.  These are generated by the lowering code
and prevents the dag combiner from assuming (rightfully) that the shifts
don't only look at 5 bits.  This fixes a miscompilation of crafty with
the new front-end.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24615 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 02:10:38 +00:00
Chris Lattner
bd05982b48 Add some explicit type casts so that tblgen knows the type of the shift
amount, which is not necessarily the same as the type being shifted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24594 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:34:05 +00:00
Chris Lattner
bead6612a5 The basic fneg cases are already autogen'd
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24592 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 19:04:38 +00:00
Chris Lattner
937a79dbe3 Autogen matching code for ADJCALLSTACK[UP|DOWN], thanks to Evan's tblgen
improvements.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24591 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 19:01:59 +00:00
Chris Lattner
60a4ab2d5c Finish moving uncond br over to .td file, remove from .cpp file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24590 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 18:48:01 +00:00
Chris Lattner
1e48478557 Define BR in the .td file now that Evan made tblgen smarter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24589 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 18:42:54 +00:00
Chris Lattner
05f56a529c Make sure these get added into the codegenmap when appropriate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24566 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 18:09:22 +00:00
Nate Begeman
6510b22cec Support multiple ValueTypes per RegisterClass, needed for upcoming vector
work.  This change has no effect on generated code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24563 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 04:51:06 +00:00
Nate Begeman
5dfc55c304 Cosmetic change, better reflects actual values
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24562 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 04:48:26 +00:00
Chris Lattner
db1cb2b3a1 Fix a regression caused by a patch earlier today
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24561 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 03:50:19 +00:00
Evan Cheng
c121e33e35 Use a getCopyToReg() variant to generate a flaggy CopyToReg node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24558 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 00:41:50 +00:00
Chris Lattner
71d3d50b4a SelectNodeTo now returns N. Use it instead of return N directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24549 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 22:53:06 +00:00
Chris Lattner
80720a9219 Fix Regression/CodeGen/PowerPC/2005-11-30-vastart-crash.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24547 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 20:40:54 +00:00
Nate Begeman
391c5d231a No longer track value types for asm printer operands, and remove them as
an argument to every operand printing function.  Requires some slight
tweaks to x86, the only user.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24541 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 18:54:35 +00:00
Nate Begeman
f43a3ca26d First chunk of actually generating vector code for packed types. These
changes allow us to generate the following code:

_foo:
        li r2, 0
        lvx v0, r2, r3
        vaddfp v0, v0, v0
        stvx v0, r2, r3
        blr

for this llvm:

void %foo(<4 x float>* %a) {
entry:
        %tmp1 = load <4 x float>* %a
        %tmp2 = add <4 x float> %tmp1, %tmp1
        store <4 x float> %tmp2, <4 x float>* %a
        ret void
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24534 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 08:22:07 +00:00
Nate Begeman
7ac8e6b6a8 Represent the encoding of the SPR instructions as they actually are, so
that we can use the correct SPR numbers in the InstrInfo.td file.  This is
necessary to support VRsave.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24521 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 22:42:50 +00:00
Nate Begeman
425a96971f Hook up one type, v4f32, to the VR RegisterClass for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24517 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 08:17:20 +00:00
Nate Begeman
9b14f66320 Add the remainder of the AltiVec 4 x float instructions. Further
enhancements will be necessary to teach the code generator that since
there is no fmul, it will have to do vmaddfp, adding +0.0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24516 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 08:04:45 +00:00
Chris Lattner
f73bae1b73 No targets support line number info yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24513 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 06:16:21 +00:00
Nate Begeman
6a648614e8 Add the majority of the vector machien value types we expect to support,
and make a few changes to the legalization machinery to support more than
16 types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24511 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 05:45:29 +00:00
Evan Cheng
5ee16ea417 Fixed a comment bug:
createPPCPatternInstructionSelector -> createPPCISelPattern


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24510 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 04:59:46 +00:00
Chris Lattner
fd5df2b203 don't say this is i128, because it isn't yet. Hopefully nate will change
this to be something sane, but in the mean time it is unused, so safe to
make something bogus.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24504 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 00:41:40 +00:00
Nate Begeman
01595c52b3 Small tweaks noticed while on the plane.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24492 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-26 22:39:34 +00:00
Nate Begeman
e4f17a5f9b Some first bits of AltiVec stuff: Instruction Formats, Encodings, and
Registers.  Apologies to Jim if the scheduling info so far isn't accurate.

There's a few more things like VRsave support that need to be finished up
in my local tree before I can commit code that Does The Right Thing for
turning 4 x float into the various altivec packed float instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24489 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-23 05:29:52 +00:00
Chris Lattner
c569e6108a Use generic constant pool emission code in the AsmPrinter class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24465 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 08:26:15 +00:00
Chris Lattner
0745536c00 Use the FunctionNumber provided by the AsmPrinter class
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24462 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 08:14:07 +00:00
Chris Lattner
6d5a4f6a8e Use CommentString where possible, fix a bug where aix mode wouldn't assemble
due to basic blocks being misnamed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24459 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 08:02:41 +00:00
Chris Lattner
ef65874151 unify the darwin and aix constant pool printers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24458 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:57:37 +00:00
Chris Lattner
8b8b9515d6 Adjust to capitalized AsmPrinter method names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24456 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:51:23 +00:00
Chris Lattner
7f9ccde91e use PrivateGlobalPrefix for basic blocks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24453 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:41:05 +00:00
Chris Lattner
f6163a0079 This is now implemented in common codegen code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24446 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:06:58 +00:00
Chris Lattner
f55366e3c2 set PrivateGlobalPrefix on darwin, use it when printing out CP references
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24441 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 06:47:58 +00:00
Chris Lattner
9542f9714e only use dyld stubs if not in ppc-static mode. This completes support for
non-static codegen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24403 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 19:40:30 +00:00
Chris Lattner
9ba13e4aef refactor call operand handling to eliminate special cases from printOp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24401 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 19:25:59 +00:00
Chris Lattner
3e7f86a037 disentangle call operands from branch operands a bit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24400 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 19:16:08 +00:00
Chris Lattner
1d05cb47a9 add an option to generate completely non-pic code, corresponding to what
gcc -static produces on PPC.  This is used for building kexts and other things.

With this, materializing the address of a global looks like:

        lis r2, ha16(L_H$non_lazy_ptr)
        la r3, lo16(L_H$non_lazy_ptr)(r2)

we're still emitting stubs for functions, which is wrong.  That is next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24399 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 18:55:48 +00:00
Chris Lattner
1df747867c Fix a bug that resistor on IRC hit where we tried to create token factor
nodes of load results, not of their chain results.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24398 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 18:30:17 +00:00
Chris Lattner
3eef4e377c Enable global address legalization, fixing a todo and allowing the removal
of some code.  This exposes the implicit load from the stubs to the DAG, allowing
them to be optimized by the dag combiner.  It also moves darwin specific stuff
out of the isel into the legalizer, and allows more to be moved to the .td file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24397 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 18:26:56 +00:00
Chris Lattner
4f0f86de5f Teach the selector to fold lo(g) into load instruction immediate fields
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24396 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 18:02:16 +00:00
Chris Lattner
490ad08097 Generate LA and ADDIS when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24395 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 17:52:01 +00:00
Chris Lattner
1566613ca4 Use the right accessor to create this node
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24394 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 17:51:38 +00:00
Chris Lattner
860e8862c1 Add an initial hack at legalizing GlobalAddress into the appropriate nodes
on Darwin to remove smarts from the isel.  This is currently disabled by
default (uncomment setOperationAction(ISD::GlobalAddress to enable it).
tblgen needs to become smarter about tglobaladdr nodes and bigger patterns
needed to be added to the .td file.  However, we can currently emit stuff like
this:  :)

        li r2, lo16(L_x$non_lazy_ptr)
        lis r3, ha16(L_x$non_lazy_ptr)
        lwzx r2, r3, r2

The obvious improvements will follow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24390 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 07:30:41 +00:00
Chris Lattner
bae5b3c1c6 LI could theoretically be used for the lo-part of a global address, just like
lis can be used for the high part.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24388 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 07:04:43 +00:00
Chris Lattner
2823b3e70e When lowering direct calls, lower them to use a targetglobaladress directly
instead of a globaladdress.  This has no effect on the generated code at all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24386 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 05:56:14 +00:00
Nate Begeman
422b0cee7a Patch to clean up function call pseudos and support the BLA instruction,
which branches to an absolute address.  This is required to support objc
direct dispatch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24370 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-16 00:48:01 +00:00
Chris Lattner
2c3d3d2a59 Make sure to use SwitchSection to switch sections so that we don't accidentally emit
functions into the .const section.  Whoops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24363 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-15 01:45:01 +00:00
Chris Lattner
ced704ba60 Handle globals with explicit alignment requests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24355 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-14 19:00:30 +00:00
Chris Lattner
ac7fd7fcc6 Teach the PPC asmwriter to honor globals with explicit section requests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24353 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-14 18:52:46 +00:00
Chris Lattner
5684598f3f Make BB and CPI labels use the function number, not the function name as a
uniquing id.  This makes things happy when the function name is quoted,
preventing labels like LBB"foo"_2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24295 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-10 21:59:25 +00:00
Chris Lattner
85eac0d941 Darwin supports quoted labels. This implements:
test/Regression/CodeGen/PowerPC/darwin-labels.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24287 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-10 19:33:43 +00:00
Chris Lattner
3459bfbc39 Make the aix asm printer interface properly with the parent class
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24274 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-10 18:20:29 +00:00
Chris Lattner
df2e425f2a Add a new option to indicate we want the code generator to emit code quickly,
not spending tons of time microoptimizing it.  This is useful for an -O0
style of build.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24235 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-08 02:12:47 +00:00
Nate Begeman
ae232e7a10 Add the necessary support to the ISel to allow targets to codegen the new
alignment information appropriately.  Includes code for PowerPC to support
fixed-size allocas with alignment larger than the stack.  Support for
arbitrarily aligned dynamic allocas coming soon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24224 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-06 09:00:38 +00:00
Chris Lattner
ae4664a9f2 add a case Nate sent me
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24195 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-05 08:57:56 +00:00
Jim Laskey
6cee630070 Allow itineraries to be passed through the Target Machine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24139 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 20:06:59 +00:00
Chris Lattner
5b0ac99c96 Add a flag to enable a darwin linker optimization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24130 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 00:12:36 +00:00
Chris Lattner
bb69e39b5b Make constant pool entries use private labels. This is important when you're
not compiling a whole program at a time :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24129 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-31 22:12:06 +00:00
Chris Lattner
b685af3e60 This is implemented
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24107 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-30 06:42:12 +00:00
Nate Begeman
167f1e2651 New case to handle someday
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24075 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-28 23:26:57 +00:00
Chris Lattner
7d7b96746c Don't emit "32" for unordered comparison
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24073 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-28 22:58:07 +00:00
Chris Lattner
ed048c067d add a hack to get code with ordered comparisons working. This hack is
tracked as PR642


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24068 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-28 20:49:47 +00:00
Chris Lattner
6df2507121 add support for branch on ordered/unordered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24067 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-28 20:32:44 +00:00
Chris Lattner
f02a916d82 Do not globalize internal symbols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24064 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-28 18:44:07 +00:00
Chris Lattner
0195910558 a bad case for bitfield insert
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24051 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-28 00:20:45 +00:00
Jim Laskey
2cbc207c76 Typo made worse x 2 - take 2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24018 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-26 18:07:50 +00:00
Chris Lattner
85fd97dc88 Fix an assert compiling MallocBench/gs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24017 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-26 18:01:11 +00:00
Jim Laskey
ff2fcee846 Typo x 2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24016 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-26 17:50:22 +00:00
Jim Laskey
581a8f79bc Give full control of subtarget features over to table generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24013 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-26 17:30:34 +00:00
Jim Laskey
f0c2be4d2b Add attribute name and type to SubtargetFeatures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24012 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-26 17:28:23 +00:00
Nate Begeman
5cd61ce1be Add a note about some bitfield stuff we could be doing better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23994 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-25 23:50:02 +00:00
Nate Begeman
ae749a9bb5 Correctly Expand or Promote FP_TO_UINT based on the capabilities of the
machine.  This allows us to generate great code for i32 FP_TO_UINT now on
targets with 64 bit extensions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23993 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-25 23:48:36 +00:00
Chris Lattner
6e61ca6fa7 autogen undef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23991 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-25 21:03:41 +00:00
Chris Lattner
3075a4e94d Allow pseudos to have patterns, no functionality change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23988 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-25 20:58:43 +00:00
Chris Lattner
9c73f095bb Autogen fsel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23987 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-25 20:55:47 +00:00
Chris Lattner
eb255f2b83 Expose the fextend on the DAG instead of doing it in the matcher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23986 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-25 20:54:57 +00:00
Chris Lattner
e6115b370a Autogen a few new ppc-specific nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23985 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-25 20:41:46 +00:00
Chris Lattner
8ecedbe2c3 The dag isel generator generates this now
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23984 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-25 20:36:10 +00:00
Chris Lattner
99ea9da872 Be a bit more paranoid about calling SelectNodeTo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23982 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-25 20:26:41 +00:00
Chris Lattner
3393e80a06 Fix a couple of minor bugs. The first fixes povray, the second fixes things
if the dag combiner isn't run


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23981 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-25 19:32:37 +00:00
Jim Laskey
34bd5d5d87 Preparation of supporting scheduling info. Need to find info based on selected
CPU.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23974 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-25 15:15:28 +00:00
Chris Lattner
2224dcc88c Simplify this, matching changes in the tblgen emitter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23909 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-23 22:34:25 +00:00
Chris Lattner
aa38be17c8 mark this as beta
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23906 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-23 22:23:45 +00:00
Chris Lattner
c8d28890f6 rearrange things a bit so that instructions can use subtarget features in the
future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23902 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-23 22:08:13 +00:00
Chris Lattner
2e1f823aed improve -help output
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23892 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-23 05:28:51 +00:00
Jim Laskey
5476b9bfce Add g3 back to the mix and reorder to irritate them anal folk. Actually, it's
to group appropriately and provide cues to maintainers that the lists don't
need to be ordered.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23880 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-22 08:04:24 +00:00
Chris Lattner
4245f1d790 64-bit reg support should not be enabled by default, as support isn't complete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23878 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 22:15:43 +00:00
Chris Lattner
dabb8291e8 Instead of aborting if not a case we can handle specially, break out and
let the generic code handle it.  This fixes CodeGen/Generic/2005-10-21-longlonggtu.ll on ppc.

also, reindent this code


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23874 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 21:17:10 +00:00
Jim Laskey
f5fc2cbd6b Plugin new subtarget backend into the build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23870 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 19:05:19 +00:00
Nate Begeman
ae1641c39f Match rotate. This does actually match the rotates in an rc5 cipher, but I
haven't seen it fire on our testsuite.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23863 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 06:36:18 +00:00
Nate Begeman
405e3ecb56 Invert the TargetLowering flag that controls divide by consant expansion.
Add a new flag to TargetLowering indicating if the target has really cheap
  signed division by powers of two, make ppc use it.  This will probably go
  away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23853 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 00:02:42 +00:00
Nate Begeman
12a923408c Add some more patterns for i64 on ppc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23842 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 07:51:08 +00:00
Nate Begeman
6957523b9d Move the target constant divide optimization up into the dag combiner, so
that the nodes can be folded with other nodes, and we can not duplicate
code in every backend.  Alpha will probably want this too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23835 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 02:15:44 +00:00
Jim Laskey
538421411a Added InstrSchedClass to each of the PowerPC Instructions.
Note that when adding new instructions that you should refer to the table at the
bottom of PPCSchedule.td.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23830 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 19:51:16 +00:00
Nate Begeman
2d5aff761d Write patterns for the various shl and srl patterns that don't involve
doing something clever.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23824 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 18:42:01 +00:00
Jim Laskey
0de8796e68 Push processor descriptions to the top of target and add command line info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23820 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 13:34:52 +00:00
Chris Lattner
f6cd147471 now that tblgen is smarter, use integers directly. This should help Andrew too
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23818 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 04:32:04 +00:00
Chris Lattner
14c09b81ea teach ppc backend these are copies
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23813 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 01:50:36 +00:00
Chris Lattner
8be1fa5dc5 Convert these cases to patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23811 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 01:38:02 +00:00
Nate Begeman
8d94832394 Woo, it kinda works. We now generate this atrociously bad, but correct,
code for long long foo(long long a, long long b) { return a + b; }

_foo:
        or r2, r3, r3
        or r3, r4, r4
        or r4, r5, r5
        or r5, r6, r6
        rldicr r2, r2, 32, 31
        rldicl r3, r3, 0, 32
        rldicr r4, r4, 32, 31
        rldicl r5, r5, 0, 32
        or r2, r3, r2
        or r3, r5, r4
        add r4, r3, r2
        rldicl r2, r4, 32, 32
        or r4, r4, r4
        or r3, r2, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23809 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 01:12:32 +00:00
Chris Lattner
e5468305a0 apply some tblgen majik to simplify the X register definitions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23805 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 00:17:55 +00:00
Nate Begeman
da32c9eed6 Make a new reg class for 64 bit regs that aliases the 32 bit regs. This
will have to tide us over until we get real subreg support, but it prevents
the PrologEpilogInserter from spilling 8 byte GPRs on a G4 processor.

Add some initial support for TRUNCATE and ANY_EXTEND, but they don't
currently work due to issues with ScheduleDAG.  Something wll have to be
figured out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23803 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 00:05:37 +00:00
Nate Begeman
4a95945fa5 Add the ability to lower return instructions to TargetLowering. This
allows us to lower legal return types to something else, to meet ABI
requirements (such as that i64 be returned in two i32 regs on Darwin/ppc).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23802 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 23:23:37 +00:00
Jim Laskey
21f587ca24 Simple edits; remove unimplimented cases and clarify long haul SLU cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23788 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 16:59:23 +00:00
Chris Lattner
841d12d9ac Fix the JIT encoding of LWA, LD, STD, and STDU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23787 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 16:51:22 +00:00
Jim Laskey
076866c50f Checking in first round of scheduling tablegen files. Not tied in as yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23786 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 16:23:40 +00:00
Chris Lattner
3d8df55fed add a case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23785 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 06:30:51 +00:00
Nate Begeman
9d2b817fcb Do the right thing and enable 64 bit regs under the control of a subtarget
option.  Currently the only way to enable this is to specify the
64bitregs mattr flag.  It is never enabled by default on any config yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23779 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 00:56:42 +00:00
Nate Begeman
1d9d7427c4 First bits of 64 bit PowerPC stuff, currently disabled. A lot of this is
purely mechanical.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23778 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 00:28:58 +00:00
Nate Begeman
21e463b2bf More PPC32 -> PPC changes, as well as merging some classes that were
redundant after the change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23759 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-16 05:39:50 +00:00
Chris Lattner
4cb5a1b896 Remove some dead code: the ORI/ORIS cases are autogen'd. This makes
SelectIntImmediateExpr dead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23753 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 22:06:18 +00:00
Chris Lattner
de123822e5 prune #includes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23752 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 21:58:54 +00:00
Chris Lattner
75c9f67370 These instructions are now autogenerated
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23751 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 21:44:56 +00:00
Chris Lattner
e0b2e6372f Add a pattern for FSQRTS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23750 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 21:44:15 +00:00
Chris Lattner
651dea74f6 remove dead code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23749 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 21:40:12 +00:00
Chris Lattner
d242419e17 remove broken SRA/rlwimi case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23746 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 19:04:48 +00:00
Chris Lattner
16e71f2f70 Rename PPC32*.h to PPC*.h
This completes the grand PPC file renaming


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23745 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:59:06 +00:00
Chris Lattner
b9459b731a Merge PPCJITInfo.h and PPC32JITInfo.h. Note that the PowerPCJITInfo
and PPC32JITInfo classes should be merged.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23744 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:53:41 +00:00
Chris Lattner
2668959b88 Rename PowerPC*.h to PPC*.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23743 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:51:18 +00:00
Chris Lattner
26bd0d48a1 Rename PowerPCInstrBuilder.h -> PPC*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23742 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:45:43 +00:00
Chris Lattner
ec4b73cb09 Nuke the PowerPCTargetMachine.h header. Note that the PowerPCTargetMachine
still should be merged into the PPC32TargetMachine class


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23741 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:44:05 +00:00
Chris Lattner
f379997adc Rename PowerPC*.td -> PPC*.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23740 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:40:39 +00:00
Chris Lattner
f1ed100bc4 These are dead
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23739 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:38:51 +00:00
Chris Lattner
4c7b43b43f Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23738 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:37:35 +00:00
Chris Lattner
e87bc1f3a8 Like the comment says...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23737 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 22:48:24 +00:00
Chris Lattner
617742b1b8 Nuke PowerPCInstrFormats.h, its contents are dead. Remove the definitions
from the .td file that correspond to it


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23736 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 22:44:13 +00:00
Nate Begeman
e0de44adba Remove an unnecsesary file. PPC32 and PPC64 share architected registers.
We will decide with subtarget support whether we ever use an i64 register
class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23734 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 18:58:46 +00:00
Chris Lattner
3f31d4304c These are now autogenerated
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23731 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 06:26:29 +00:00
Chris Lattner
7cb6491a0d Add patterns for FP round/extend
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23727 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 04:55:50 +00:00
Chris Lattner
7b1fe15de0 These definitions have been moved to common code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23681 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-10 06:01:00 +00:00
Chris Lattner
65a419a104 Disable formation of rlwinm instructions from SRA bases. This fixes
the 177.mesa failure from last night, and fixes the
CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll regression test I added.
If this code cannot be fixed, it should be removed for good, but I'll leave
it to Nate to decide its fate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23670 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-09 05:36:17 +00:00
Nate Begeman
7d47a61496 Remove another unused file. Preparing for the great "enable i64 on ppc32"
merge, and using subtarget info for ptr size.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23668 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-08 01:32:34 +00:00
Nate Begeman
02f77d1e83 Remove a file that is no longer used
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23666 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-08 01:21:27 +00:00
Chris Lattner
cf01a70550 When preselecting, favor things that have low depth to select first. This
is faster and uses less stack space.  This reduces our stack requirement
enough to compile sixtrack, and though it's a hack, should be enough until
we switch to iterative isel


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23664 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-07 22:10:27 +00:00
Chris Lattner
eb5d47d99d Fix a CQ regression from my patch to split F32/F64 into seperate register
classes on PPC.  We were emitting fmr instructions to do fp extensions, which
weren't getting coallesced.  This fixes Regression/CodeGen/PowerPC/fpcopy.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23654 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-07 05:00:52 +00:00
Chris Lattner
6a16f6a14f Pull out Call, reducing stack frame size from 6032 bytes to 5184 bytes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23650 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-06 19:07:45 +00:00
Chris Lattner
222adac30a Pull out setcc, this reduces stack frame size from 7520 to 6032 bytes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23649 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-06 19:03:35 +00:00
Chris Lattner
2b63e4c5e2 Pull two more methods out, reducing stack frame size from 8224 -> 7520 bytes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23648 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-06 18:56:10 +00:00
Chris Lattner
bd937b98f4 Add a recursive-iterative hybrid stage to attempt to reduce stack space, this
helps but not enough.

Start pulling cases out of PPC32DAGToDAGISel::Select.  With GCC 4, this function
required 8512 bytes of stack space for each invocation (GCC 3 required less
than 700 bytes).  Pulling this first function out gets us down to 8224.  More
to come :(


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23647 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-06 18:45:51 +00:00
Chris Lattner
8ca02914e5 Speed up the asm printer a lot by not printing formatted LLVM asm output
for globals


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23608 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-03 07:08:36 +00:00
Chris Lattner
dff06f4348 add patterns for float binops and fma ops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23592 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 07:46:28 +00:00
Chris Lattner
43f07a4bbc another solution to the fsel issue. Instead of having 4 variants, just force
the comparison to be 64-bits.  This is fine because extensions from float
to double are free.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23589 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 07:07:49 +00:00
Chris Lattner
867940d1b7 fsel can take a different FP type for the comparison and for the result. As such
split the FSEL family into 4 things instead of just two.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23588 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 06:58:23 +00:00
Chris Lattner
7c0d664c21 fix an f32/f64 type mismatch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23587 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-02 06:37:13 +00:00
Chris Lattner
ca0a4778a8 Minor tweak to the branch selector. When emitting a two-way branch, and if
we're in a single-mbb loop, make sure to emit the backwards branch as the
conditional branch instead of the uncond branch.  For example, emit this:

LBBl29_z__44:
        stw r9, 0(r15)
        stw r9, 4(r15)
        stw r9, 8(r15)
        stw r9, 12(r15)
        addi r15, r15, 16
        addi r8, r8, 1
        cmpw cr0, r8, r28
        ble cr0, LBBl29_z__44
        b LBBl29_z__48                   *** NOT PART OF LOOP

Instead of:

LBBl29_z__44:
        stw r9, 0(r15)
        stw r9, 4(r15)
        stw r9, 8(r15)
        stw r9, 12(r15)
        addi r15, r15, 16
        addi r8, r8, 1
        cmpw cr0, r8, r28
        bgt cr0, LBBl29_z__48            *** PART OF LOOP!
        b LBBl29_z__44

The former sequence has one fewer dispatch group for the loop body.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23582 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 23:06:26 +00:00
Chris Lattner
b91956e7f8 like the comment says, enable this
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23581 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 23:02:40 +00:00
Chris Lattner
2c1760f636 fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23578 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 02:51:36 +00:00
Chris Lattner
919c032fa4 Modify the ppc backend to use two register classes for FP: F8RC and F4RC.
These are used to represent float and double values, and the two regclasses
contain the same physical registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23577 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 01:35:02 +00:00
Jim Laskey
242f2557cc Should be using flag and not chain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23572 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 23:43:37 +00:00
Nate Begeman
2b5e66fc6e Remove some now-dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23571 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 21:28:27 +00:00
Chris Lattner
5802be13e0 constant fold these calls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23558 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 17:16:59 +00:00