Eric Christopher
228232b282
Rewrite mwait and monitor support and custom lower arguments.
...
Fixes PR8573.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120404 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 07:20:12 +00:00
Bill Wendling
0e45a5a901
Minor cleanups. No functional change.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120372 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 00:50:22 +00:00
Bill Wendling
6e46d84eea
s/ARM::BRIND/ARM::BX/g to coincide with r120366.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120371 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 00:48:15 +00:00
Bill Wendling
647fea57fd
Add correct encoding for "bl __aeabi_read_tp". However, the asm matcher isn't
...
able to match this yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120369 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 00:34:08 +00:00
Jim Grosbach
532c2f1d50
Rename BX/BRIND/etc patterns to clarify which is actually the BX instruction
...
and which are pseudos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120366 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 00:24:05 +00:00
Bill Wendling
67077419c6
Add some encoding for the adr instruction. Labels still need to be finished.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120365 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 00:18:30 +00:00
Owen Anderson
6af50f7dd1
Correct Thumb2 encodings for a much wider range of loads and stores.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120364 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 00:14:31 +00:00
Jim Grosbach
5c86a0a2b5
Make a few more ARM pseudo instructions actually use the PseudoInst base class.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120362 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 00:09:06 +00:00
Bill Wendling
8ca2fd6665
Predicate encoding should be withing {}s. And general cleanup.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120361 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 00:08:20 +00:00
Bill Wendling
194271a76e
Predicate encoding should be withing {}s.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120360 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 00:05:25 +00:00
Bob Wilson
8e0c7b5287
Fix the encoding of VLD4-dup alignment.
...
The only reasonable way I could find to do this is to provide an alternate
version of the addrmode6 operand with a different encoding function. Use it
for all the VLD-dup instructions for the sake of consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120358 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 00:00:42 +00:00
Bob Wilson
173fb1421a
Rename VLDnDUP instructions with double-spaced registers
...
in an attempt to make things a little more consistent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120357 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 00:00:38 +00:00
Bob Wilson
6c4c982f83
Add support for NEON VLD3-dup instructions.
...
The encoding for alignment in VLD4-dup instructions is still a work in progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120356 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 00:00:35 +00:00
Jim Grosbach
e76473d9ba
Simplify definitions of the ARM eh.sjlj.*jmp pseudo instructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120354 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 23:51:31 +00:00
Jim Grosbach
6e4221153b
Parameterize ARMPseudoInst size property.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120353 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 23:48:41 +00:00
Jim Grosbach
00a257af5b
Add a few missing initializers.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120350 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 23:41:10 +00:00
Jim Grosbach
03f44a04e6
Nuke trailing whitespace.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120344 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 23:18:01 +00:00
Jim Grosbach
cd3c7cb915
Nuke a FIXME. No need to be fancier here, as ARM handles constant pools
...
locations and formatting specially. rdar://7353441
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120343 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 23:09:20 +00:00
Owen Anderson
75579f739f
Provide Thumb2 encodings for basic loads and stores.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120340 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 22:44:32 +00:00
Evan Cheng
1e0eab122b
Mark Darwin call instructions as using "r7" to prevent the frame-register
...
assignment instructions from being moved below / above calls.
rdar://8690640
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120339 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 22:43:27 +00:00
Jim Grosbach
a0bb253119
Nuke dead isCodeGenOnly annotation and extraneous comment.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120338 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 22:40:58 +00:00
Jim Grosbach
fbf0cb18cb
tidy up.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120335 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 22:38:48 +00:00
Bill Wendling
9b0e92ca5b
Thumb encodings for conditional moves.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120334 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 22:37:46 +00:00
Jim Grosbach
5ca66696e7
Pseudo-ize Thumb2 jump tables with explicit MC lowering to the raw
...
instructions. This simplifies instruction printing and disassembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120333 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 22:37:40 +00:00
Bill Wendling
a46a493c02
Refactor some of the "disassembly-only" instructions into a base class. This
...
reduces some code duplication.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120326 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 22:15:03 +00:00
Eric Christopher
7bb5996e47
Update fastisel for the changes in r120272.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120324 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 21:56:23 +00:00
Jim Grosbach
d092a87ba3
Rename t2 TBB and TBH instructions to reference that they encode the jump table
...
data. Next up, pseudo-izing them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120320 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 21:28:32 +00:00
Owen Anderson
5404c2b36e
Improving the factoring of several instruction encodings.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120317 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 20:38:48 +00:00
Bob Wilson
86c6d80a7a
Add support for NEON VLD3-dup instructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120312 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 19:35:29 +00:00
Bob Wilson
2fcda63763
Fix copy-and-paste errors in VLD2-dup scheduling itineraries.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120311 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 19:35:23 +00:00
Jim Grosbach
f1aa47dc1a
ARM Pseudo-ize tBR_JTr.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 19:32:47 +00:00
Owen Anderson
00a035f74f
Thumb2 encodings for MSR and MRS.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120309 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 19:29:15 +00:00
Owen Anderson
d18a9c9b9d
Thumb2 encodings for system instructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120307 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 19:22:08 +00:00
Owen Anderson
05bf595122
Thumb2 encodings for branches and IT blocks.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120306 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 18:54:38 +00:00
Jim Grosbach
11fbff8085
The ARM BR_JT* pseudos don't need to use the printer jtblock_operand node to
...
get the pretty-printer. That's handled explicityly by the MC lowering now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120305 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 18:53:24 +00:00
Michael J. Spencer
3cc52ea33c
I swear I did a make clean and make before committing all this...
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120304 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 18:47:54 +00:00
Jim Grosbach
2dc7768d73
Switch ARM BR_JTm and BR_JTr instructions to be MC-expanded pseudos.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120303 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 18:37:44 +00:00
Michael J. Spencer
1f6efa3996
Merge System into Support.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120298 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 18:16:10 +00:00
Kalle Raiskila
9363f739cd
Handle lshr for i128 correctly on SPU also when
...
shiftamount > 7.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120288 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 14:44:28 +00:00
Kalle Raiskila
c2ebfd454c
Enable PostRA scheduling for SPU.
...
This speeds up selected test cases with up to
5% - no slowdowns observed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120286 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 10:30:25 +00:00
Kalle Raiskila
b00f24b13c
Allow machine LICM to do its job on SPU.
...
-return a sensible value for register pressure
-add pattern to 'ila' instrucion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120285 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 10:08:09 +00:00
Kalle Raiskila
11edd0cedc
Add missing i128 case.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120284 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 09:36:26 +00:00
Bill Wendling
2f17bf2a44
Add more Thumb encodings.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120279 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 01:07:48 +00:00
Bill Wendling
5cbbf68e35
More Thumb encodings.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120278 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 01:00:43 +00:00
Bill Wendling
d19ac0c75a
Add Thumb encodings for REV instructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120277 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 00:42:50 +00:00
Bill Wendling
849f2e381e
Add more Thumb encodings.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120272 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 00:18:15 +00:00
Rafael Espindola
ec0b428398
Make EmitIntValue non virtual.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120271 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-28 23:22:44 +00:00
Rafael Espindola
d652dbe720
Move lowering of TLS_addr32 and TLS_addr64 to X86MCInstLower.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120263 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-28 21:16:39 +00:00
Chris Lattner
d8f717911d
fix PR8686, accepting a 'b' suffix at the end of all the setcc
...
instructions. I choose to handle this with an asmparser hack,
though it could be handled by changing all the instruction definitions
to allow be "setneb" instead of "setne". The asm parser hack is
better in this case, because we want the disassembler to produce
setne, not setneb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120260 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-28 20:23:50 +00:00
Nicolas Geoffray
7509ccda93
When emitting a single function with cppgen=function, you don't want to emit
...
initializers of global variables used in the function.
Also make sure to emit the operands of a constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120253 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-28 18:00:53 +00:00
Rafael Espindola
a484f2c405
Move the PTXMCAsmStreamer class to the .cpp file.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120241 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-28 14:48:34 +00:00
Rafael Espindola
e04ed7e45f
Define generic 1, 2 and 4 byte pc relative relocations. They are common
...
and at least the 4 byte one will be needed to implement the .cfi_* directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120240 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-28 14:17:56 +00:00
Bob Wilson
b1dfa7a8e0
Add support for NEON VLD2-dup instructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120236 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-28 06:51:26 +00:00
Bob Wilson
f3d2f9d4be
Another minor refactoring for VLD1DUP instructions.
...
The op11_8 field is the same for all of them so put it in the instruction
classes instead of specifying it separately for each instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120234 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-28 06:51:15 +00:00
Bob Wilson
364a72a8e5
Add entry in getTargetNodeName() for ARMISD::VBICIMM.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120233 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-28 06:51:11 +00:00
Anton Korobeynikov
94c5ae0875
Move more PEI-related hooks to TFI
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120229 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-27 23:05:25 +00:00
Anton Korobeynikov
cd775ceff0
Move callee-saved regs spills / reloads to TFI
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120228 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-27 23:05:03 +00:00
Rafael Espindola
5bf7c534cf
Lower TLS_addr32 and TLS_addr64.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120225 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-27 20:43:02 +00:00
Rafael Espindola
bfd2d26159
Implement the data16 prefix.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120224 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-27 20:29:45 +00:00
Bob Wilson
bce55776af
Refactor. Set alignment bit in VLD1-dup instruction classes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120197 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-27 07:12:02 +00:00
Bob Wilson
2a0e97431e
Add NEON VLD1-dup instructions (load 1 element to all lanes).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120194 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-27 06:35:16 +00:00
Bob Wilson
8d41294664
Fix incorrect scheduling itineraries for NEON vld1/vst1 instructions.
...
I added these instructions recently but I have no idea where these "1"
values in the NextCycles field came from. As far as I can tell now,
these instruction stages are clearly intended to overlap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120193 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-27 06:35:09 +00:00
Daniel Dunbar
36d76a8dbc
MC/Mach-O: Switch to using MachOFormat.h.
...
- I'm leaving MachO.h, because I believe it has external consumers, but I would really like to eliminate it (we have stylistic disagreements with one another).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120187 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-27 04:38:36 +00:00
Rafael Espindola
fd46797d0d
Remove the unused TheTarget member.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120168 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-26 04:24:21 +00:00
Rafael Espindola
2ace1b68ac
Use multiple 0x66 prefixes so that all nops up to 15 bytes are a single instruction.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120147 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-25 17:14:16 +00:00
Benjamin Kramer
c62feda741
Namespacify.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120146 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-25 16:42:51 +00:00
Wesley Peck
42e75a3cf1
Updating MBlaze .mask and .frame directives to match GCC's output and fixing regression introduced in 120095 by checking MCStreamer::hasRawTextSupport.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120097 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-24 16:32:35 +00:00
Wesley Peck
82dc040d06
1. Fixing error where basic block labels were not being printed out when they need to be for the MBlaze backend because AsmPrinter::isBlockOnlyReachableByFallthrough does not take into account delay slots.
...
2. Re-adding .mask and .frame directives in printed assembly.
3. Adding .ent and .end directives in printed assembly.
4. Minor cleanups to MBlaze backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120095 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-24 15:39:32 +00:00
Kalle Raiskila
7de8101668
Use i8 as SETCC result type for i1 in SPU.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120092 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-24 12:59:16 +00:00
Kalle Raiskila
702a4046a9
Allow for 'fcmp ogt' in SPU.
...
Fix by Visa Putkinen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120090 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-24 11:42:17 +00:00
Benjamin Kramer
c21a821e9f
The srem -> urem transform is not safe for any divisor that's not a power of two.
...
E.g. -5 % 5 is 0 with srem and 1 with urem.
Also addresses Frits van Bommel's comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120049 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 20:33:57 +00:00
Jason W Kim
13534672de
Move the ARM reloc constants to Support/ELF.h
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120035 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 19:40:36 +00:00
Bob Wilson
626613d5e8
Recognize sign/zero-extended constant BUILD_VECTORs for VMULL operations.
...
We need to check if the individual vector elements are sign/zero-extended
values. For now this only handles constants values. Radar 8687140.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120034 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 19:38:38 +00:00
Benjamin Kramer
b70ebd2aa3
InstCombine: Reduce "X shift (A srem B)" to "X shift (A urem B)" iff B is positive.
...
This allows to transform the rem in "1 << ((int)x % 8);" to an and.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120028 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 18:52:42 +00:00
Kalle Raiskila
0cc5b1f60e
Division by pow-of-2 is not cheap on SPU, do it with
...
shifts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120022 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 13:27:59 +00:00
Rafael Espindola
beb6898df8
Implement the rex64 prefix.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120017 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 11:23:24 +00:00
Rafael Espindola
d93ceeb125
Produce a relocation for pcrel absolute values. Based on a patch by David Meyer.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120006 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 07:20:12 +00:00
Wesley Peck
bf17cfa3f9
Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119990 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 03:31:01 +00:00
Rafael Espindola
d80f8d08ce
Remove duplicated constants. Thanks to Jason for noticing it.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119985 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22 21:49:05 +00:00
Benjamin Kramer
93f8455d73
InstCombine: Implement X - A*-B -> X + A*B.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119984 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22 20:31:27 +00:00
Evan Cheng
ab5c703fdb
Fix epilogue codegen to avoid leaving the stack pointer in an invalid
...
state. Previously Thumb2 would restore sp from fp like this:
mov sp, r7
sub, sp, #4
If an interrupt is taken after the 'mov' but before the 'sub', callee-saved
registers might be clobbered by the interrupt handler. Instead, try
restoring directly from sp:
add sp, #4
Or, if necessary (with VLA, etc.) use a scratch register to compute sp and
then restore it:
sub.w r4, r7, #8
mov sp, r7
rdar://8465407
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119977 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22 18:12:04 +00:00
Kalle Raiskila
d87e571e62
Fix a bug with extractelement on SPU.
...
In the attached testcase, the element was
never extracted (missing rotate).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119973 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22 16:28:26 +00:00
Benjamin Kramer
ce750f0332
Implement the "if (X == 6 || X == 4)" -> "if ((X|2) == 6)" optimization.
...
This currently only catches the most basic case, a two-case switch, but can be
extended later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119964 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22 09:45:38 +00:00
Duncan Sands
3d93893895
Fix a compiler warning about Kind being used uninitialized
...
when assertions are disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119962 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22 09:38:00 +00:00
Eric Christopher
9d89311df8
Pseudos default to 4byte size, let the instruction size field notice
...
that branch tables are special.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119954 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 23:38:19 +00:00
Wesley Peck
4b04713423
Implement ELF object file writing support for the MBlaze backend. Its not perfect yet, but it works for many tests.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119952 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 22:06:28 +00:00
Wesley Peck
46a928b864
Implement branch analysis in the MBlaze backend.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119951 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 21:53:36 +00:00
Wesley Peck
6e749f31c6
Make it a little bit more explicit that the MBlaze backend only supports upto
...
32-bit immediate values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119950 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 21:39:46 +00:00
Wesley Peck
5437ba48ce
Fix an error in the MBlaze delay slot filler where instructions that already
...
fill a delay slot are moved to fill a different delay slot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119949 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 21:36:12 +00:00
Chris Lattner
8bc1e45295
apparently tailcalls are better on darwin/x86-64 than on linux?
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119947 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 18:59:20 +00:00
Bill Wendling
dcf0a47b76
More Thumb encodings.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119940 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 11:49:36 +00:00
Bill Wendling
af2b573614
Add encoding for ARM "trap" instruction.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119938 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 11:05:29 +00:00
Bill Wendling
9717fa9f29
The "trap" instruction is one of this which doesn't have a condition code. Hack
...
the code to not add a "condition code" if it's trap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119937 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 10:56:05 +00:00
Bill Wendling
7d0affdf02
- Give "trap" the correct encoding, at least according to Darwin's assembler.
...
- Add comments saying where the encodings for other instructions came from.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119936 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 10:55:23 +00:00
Chris Lattner
cbf5d74e6a
implement PR8524, apparently mainline gas accepts movq as an alias for movd
...
when transfering between i64 gprs and mmx regs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119931 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 08:18:57 +00:00
Chris Lattner
3e41106de4
add some random notes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119925 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 07:05:31 +00:00
Owen Anderson
aa54524a44
Use by-name rather than by-order operand matching for some NEON encodings.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119923 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 06:47:06 +00:00
Chris Lattner
75d8f599e7
optimize:
...
void a(int x) { if (((1<<x)&8)==0) b(); }
into "x != 3", which occurs over 100 times in 403.gcc but in no
other program in llvm-test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119922 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 06:44:42 +00:00
Chris Lattner
79a980ad85
tail calls on x86 are implemented.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119920 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 06:10:27 +00:00
Jim Grosbach
0eb49c57f0
BR_JTadd is ARM-only, so use the proper pseudo class to get the predicate.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119918 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 01:26:01 +00:00
Bill Wendling
5cc88a205d
A few more thumb instruction MC encodings.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119913 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 22:52:33 +00:00
Eric Christopher
827656dab4
Rewrite address handling to use a structure with all the possible address
...
mode variables. Handle frame indexes in load/store and allocas again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119912 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 22:38:27 +00:00
Eric Christopher
13df1a0bac
STRH only needs the additional operand, not t2STRH. Also invert conditional
...
to match the one from the load emitter above.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119911 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 22:01:38 +00:00
Anton Korobeynikov
0dbe54e844
Make this compile on case-sensitive file systemsw
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119905 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 16:14:57 +00:00
Anton Korobeynikov
82f58740c7
Move some more hooks to TargetFrameInfo
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119904 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 15:59:32 +00:00
Duncan Sands
59d2dad59e
On X86, MEMBARRIER, MFENCE, SFENCE, LFENCE are not target memory intrinsics,
...
so don't claim they are. They are allocated using DAG.getNode, so attempts
to access MemSDNode fields results in reading off the end of the allocated
memory. This fixes crashes with "llc -debug" due to debug code trying to
print MemSDNode fields for these barrier nodes (since the crashes are not
deterministic, use valgrind to see this). Add some nasty checking to try
to catch this kind of thing in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119901 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 11:25:00 +00:00
Bill Wendling
a09cc2b429
Add more Thumb add instruction encodings.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119883 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 01:18:47 +00:00
Bill Wendling
95a6d1759d
Add Thumb encodings for some add instructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119882 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 01:00:29 +00:00
Bill Wendling
6179c31e07
Add more encodings for Thumb instructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119881 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 00:53:35 +00:00
Bill Wendling
20272a7c5a
Have the getAddrMode3OpValue() function in ARMCodeEmitter.cpp produce the same
...
value that the one in ARMMCCodeEmitter.cpp does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119878 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 00:26:37 +00:00
Jim Grosbach
078e239f69
Fix ARM LDR* post-indexed operand encoding.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119869 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 23:14:43 +00:00
Bill Wendling
1228038ed9
Encodings for the compare instructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119868 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 23:14:32 +00:00
Owen Anderson
b16926940e
The Vm and Vn register fields must be the same for a register-register vmov.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119867 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 23:12:43 +00:00
Evan Cheng
ff96b63d6f
Fix a cut-n-paste-error.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119866 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 23:01:16 +00:00
Jim Grosbach
7b6ab402fe
Operand names
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119864 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:43:08 +00:00
Jim Grosbach
a30a51b16a
trailing whitespace
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119863 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:42:55 +00:00
Eric Christopher
b371658083
Don't need to save piecemeal now.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119862 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:39:56 +00:00
Eric Christopher
2d630d7bc9
Update comment.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119861 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:37:58 +00:00
Bill Wendling
0ae28e4447
Add encodings for some of the thumb ADD instructions. Tests will come once the
...
asm parser can handle them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119860 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:37:33 +00:00
Eric Christopher
88de86b550
Update comment.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119859 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:36:41 +00:00
Jim Grosbach
efaeb41aec
Clarify operand names.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119858 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:36:02 +00:00
Eric Christopher
0d58122e12
Refactor address mode handling into a single struct (ala x86), this
...
should give allow a wider range of addressing modes.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119856 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:30:02 +00:00
Jim Grosbach
6571101cb7
Fix encoding for ARM MLS instruction.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119855 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:22:37 +00:00
Jim Grosbach
2aeb6121a1
Add ARM encoding information for STRD.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119852 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:14:31 +00:00
Jim Grosbach
a1b4175b8e
Shuffle things around a bit to keep like things together. Tidy up formatting.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119851 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:06:57 +00:00
Bill Wendling
ba46dc06e6
Revert accidental commit.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119850 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:06:18 +00:00
Bill Wendling
a898166d38
Change long binary encodings to use hex instead. It's more readable. Also
...
initialize missing bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119849 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:02:18 +00:00
Jim Grosbach
953557f445
Factor out operand encoding bits for ARM addressing mode 2 store instructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119846 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 21:35:06 +00:00
Jim Grosbach
e2d54af47f
Delete another dead class.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119844 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 21:16:08 +00:00
Jim Grosbach
fc0cb4b906
whitespace tweak.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119843 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 21:14:37 +00:00
Jim Grosbach
9ef65cbbc6
Refactor PICSTR* instructions to really be pseudos. Nuke dead classes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119841 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 21:14:02 +00:00
Jim Grosbach
9558b4cdc4
Rename ARM .td class AIldst1 to AI2ldst for consistency with the other classes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119840 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 21:07:51 +00:00
Jim Grosbach
9cb15b5be5
Add ARM binary encoding information for the rest of the indexed loads.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119821 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 19:41:26 +00:00
Jim Grosbach
0c2283a910
Remove dead code.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119815 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 18:18:37 +00:00
Jim Grosbach
f1ce7cc1d1
ARM LDRD binary encoding.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119812 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 18:16:46 +00:00
Jim Grosbach
3ea4daaf50
Remove hard tabs.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119810 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 18:01:37 +00:00
Jim Grosbach
7a08864860
Remove trailing whitespace.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119806 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 17:11:02 +00:00
Benjamin Kramer
7920d96964
Avoid release build warnings.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119804 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 16:36:02 +00:00
Owen Anderson
8b8640a964
Fix decoding ambiguities of stdrex and ldrex.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119801 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 13:11:50 +00:00
Evan Cheng
1f190c8bdf
These instructions are thumb2 only.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119793 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 06:28:11 +00:00
Evan Cheng
e8e67e13d4
Fix an obvious oversight.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119792 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 06:15:10 +00:00
Rafael Espindola
195a0ce484
Change some methods in MCDwarf.cpp to be able to handle an arbitrary
...
MCStreamer instead of just MCObjectStreamer. Address changes cannot
be as efficient as we have to use DW_LNE_set_addres, but at least
most of the logic is shared.
This will be used so that, with CodeGen still using EmitDwarfLocDirective,
llvm-gcc is able to produce debug_line sections without needing an
assembler that supports .loc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119777 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 02:26:16 +00:00
Bill Wendling
602890dd8e
Add MC encodings for some Thumb instructions. Test for a few of them. The "bx
...
lr" instruction cannot be tested just yet. It requires matching a "condition
code", but adding one of those makes things go south quickly...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119774 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 01:33:10 +00:00
Bill Wendling
cb21d1c9fd
Use array_pod_sort because the list is contiguous.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119769 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 00:38:19 +00:00
Owen Anderson
91a7c59134
Provide Thumb2 encodings for strex and ldrex.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119768 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 00:28:38 +00:00
Jim Grosbach
817c1a6ddd
Minor cleanups to a few llvm_unreachable() calls.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119767 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 00:27:09 +00:00
Bill Wendling
d1fadd8c5d
An 'unreachable' shouldn't have a '0 &&' prefix.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119762 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 00:05:15 +00:00
Bill Wendling
50d0f58944
Add support for parsing the writeback ("!") token.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119761 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 23:43:05 +00:00
Jason W Kim
837caa9313
Fix .o emission of ARM movt/movw. MCSymbolRefExpr::VK_ARM_(HI||LO)16 for the .o path now works for ARM.
...
Note: lo16AllZero remains in ARMInstrInfo.td - It can be factored out when Thumb movt is repaired.
Existing tests cover this update.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119760 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 23:37:15 +00:00
Owen Anderson
71c11825bf
Fix encodings for pkhbt, and fix some tests where I accidentally tested ARM mode instead of Thumb2.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119755 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 23:29:56 +00:00